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2024-07-05plugins: Free CPUPluginState before destroying vCPU statePhilippe Mathieu-Daudé2-0/+8
cpu::plugin_state is allocated in cpu_common_initfn() when the vCPU state is created. Release it in cpu_common_finalize() when we are done. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240606124010.2460-3-philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-29-alex.bennee@linaro.org>
2024-07-05plugins: Ensure vCPU index is assigned in init/exit hooksPhilippe Mathieu-Daudé1-0/+2
Since vCPUs are hashed by their index, this index can't be uninitialized (UNASSIGNED_CPU_INDEX). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240606124010.2460-2-philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-28-alex.bennee@linaro.org>
2024-07-05plugins/lockstep: clean-up outputAlex Bennée1-8/+8
We were repeating information which wasn't super clear. As we already will have dumped the last failing PC just note the divergence and dump the previous instruction log. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-27-alex.bennee@linaro.org>
2024-07-05plugins/lockstep: mention the one-insn-per-tb optionAlex Bennée1-1/+2
This really helps with lockstep although its super slow on big jobs. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-26-alex.bennee@linaro.org>
2024-07-05plugins/lockstep: make mixed-mode safeAlex Bennée1-2/+2
The ExecState is shared across the socket and if we want to compare say 64 bit and 32 bit binaries we need the two to use the same sizes for things. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-25-alex.bennee@linaro.org>
2024-07-05plugins/lockstep: preserve sock_pathAlex Bennée1-1/+1
We can't assign sock_path directly from the autofree'd GStrv, take a copy. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-24-alex.bennee@linaro.org>
2024-07-05test/plugins: preserve the instruction record over translationsAlex Bennée1-5/+71
We are interested in the particular instruction so we should use a stable record for it. We could bring this down to physical address but for now vaddr + disas seems to do the trick. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-23-alex.bennee@linaro.org>
2024-07-05test/plugin: make insn plugin less noisy by defaultAlex Bennée1-15/+21
While the match functionality is useful lets make the verbosity optional while we are actually running. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-22-alex.bennee@linaro.org>
2024-07-05gitlab: don't bother with KVM for TCI buildsAlex Bennée2-2/+2
In fact any other accelerator would be pointless as the point is to exercise the TCI accelerator anyway. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-21-alex.bennee@linaro.org>
2024-07-05linux-user/main: Suppress out-of-range comparison warning for clangRichard Henderson1-0/+1
For arm32 host and arm64 guest we get .../main.c:851:32: error: result of comparison of constant 70368744177664 with expression of type 'unsigned long' is always false [-Werror,-Wtautological-constant-out-of-range-compare] if (TASK_UNMAPPED_BASE < reserved_va) { ~~~~~~~~~~~~~~~~~~ ^ ~~~~~~~~~~~ We already disable -Wtype-limits here, for this exact comparison, but that is not enough for clang. Disable -Wtautological-compare as well, which is a superset. GCC ignores the unknown warning flag. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-15-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-20-alex.bennee@linaro.org>
2024-07-05tests/tcg/arm: Use vmrs/vmsr instead of mcr/mrcRichard Henderson1-3/+2
Clang 14 generates /home/rth/qemu/src/tests/tcg/arm/fcvt.c:431:9: error: invalid operand for instruction asm("mrc p10, 7, r1, cr1, cr0, 0\n\t" ^ <inline asm>:1:6: note: instantiated into assembly here mrc p10, 7, r1, cr1, cr0, 0 ^ /home/rth/qemu/src/tests/tcg/arm/fcvt.c:432:32: error: invalid operand for instruction "orr r1, r1, %[flags]\n\t" ^ <inline asm>:3:6: note: instantiated into assembly here mcr p10, 7, r1, cr1, cr0, 0 ^ This is perhaps a clang bug, but using the neon mnemonic is clearer. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-14-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-19-alex.bennee@linaro.org>
2024-07-05tests/tcg/arm: Use -march and -mfpu for fcvtRichard Henderson1-2/+2
Clang requires the architecture to be set properly in order to assemble the half-precision instructions. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-13-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-18-alex.bennee@linaro.org>
2024-07-05tests/tcg/arm: Manually register allocate half-precision numbersAkihiko Odaki1-1/+6
Clang does not allow specifying an integer as the value of a single precision register. Explicitly move value from a general register. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> [rth: Use one single inline asm block.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-12-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-17-alex.bennee@linaro.org>
2024-07-05tests/tcg/arm: Use -fno-integrated-as for test-arm-iwmmxtRichard Henderson1-1/+7
Clang does not support IWMXT instructions. Fall back to the external assembler. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-11-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-16-alex.bennee@linaro.org>
2024-07-05tests/tcg/arm: Drop -N from LDFLAGSRichard Henderson1-2/+2
This is redudant with a linker script, and is not supported by clang. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-10-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-15-alex.bennee@linaro.org>
2024-07-05tests/tcg/arm: Fix fcvt result messagesAkihiko Odaki3-605/+605
The test cases for "converting double-precision to single-precision" emits float but the result variable was typed as uint32_t and corrupted the printed values. Propertly type it as float. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Fixes: 8ec8a55e3fc9 ("tests/tcg/arm: add fcvt test cases for AArch32/64") Message-Id: <20240627-tcg-v2-1-1690a813348e@daynix.com> [rth: Update arm ref file as well] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-9-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-14-alex.bennee@linaro.org>
2024-07-05tests/tcg/aarch64: Add -fno-integrated-as for smeRichard Henderson1-1/+2
The only use of SME is inline assembly. Both gcc and clang only support SME with very recent releases; by deferring detection to the assembler we get better test coverage. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-8-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-13-alex.bennee@linaro.org>
2024-07-05tests/tcg/aarch64: Do not use x constraintAkihiko Odaki1-7/+7
clang version 18.1.6 does not support x constraint for AArch64. Use w instead. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240627-tcg-v2-5-1690a813348e@daynix.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-7-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-12-alex.bennee@linaro.org>
2024-07-05tests/tcg/aarch64: Fix irg operand typeAkihiko Odaki1-1/+1
irg expects 64-bit integers. Passing a 32-bit integer results in compilation failure with clang version 18.1.6. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240627-tcg-v2-4-1690a813348e@daynix.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-6-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-11-alex.bennee@linaro.org>
2024-07-05tests/tcg/aarch64: Explicitly specify register widthAkihiko Odaki2-6/+6
clang version 18.1.6 assumes a register is 64-bit by default and complains if a 32-bit value is given. Explicitly specify register width when passing a 32-bit value. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240627-tcg-v2-3-1690a813348e@daynix.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-5-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-10-alex.bennee@linaro.org>
2024-07-05tests/tcg/aarch64: Drop -fno-tree-loop-distribute-patternsRichard Henderson1-1/+1
This option is not supported by clang, and is not required in order to get sve code generation with gcc 12. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-4-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-9-alex.bennee@linaro.org>
2024-07-05tests/tcg: Adjust variable defintion from cc-optionRichard Henderson3-9/+10
Define the variable to the compiler flag used, not "y". This avoids replication of the compiler flag itself. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-3-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-8-alex.bennee@linaro.org>
2024-07-05tests/tcg/minilib: Constify digits in print_numRichard Henderson1-1/+1
This avoids a memcpy to the stack when compiled with clang. Since we don't enable optimization, nor provide memcpy, this results in an undefined symbol error at link time. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-2-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-7-alex.bennee@linaro.org>
2024-07-05tests/docker: Specify --userns keep-id for PodmanAkihiko Odaki1-1/+6
Previously we are always specifying -u $(UID) to match the UID in the container with one outside. This causes a problem with rootless Podman. Rootless Podman remaps user IDs in the container to ones controllable for the current user outside. The -u option instructs Podman to use a specified UID in the container but does not affect the UID remapping. Therefore, the UID in the container can be remapped to some other UID outside the container. This can make the access to bind-mounted volumes fail because the remapped UID mismatches with the owner of the directories. Replace -u $(UID) with --userns keep-id, which fixes the UID remapping. This change is limited to Podman because Docker does not support --userns keep-id. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240626-podman-v1-1-f8c8daf2bb0a@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-6-alex.bennee@linaro.org>
2024-07-05hw/core: ensure kernel_end never gets used undefinedAlex Bennée1-1/+1
Really the problem here is the return values of fit_load_[kernel|fdt]() are a little all over the place. However we don't want to somehow get through not having set kernel_end and having it just be random unused data. The compiler complained on an --enable-gcov build: In file included from ../../hw/core/loader-fit.c:20: /home/alex/lsrc/qemu.git/include/qemu/osdep.h: In function ‘load_fit’: /home/alex/lsrc/qemu.git/include/qemu/osdep.h:486:45: error: ‘kernel_end’ may be used uninitialized [-Werror=maybe-uninitialized] 486 | #define ROUND_UP(n, d) ROUND_DOWN((n) + (d) - 1, (d)) | ^ ../../hw/core/loader-fit.c:270:12: note: ‘kernel_end’ was declared here 270 | hwaddr kernel_end; | ^~~~~~~~~~ Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Aleksandar Rikalo <arikalo@gmail.com> Message-Id: <20240705084047.857176-5-alex.bennee@linaro.org>
2024-07-05tracepoints: move physmem trace pointsAlex Bennée3-6/+9
They don't need to be in the global trace-events file and can have a local trace header. Also add address_space_map tracepoint for tracking mapping behaviour. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-4-alex.bennee@linaro.org>
2024-07-05testing: restore some testing for i686Alex Bennée1-0/+11
The commit 4f9a8315e6 (gitlab-ci.d/crossbuilds: Drop the i386 system emulation job) was a little too aggressive dropping testing for 32 bit system builds. Partially revert but using the debian-i686 cross build images this time as fedora has deprecated the 32 bit stuff. As the SEV breakage gets in the way and its TCG issues we want to catch I've added --disable-kvm to the build. Reported-by: Richard Henderson <richard.henderson@linaro.org> Suggested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-3-alex.bennee@linaro.org>
2024-07-05tests/lcitool: fix debian-i686-cross toolchain prefixAlex Bennée2-2/+2
I guess we never noticed and tried to build with this cross image. Fix the toolchain prefix so we actually build 32 bit images. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-2-alex.bennee@linaro.org>
2024-07-04target/i386/SEV: implement mask_cpuid_featuresPaolo Bonzini2-0/+37
Drop features that are listed as "BitMask" in the PPR and currently not supported by AMD processors. The only ones that may become useful in the future are TSC deadline timer and x2APIC, everything else is not needed for SEV-SNP guests (e.g. VIRT_SSBD) or would require processor support (e.g. TSC_ADJUST). This allows running SEV-SNP guests with "-cpu host". Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-07-04target/i386: add support for masking CPUID features in confidential guestsPaolo Bonzini2-0/+29
Some CPUID features may be provided by KVM for some guests, independent of processor support, for example TSC deadline or TSC adjust. If these are not supported by the confidential computing firmware, however, the guest will fail to start. Add support for removing unsupported features from "-cpu host". Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-07-03hw/pci: Replace -1 with UINT32_MAX for romsizeAkihiko Odaki2-5/+5
romsize is an uint32_t variable. Specifying -1 as an uint32_t value is obscure way to denote UINT32_MAX. Worse, if int is wider than 32-bit, it will change the behavior of a construct like the following: romsize = -1; if (romsize != -1) { ... } When -1 is assigned to romsize, -1 will be implicitly casted into uint32_t, resulting in UINT32_MAX. On contrary, when evaluating romsize != -1, romsize will be casted into int, and it will be a comparison of UINT32_MAX and -1, and result in false. Replace -1 with UINT32_MAX for statements involving the variable to clarify the intent and prevent potential breakage. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20240627-reuse-v10-10-7ca0b8ed3d9f@daynix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-07-03pcie_sriov: Register VFs after migrationAkihiko Odaki3-0/+16
pcie_sriov doesn't have code to restore its state after migration, but igb, which uses pcie_sriov, naively claimed its migration capability. Add code to register VFs after migration and fix igb migration. Fixes: 3a977deebe6b ("Intrdocue igb device emulation") Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240627-reuse-v10-9-7ca0b8ed3d9f@daynix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-07-03pcie_sriov: Remove num_vfs from PCIESriovPFAkihiko Odaki3-10/+21
num_vfs is not migrated so use PCI_SRIOV_CTRL_VFE and PCI_SRIOV_NUM_VF instead. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240627-reuse-v10-8-7ca0b8ed3d9f@daynix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-07-03pcie_sriov: Release VFs failed to realizeAkihiko Odaki1-0/+2
Release VFs failed to realize just as we do in unregister_vfs(). Fixes: 7c0fa8dff811 ("pcie: Add support for Single Root I/O Virtualization (SR/IOV)") Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240627-reuse-v10-7-7ca0b8ed3d9f@daynix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-07-03pcie_sriov: Reuse SR-IOV VF device instancesAkihiko Odaki5-62/+56
Disable SR-IOV VF devices by reusing code to power down PCI devices instead of removing them when the guest requests to disable VFs. This allows to realize devices and report VF realization errors at PF realization time. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240627-reuse-v10-6-7ca0b8ed3d9f@daynix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-07-03pcie_sriov: Ensure VF function number does not overflowAkihiko Odaki5-18/+51
pci_new() aborts when creating a VF with a function number equals to or is greater than PCI_DEVFN_MAX. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240627-reuse-v10-5-7ca0b8ed3d9f@daynix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-07-03pcie_sriov: Do not manually unrealizeAkihiko Odaki1-4/+0
A device gets automatically unrealized when being unparented. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240627-reuse-v10-4-7ca0b8ed3d9f@daynix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-07-03hw/ppc/spapr_pci: Do not reject VFs created after a PFAkihiko Odaki1-1/+3
A PF may automatically create VFs and the PF may be function 0. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240627-reuse-v10-3-7ca0b8ed3d9f@daynix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-07-03hw/ppc/spapr_pci: Do not create DT for disabled PCI deviceAkihiko Odaki1-0/+4
Disabled means it is a disabled SR-IOV VF or it is powered off, and hidden from the guest. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240627-reuse-v10-2-7ca0b8ed3d9f@daynix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-07-03hw/pci: Rename has_power to enabledAkihiko Odaki4-11/+16
The renamed state will not only represent powering state of PFs, but also represent SR-IOV VF enablement in the future. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240627-reuse-v10-1-7ca0b8ed3d9f@daynix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-07-03virtio-iommu: Clear IOMMUDevice when VFIO device is unpluggedCédric Le Goater1-0/+21
When a VFIO device is hoplugged in a VM using virtio-iommu, IOMMUPciBus and IOMMUDevice cache entries are created in the .get_address_space() handler of the machine IOMMU device. However, these entries are never destroyed, not even when the VFIO device is detached from the machine. This can lead to an assert if the device is reattached again. When reattached, the .get_address_space() handler reuses an IOMMUDevice entry allocated when the VFIO device was first attached. virtio_iommu_set_host_iova_ranges() is called later on from the .set_iommu_device() handler an fails with an assert on 'probe_done' because the device appears to have been already probed when this is not the case. The IOMMUDevice entry is allocated in pci_device_iommu_address_space() called from under vfio_realize(), the VFIO PCI realize handler. Since pci_device_unset_iommu_device() is called from vfio_exitfn(), a sub function of the PCIDevice unrealize() handler, it seems that the .unset_iommu_device() handler is the best place to release resources allocated at realize time. Clear the IOMMUDevice cache entry there to fix hotplug. Fixes: 817ef10da23c ("virtio-iommu: Implement set|unset]_iommu_device() callbacks") Signed-off-by: Cédric Le Goater <clg@redhat.com> Message-Id: <20240701101453.203985-1-clg@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-07-03virtio: remove virtio_tswap16s() call in vring_packed_event_read()Stefano Garzarella1-1/+0
Commit d152cdd6f6 ("virtio: use virtio accessor to access packed event") switched using of address_space_read_cached() to virito_lduw_phys_cached() to access packed descriptor event. When we used address_space_read_cached(), we needed to call virtio_tswap16s() to handle the endianess of the field, but virito_lduw_phys_cached() already handles it internally, so we no longer need to call virtio_tswap16s() (as the commit had done for `off_wrap`, but forgot for `flags`). Fixes: d152cdd6f6 ("virtio: use virtio accessor to access packed event") Cc: jasowang@redhat.com Cc: qemu-stable@nongnu.org Reported-by: Xoykie <xoykie@gmail.com> Link: https://lore.kernel.org/qemu-devel/CAFU8RB_pjr77zMLsM0Unf9xPNxfr_--Tjr49F_eX32ZBc5o2zQ@mail.gmail.com Signed-off-by: Stefano Garzarella <sgarzare@redhat.com> Message-Id: <20240701075208.19634-1-sgarzare@redhat.com> Acked-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eugenio Pérez <eperezma@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-07-03hw/cxl/events: Mark cxl-add-dynamic-capacity and cxl-release-dynamic-capcity ↵Jonathan Cameron1-2/+12
unstable Markus suggested that we make the unstable. I don't expect these interfaces to change because of their tight coupling to the Compute Express Link (CXL) Specification, Revision 3.1 Fabric Management API definitions which can only be extended in backwards compatible way. However, there seems little disadvantage in taking a cautious path for now and marking them as unstable interfaces. Suggested-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20240625170805.359278-3-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-07-03hw/cxl/events: Improve QMP interfaces and documentation for add/release ↵Jonathan Cameron3-71/+107
dynamic capacity. New DCD command definitions updated in response to review comments from Markus. - Used CxlXXXX instead of CXLXXXXX for newly added types. - Expanded some abreviations in type names to be easier to read. - Additional documentation for some fields. - Replace slightly vague cxl r3.1 references with "Compute Express Link (CXL) Specification, Revision 3.1, XXXX" to bring them inline with what it says on the specification cover. Suggested-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20240625170805.359278-2-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-07-03tests/data/acpi/rebuild-expected-aml.sh: Add RISC-VSunil V L1-2/+3
Update the list of supported architectures to include RISC-V. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20240625150839.1358279-14-sunilvl@ventanamicro.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-07-03pc-bios/meson.build: Add support for RISC-V in unpack_edk2_blobsSunil V L2-0/+5
Update list of images supported in unpack_edk2_blobs to enable RISC-V ACPI table testing. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20240625150839.1358279-13-sunilvl@ventanamicro.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-07-03meson.build: Add RISC-V to the edk2-target listSunil V L1-1/+1
so that ACPI table test can be supported. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20240625150839.1358279-12-sunilvl@ventanamicro.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-07-03tests/data/acpi/virt: Move ARM64 ACPI tables under aarch64/${machine} pathSunil V L25-0/+0
Same machine name can be used by different architectures. Hence, create aarch64 folder and move all aarch64 related AML files for virt machine inside. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20240625150839.1358279-11-sunilvl@ventanamicro.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-07-03tests/data/acpi: Move x86 ACPI tables under x86/${machine} pathSunil V L117-0/+0
To support multiple architectures using same machine name, create x86 folder and move all x86 related AML files for each machine type inside. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20240625150839.1358279-10-sunilvl@ventanamicro.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-07-03tests/qtest/bios-tables-test.c: Set "arch" for x86 testsSunil V L1-13/+64
To search for expected AML files under ${arch}/${machine} path, set this field for X86 related test cases. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20240625150839.1358279-9-sunilvl@ventanamicro.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>