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* load_aout: replace bswap_needed with big_endianPaolo Bonzini2025-03-211-2/+2
| | | | | | | | | | | | | | | Targets know whether they are big-endian more than they know if the endianness is different from the host: the former is mostly a constant, at least in machine creation code, while the latter has to be computed with TARGET_BIG_ENDIAN != HOST_BIG_ENDIAN or something like that. load_aout, however, takes a "bswap_needed" argument. Replace it with a "big_endian" argument; even though all users are big-endian, it is cheap enough to keep the optional swapping functionality even for little-endian boards. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* qdev, rust/hpet: fix type of HPET "timers" propertyPaolo Bonzini2025-03-201-0/+37
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* hw/loader: fix roms during cprSteve Sistare2025-03-141-1/+4
| | | | | | | | | | | | | | During normal migration, new QEMU creates and initializes memory regions, then loads the preserved contents of the region from vmstate. During CPR, memory regions are preserved in place, then the realize method initializes the regions contents, losing the old contents. To fix, skip the re-init during CPR. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Message-ID: <1741380954-341079-4-git-send-email-steven.sistare@oracle.com> Signed-off-by: Fabiano Rosas <farosas@suse.de>
* cpus: Remove CPUClass::has_work() handlerPhilippe Mathieu-Daudé2025-03-093-12/+14
| | | | | | | | | | | | | | | All handlers have been converted to SysemuCPUOps::has_work(). Remove CPUClass::has_work along with cpu_common_has_work() and simplify cpu_has_work(), making SysemuCPUOps::has_work handler mandatory. Note, since cpu-common.c is in meson's common_ss[] source set, we must define cpu_exec_class_post_init() in cpu-target.c (which is in the specific_ss[] source set) to have CONFIG_USER_ONLY defined. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20250125170125.32855-25-philmd@linaro.org>
* cpus: Introduce SysemuCPUOps::has_work() handlerPhilippe Mathieu-Daudé2025-03-091-0/+4
| | | | | | | | | SysemuCPUOps::has_work() is similar to CPUClass::has_work(), but only exposed on system emulation. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250125170125.32855-4-philmd@linaro.org>
* cpus: Un-inline cpu_has_work()Philippe Mathieu-Daudé2025-03-091-0/+6
| | | | | | | | In order to expand cpu_has_work(), un-inline it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250125170125.32855-3-philmd@linaro.org>
* cpus: Prefer cached CpuClass over CPU_GET_CLASS() macroPhilippe Mathieu-Daudé2025-03-092-48/+26
| | | | | | | | | | CpuState caches its CPUClass since commit 6fbdff87062 ("cpu: cache CPUClass in CPUState for hot code paths"), use it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250122093028.52416-5-philmd@linaro.org>
* cpus: Build cpu_exec_[un]realizefn() methods oncePhilippe Mathieu-Daudé2025-03-091-0/+26
| | | | | | | | | | | Now that cpu_exec_realizefn() and cpu_exec_unrealizefn() methods don't use any target specific definition anymore, we can move them to cpu-common.c to be able to build them once. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250123234415.59850-21-philmd@linaro.org>
* cpus: Register VMState per user / system emulationPhilippe Mathieu-Daudé2025-03-092-0/+127
| | | | | | | | | | Simplify cpu-target.c by extracting mixed vmstate code into the cpu_vmstate_register() / cpu_vmstate_unregister() helpers, implemented in cpu-user.c and cpu-system.c. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250123234415.59850-20-philmd@linaro.org>
* Merge tag 'accel-cpus-20250306' of https://github.com/philmd/qemu into stagingStefan Hajnoczi2025-03-075-6/+89
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Generic CPUs / accelerators patch queue - Merge "qemu/clang-tsa.h" within "qemu/compiler.h" - Various cleanups around accelerators initialization code (better user/system split) - Various trivial cleanups in accel/tcg/, Guard few TCG calls with tcg_enabled() - Explicit disassemble_info endianness - Improve dual-endianness support for MicroBlaze # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmfJw08ACgkQ4+MsLN6t # wN70whAAtfcdWtqseFfb6fvDtjflgxN51Ui0iaOECXUA18USKriGy34eBcMYMiM2 # +eKgU7+jI6JGE4+burcgWUsPpFFF951/A8+lyIbFgO5yToTDmC+qNe4XfmMAIyXq # uf9Obr2c0Xk9luh4odb+jPAQodw/7G1fKgcCVIJNDCl/xEcPhS9eNpTaHwcVnkWI # K6KrxWXOsqG6+evJBPWYoXtOOyt0+JcwAsJoGhprwtGm3P9+jSVXsgeGsJVyZcna # f32JtjWL754O8XeMkOn4x6rt58VrCIMKI9xT7keDyuhTCq0Zki9RO2nMU2dSw5mN # AfL9hxqUy0Nijnyslg3ugujDfTePsNyLdwwH7n0mnoD72ELi6WnhDsmOThuEB3Rd # 4/kdwTJfA/rlWk/GF1tbKW7AvQZokRARtzmL3V0HmGJu57lX+2JuszEdYBkqDEP7 # GH1I10B2yANUm+C9y3X8qWOU7Ws433ebJeJoZuyfnbZ9Me+UfRmql/oS+V8ata2i # fArEItpldUFrWRyYLkTbXrh2dgyV9yJTEir/lzOzeAZZzyabTbjf2z9qnh976GGO # 1QnDy5QA4f54kDBUZe7JK26TZsHPch7cgqXW6f8tRlJF7A9hxGK8d2TUV/lC3/vx # LUOlWNu03PhiruYmZEcWOsY3Jt9jRCF6lIryrnaJsqnVOVmMUMM= # =3TRh # -----END PGP SIGNATURE----- # gpg: Signature made Thu 06 Mar 2025 23:46:23 HKT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'accel-cpus-20250306' of https://github.com/philmd/qemu: (54 commits) include: Poison TARGET_PHYS_ADDR_SPACE_BITS definition system: Open-code qemu_init_arch_modules() using target_name() target/i386: Mark WHPX APIC region as little-endian target/alpha: Do not mix exception flags and FPCR bits target/riscv: Convert misa_mxl_max using GLib macros target/riscv: Declare RISCVCPUClass::misa_mxl_max as RISCVMXL target/xtensa: Finalize config in xtensa_register_core() target/sparc: Constify SPARCCPUClass::cpu_def target/i386: Constify X86CPUModel uses disas: Remove target_words_bigendian() call in initialize_debug_target() target/xtensa: Set disassemble_info::endian value in disas_set_info() target/sh4: Set disassemble_info::endian value in disas_set_info() target/riscv: Set disassemble_info::endian value in disas_set_info() target/ppc: Set disassemble_info::endian value in disas_set_info() target/mips: Set disassemble_info::endian value in disas_set_info() target/microblaze: Set disassemble_info::endian value in disas_set_info target/arm: Set disassemble_info::endian value in disas_set_info() target: Set disassemble_info::endian value for big-endian targets target: Set disassemble_info::endian value for little-endian targets target/mips: Fix possible MSA int overflow ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * hw/core/generic-loader: Do not open-code cpu_set_pc()Philippe Mathieu-Daudé2025-03-061-4/+1
| | | | | | | | | | | | | | | | Directly call cpu_set_pc() instead of open-coding it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250122093028.52416-2-philmd@linaro.org>
| * cpus: Have cpu_exec_initfn() per user / system emulationPhilippe Mathieu-Daudé2025-03-062-0/+12
| | | | | | | | | | | | | | | | | | Slighly simplify cpu-target.c again by extracting cpu_exec_initfn() to cpu-{system,user}.c, adding an empty stub for user emulation. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250123234415.59850-19-philmd@linaro.org>
| * cpus: Have cpu_class_init_props() per user / system emulationPhilippe Mathieu-Daudé2025-03-063-1/+71
| | | | | | | | | | | | | | | | | | | | Rather than maintaining a mix of system / user code for CPU class properties, move system properties to cpu-system.c and user ones to the new cpu-user.c unit. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250123234415.59850-18-philmd@linaro.org>
| * accel/tcg: Remove pointless initialization of cflags_next_tbPhilippe Mathieu-Daudé2025-03-061-1/+0
| | | | | | | | | | | | | | | | | | | | cflags_next_tb is always re-initialized in the CPU Reset() handler in cpu_common_reset_hold(), no need to initialize it in cpu_common_initfn(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240427155714.53669-13-philmd@linaro.org>
| * cpus: Keep default fields initialization in cpu_common_initfn()Philippe Mathieu-Daudé2025-03-061-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | cpu_common_initfn() is our target agnostic initializer, while cpu_exec_initfn() is the target specific one. The %as and %num_ases fields are not target specific, so initialize them in the common helper. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250123234415.59850-6-philmd@linaro.org>
| * cpus: Cache CPUClass early in instance_init() handlerPhilippe Mathieu-Daudé2025-03-061-0/+3
| | | | | | | | | | | | | | | | | | Cache CPUClass as early as possible, when the instance is initialized. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250123234415.59850-5-philmd@linaro.org>
* | Merge tag 'pull-vfio-20250306' of https://github.com/legoater/qemu into stagingStefan Hajnoczi2025-03-071-0/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | vfio queue: * Added property documentation * Added Minor fixes * Implemented basic PCI PM capability backing * Promoted new IGD maintainer * Deprecated vfio-plaform * Extended VFIO migration with multifd support # -----BEGIN PGP SIGNATURE----- # # iQIyBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmfJrZoACgkQUaNDx8/7 # 7KFE2A/0Dmief9u/dDJIKGIDa+iawcf4hu8iX4v5pB0DlGniT3rgK8WMGnhDpPxq # Q4wsKfo+JJ2q6msInrT7Ckqyydu9nQztI3vwmfMuWxLhTMyH28K96ptwPqIZBjOx # rPTEXfnVX4W3tpn1+48S+vefWVa/gkBkIvv7RpK18rMBXv1kDeyOvc/d2dbAt7ft # zJc4f8gH3jfQzGwmnYVZU1yPrZN7p6zhYR/AD3RQOY97swgZIEyYxXhOuTPiCuEC # zC+2AMKi9nmnCG6x/mnk7l2yJXSlv7lJdqcjYZhJ9EOIYfiUGTREYIgQbARcafE/ # 4KSg2QR35BoUd4YrmEWxXJCRf3XnyWXDY36dDKVhC0OHng1F/U44HuL4QxwoTIay # s1SP/DHcvDiPAewVTvdgt7Iwfn9xGhcQO2pkrxBoNLB5JYwW+R6mG7WXeDv1o3GT # QosTu1fXZezQqFd4v6+q5iRNS2KtBZLTspwAmVdywEFUs+ZLBRlC+bodYlinZw6B # Yl/z0LfAEh4J55QmX2espbp8MH1+mALuW2H2tgSGSrTBX1nwxZFI5veFzPepgF2S # eTx69BMjiNMwzIjq1T7e9NpDCceiW0fXDu7IK1MzYhqg1nM9lX9AidhFTeiF2DB2 # EPb3ljy/8fyxcPKa1T9X47hQaSjbMwofaO8Snoh0q0jokY246Q== # =hIBw # -----END PGP SIGNATURE----- # gpg: Signature made Thu 06 Mar 2025 22:13:46 HKT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full] # gpg: aka "Cédric Le Goater <clg@kaod.org>" [full] # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-vfio-20250306' of https://github.com/legoater/qemu: (42 commits) hw/core/machine: Add compat for x-migration-multifd-transfer VFIO property vfio/migration: Make x-migration-multifd-transfer VFIO property mutable vfio/migration: Add x-migration-multifd-transfer VFIO property vfio/migration: Multifd device state transfer support - send side vfio/migration: Multifd device state transfer support - config loading support migration/qemu-file: Define g_autoptr() cleanup function for QEMUFile vfio/migration: Multifd device state transfer support - load thread vfio/migration: Multifd device state transfer support - received buffers queuing vfio/migration: Setup and cleanup multifd transfer in these general methods vfio/migration: Multifd setup/cleanup functions and associated VFIOMultifd vfio/migration: Multifd device state transfer - add support checking function vfio/migration: Multifd device state transfer support - basic types vfio/migration: Move migration channel flags to vfio-common.h header file vfio/migration: Add vfio_add_bytes_transferred() vfio/migration: Convert bytes_transferred counter to atomic vfio/migration: Add load_device_config_state_start trace event migration: Add save_live_complete_precopy_thread handler migration/multifd: Add multifd_device_state_supported() migration/multifd: Make MultiFDSendData a struct migration/multifd: Device state transfer support - send side ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * | hw/core/machine: Add compat for x-migration-multifd-transfer VFIO propertyMaciej S. Szmigiero2025-03-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a hw_compat entry for recently added x-migration-multifd-transfer VFIO property. Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com> Link: https://lore.kernel.org/qemu-devel/92c354f0457c152d1f267cc258c6967fff551cb1.1741124640.git.maciej.szmigiero@oracle.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
| * | migration: Add MIG_CMD_SWITCHOVER_START and its load handlerMaciej S. Szmigiero2025-03-061-0/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This QEMU_VM_COMMAND sub-command and its switchover_start SaveVMHandler is used to mark the switchover point in main migration stream. It can be used to inform the destination that all pre-switchover main migration stream data has been sent/received so it can start to process post-switchover data that it might have received via other migration channels like the multifd ones. Add also the relevant MigrationState bit stream compatibility property and its hw_compat entry. Reviewed-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Zhang Chen <zhangckid@gmail.com> # for the COLO part Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com> Link: https://lore.kernel.org/qemu-devel/311be6da85fc7e49a7598684d80aa631778dcbce.1741124640.git.maciej.szmigiero@oracle.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
* | qdev: Improve a few more PropertyInfo @description membersMarkus Armbruster2025-03-062-1/+2
| | | | | | | | | | | | Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20250227085601.4140852-7-armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
* | qdev: Improve PropertyInfo member @description for enum propertiesMarkus Armbruster2025-03-061-15/+11
| | | | | | | | | | | | | | | | Consistently use format "DESCRIPTION (VALUE/VALUE...)". Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20250227085601.4140852-6-armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
* | qdev: Change values of PropertyInfo member @type to be QAPI typesMarkus Armbruster2025-03-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PropertyInfo member @type is externally visible via QMP device-list-properties and qom-list-properies. Its meaning is not documented at its definition. It gets passed as @type argument to object_property_add() and object_class_property_add(). This argument's documentation isn't of much help, either: * @type: the type name of the property. This namespace is pretty loosely * defined. Sub namespaces are constructed by using a prefix and then * to angle brackets. For instance, the type 'virtio-net-pci' in the * 'link' namespace would be 'link<virtio-net-pci>'. The two QMP commands document it as # @type: the type of the property. This will typically come in one of # four forms: # # 1) A primitive type such as 'u8', 'u16', 'bool', 'str', or # 'double'. These types are mapped to the appropriate JSON # type. # # 2) A child type in the form 'child<subtype>' where subtype is a # qdev device type name. Child properties create the # composition tree. # # 3) A link type in the form 'link<subtype>' where subtype is a # qdev device type name. Link properties form the device model # graph. "Typically come in one of four forms" followed by three items inspires the level of trust that is appropriate here. Clean up a bunch of funnies: * qdev_prop_fdc_drive_type.type is "FdcDriveType". Its .enum_table refers to QAPI type "FloppyDriveType". So use that. * qdev_prop_reserved_region is "reserved_region". Its only user is an array property called "reserved-regions". Its .set() visits str. So change @type to "str". * trng_prop_fault_event_set.type is "uint32:bits". Its .set() visits uint32, so change @type to "uint32". If we believe mentioning it's actually bits is useful, the proper place would be .description. * ccw_loadparm.type is "ccw_loadparm". It's users are properties called "loadparm". Its .set() visits str. So change @type to "str". * qdev_prop_nv_gpudirect_clique.type is "uint4". Its set() visits uint8, so change @type to "uint8". If we believe mentioning the range is useful, the proper place would be .description. * s390_pci_fid_propinfo.type is "zpci_fid". Its .set() visits uint32. So change type to that, and move the "zpci_fid" to .description. This is admittedly a lousy description, but it's still an improvement; for instance, output of -device zpci,help changes from fid=<zpci_fid> to fid=<uint32> - zpci_fid * Similarly for a raft of PropertyInfo in target/riscv/cpu.c. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20250227085601.4140852-5-armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> [Commit message typo fixed]
* | qdev: Rename PropertyInfo member @name to @typeMarkus Armbruster2025-03-062-44/+44
| | | | | | | | | | | | | | | | | | | | | | PropertyInfo member @name becomes ObjectProperty member @type, while Property member @name becomes ObjectProperty member @name. Rename the former. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20250227085601.4140852-4-armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> [One missed instance of @type fixed]
* | qdev: Change qdev_prop_pci_devfn member @name from "int32" to "str"Markus Armbruster2025-03-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Properties using qdev_prop_pci_devfn initially accepted a string of the form "DEV.FN" or "DEV" where DEV and FN are in hexadecimal. Member @name was "pci-devfn" initially. Commit b403298adb5 (qdev: make the non-legacy pci address property accept an integer) changed them to additionally accept integers: bits 3..7 are DEV, and bits 0..2 are FN. This is inaccessible externally in device_add so far. The commit also changed @name to "int32", and set member @legacy-name to "pci-devfn". Together, this kept QMP command device-list-properties unaffected: it used @name only when @legacy_name was null. Commit 07d09c58dbb (qmp: Print descriptions of object properties) quietly dumbed that down to use @name always, and the next commit 18b91a3e082q (qdev: Drop legacy_name from qdev properties) dropped member @legacy_name. This changed the value of @type reported by QMP command device-list-properties from "pci-devfn" to "int32". But "int32" is misleading: device_add actually wants QAPI type "str". So change @name to that. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20250227085601.4140852-3-armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
* | qdev: Delete unused qdev_prop_enumMarkus Armbruster2025-03-061-7/+0
|/ | | | | | Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20250227085601.4140852-2-armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
* Merge tag 'hw-misc-20250305' of https://github.com/philmd/qemu into stagingStefan Hajnoczi2025-03-051-0/+9
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Misc HW patches - Remove TCG dependency on ARM_GICV3 (Philippe) - Add MMIO interface to PVPanic device (Alexander) - Add vmapple machine (Alexander & Phil) - Restrict part of sPAPR PAGE_INIT hypercall to TCG (Philippe) - Make ghes_record_cper_errors() scope static (Gavin) - Do not expose the ARM virt machines on Xen-only binary (Philippe) - Xen header cleanups (Philippe) - Set Freescale eTSEC network device description & category (Zoltan) - Improve RX FIFO depth for various UARTs (Philippe) - Prevent TX FIFO memory leak in SiFive UART (Alistair) - Cleanups in MacIO and AT24C EEPROM (Zoltan) - Add UFS temperature event notification support & test (Keoseong) - Remove printf() calls in hw/arm/ (Peter) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmfHpagACgkQ4+MsLN6t # wN4dTg//Z2neoENdnZglRp6q66LLxSTHJnHUMNHe2Bp+KKfhce+//j+CFYgOnJjV # P5eExzvHvtYFL6lNXOR7MTM/i/4pixcLYh8anyrnUWkEiufGXI4/30QePbwAAdkZ # kQ1CpLI43ZdnMLTh18JswLo/JMkl/jJGvCGNjhtQVnobqam+ATgAbjmcnwA8esJS # cCQVFzno9TNvsCnUtMe3IdOfIs9K3atCARbXpA3i3wd52P+NHvGO1jU0QPFBm2Lr # 4kcFLI1Sg2vYWD3FujDPeCcfI7kcRDIjHS6vVplK1VlCjjdaQmxx6XKO72PnZZOG # 7sra8xJpW8mZS2jfN2AxKMVlNndZMYzAJoS2UBMp1YX8KBEzlcmI2uSjGas6bcmQ # XIaP7/mggx7yBU3nspUl8rqY/3Z3wVjwepf1l8KOn9Z13wo+APv4aj6W+zkK96A5 # NGq6EpoKquINGLBBMkZAdfBOKk97NhwHh1Op04VgJNnPESpLnb5hENtZW1ksg92r # tijWdDWnC/JtWMU2dAnmT/9Vaxk4fukGqqncXqQJzGBw0OylzWh5b2Zer02WFyxz # oplISEwU3uFcg0OLa9aUHgs7lVWBUbEW3pSk1CtKuqgPtwxm/Gr2KbAVgAbFiyzr # 6YPQsfFP5z6CjreOWMELPWmsYV+jtTj/KoIek2QlYt7Ex6uiA6c= # =TcY9 # -----END PGP SIGNATURE----- # gpg: Signature made Wed 05 Mar 2025 09:15:20 HKT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'hw-misc-20250305' of https://github.com/philmd/qemu: (41 commits) hw/nvram/eeprom_at24c: Reorganise init to avoid overwriting values hw/nvram/eeprom_at24c: Remove memset after g_malloc0 hw/nvram/eeprom_at24c: Remove ERR macro that calls fprintf to stderr hw/nvram/eeprom_at24c: Use OBJECT_DECLARE_SIMPLE_TYPE hw/arm/versatilepb: Convert printfs to LOG_GUEST_ERROR hw/arm/omap_sx1: Remove ifdeffed out debug printf hw/arm/omap1: Convert information printfs to tracepoints hw/arm/omap1: Drop ALMDEBUG ifdeffed out code hw/arm/omap1: Convert raw printfs to qemu_log_mask() tests/qtest/ufs-test: Add test code for the temperature feature hw/ufs: Add temperature event notification support hw/misc/macio/gpio: Add constants for register bits hw/misc/macio: Improve trace logs hw/char/sifive_uart: Free fifo on unrealize hw/char/sh_serial: Return correct number of empty RX FIFO elements hw/char/mcf_uart: Really use RX FIFO depth hw/char/mcf_uart: Use FIFO_DEPTH definition instead of magic values hw/char/imx_serial: Really use RX FIFO depth hw/char/bcm2835_aux: Really use RX FIFO depth hw/char/pl011: Really use RX FIFO depth ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * hw/vmapple/virtio-blk: Add support for apple virtio-blkAlexander Graf2025-03-041-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Apple has its own virtio-blk PCI device ID where it deviates from the official virtio-pci spec slightly: It puts a new "apple type" field at a static offset in config space and introduces a new barrier command. This patch first creates a mechanism for virtio-blk downstream classes to handle unknown commands. It then creates such a downstream class and a new vmapple-virtio-blk-pci class which support the additional apple type config identifier as well as the barrier command. The 'aux' or 'root' device type are selected using the 'variant' property. Signed-off-by: Alexander Graf <graf@amazon.com> Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Tested-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-ID: <20241223221645.29911-13-phil@philjordan.eu> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
* | hw/uefi-vars-sysbus: qemu platform bus supportGerd Hoffmann2025-03-041-0/+24
|/ | | | | | | | Add and register function to create an device tree entry when the device is added to the qemu platform bus. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-ID: <20250225163031.1409078-20-kraxel@redhat.com>
* Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingStefan Hajnoczi2025-03-031-0/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * qom: Use command line syntax for default values in help * i386: support cache topology with machine's configuration * rust: fix duplicate symbols from monitor-fd.c * rust: add module to convert between success/-errno and io::Result * rust: move class_init implementation from trait to method * pvg: configuration improvements * kvm guestmemfd: replace assertion with error * riscv: cleanups * target/i386/hvf: cleanups to emulation * target/i386: add Zhaoxin and Yongfeng CPU model # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAme+10sUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroMkRwf/eT0gVbE3u0TS6EVZwjGZPHEOEyy/ # gl39SlTT97HxoAClE4PRcdkn7YR3f30hytHghc4qhou+Eh/7Mj2Ox7l7+CyaaCS/ # fxowsOVMBV7++PkyKRPxIMamKzD8Bo0eGwWe+CJijA0zt9PSI/YEwRV0pf/s6KCW # pOya2f+aNbAo3O5RWtIKSISgbSVvuVzDcDHyfydmOHuvGr2NHAM8UfZYD+41qy5B # 81PYlvK6HgvhaCboqCUADULkte96Xmc4p2ggk0ZNiy0ho46rs78SMyBh5sXR2S3I # moiQHpJXyV5TcI7HmwvcW7s0/cpdKm/wmPOjb6otu9InWh/ON1nnURsTEQ== # =V/fm # -----END PGP SIGNATURE----- # gpg: Signature made Wed 26 Feb 2025 16:56:43 HKT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (34 commits) target/i386: Mask CMPLegacy bit in CPUID[0x80000001].ECX for Zhaoxin CPUs target/i386: Introduce Zhaoxin Yongfeng CPU model target/i386: Add CPUID leaf 0xC000_0001 EDX definitions target/i386: Add support for Zhaoxin CPU vendor identification target/riscv: move 128-bit check to TCG realize target/riscv: remove unused macro DEFINE_CPU i386/cpu: add has_caches flag to check smp_cache configuration i386/pc: Support cache topology in -machine for PC machine i386/cpu: Update cache topology with machine's configuration i386/cpu: Support module level cache topology rust: qom: get rid of ClassInitImpl rust: pl011, qemu_api tests: do not use ClassInitImpl rust: qom: add ObjectImpl::CLASS_INIT rust: add SysBusDeviceImpl rust: add IsA bounds to QOM implementation traits target/i386/hvf: drop some dead code target/i386/hvf: move and rename simulate_{rdmsr, wrmsr} target/i386/hvf: move and rename {load, store}_regs target/i386/hvf: use x86_segment in x86_decode.c target/i386/hvf: fix the declaration of hvf_handle_io ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * i386/cpu: add has_caches flag to check smp_cache configurationAlireza Sanaee2025-02-251-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Add has_caches flag to SMPCompatProps, which helps in avoiding extra checks for every single layer of caches in x86 (and ARM in future). Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com> Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Link: https://lore.kernel.org/r/20250110145115.1574345-6-zhao1.liu@intel.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | hw/core/machine.c: Make -machine dumpdtb=file.dtb with no DTB an errorPeter Maydell2025-02-251-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently if the user requests via -machine dumpdtb=file.dtb that we dump the DTB, but the machine doesn't have a DTB, we silently ignore the option. This is confusing to users, and is a legacy of the old board-specific implementation of the option, where if the execution codepath didn't go via a call to qemu_fdt_dumpdtb() we would never handle the option. Now we handle the option in one place in machine.c, we can provide the user with a useful message if they asked us to dump a DTB when none exists. qmp_dumpdtb() already produces this error; remove the logic in handle_machine_dumpdtb() that was there specifically to avoid hitting it. While we're here, beef up the error message a bit with a hint, and make it consistent about "an FDT" rather than "a FDT". (In the qmp_dumpdtb() case this needs an ERRP_GUARD to make error_append_hint() work when the caller passes error_fatal.) Note that the three places where we might report "doesn't have an FDT" are hit in different situations: (1) in handle_machine_dumpdtb(), if CONFIG_FDT is not set: this is because the QEMU binary was built without libfdt at all. The build system will not let you build with a machine type that needs an FDT but no libfdt, so here we know both that the machine doesn't use FDT and that QEMU doesn't have the support: (2) in the device_tree-stub.c qmp_dumpdtb(): this is used when we had libfdt at build time but the target architecture didn't enable any machines which did "select DEVICE_TREE", so here we know that the machine doesn't use FDT. (3) in qmp_dumpdtb(), if current_machine->fdt is NULL all we know is that this machine never set it. That might be because it doesn't use FDT, or it might be because the user didn't pass an FDT on the command line and the machine doesn't autogenerate an FDT. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2733 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250206151214.2947842-7-peter.maydell@linaro.org
* | hw: Centralize handling of -machine dumpdtb optionPeter Maydell2025-02-241-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently we handle the 'dumpdtb' machine sub-option ad-hoc in every board model that has an FDT. It's up to the board code to make sure it calls qemu_fdt_dumpdtb() in the right place. This means we're inconsistent and often just ignore the user's command line argument: * if the board doesn't have an FDT at all * if the board supports FDT, but there happens not to be one present (usually because of a missing -fdt option) This isn't very helpful because it gives the user no clue why their option was ignored. However, in order to support the QMP/HMP dumpdtb commands we require now that every FDT machine stores a pointer to the FDT in MachineState::fdt. This means we can handle -machine dumpdtb centrally by calling the qmp_dumpdtb() function, unifying its handling with the QMP/HMP commands. All the board code calls to qemu_fdt_dumpdtb() can then be removed. For this commit we retain the existing behaviour that if there is no FDT we silently ignore the -machine dumpdtb option. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
* | hw/mips/boston: Support dumpdtb monitor commandsPeter Maydell2025-02-241-17/+21
|/ | | | | | | | | | | | | | | | | | | | | | | | The boston machine doesn't set MachineState::fdt to the DTB blob that it has loaded or created, which means that the QMP/HMP dumpdtb monitor commands don't work. Setting MachineState::fdt is easy in the non-FIT codepath: we can simply do so immediately before loading the DTB into guest memory. The FIT codepath is a bit more awkward as currently the FIT loader throws away the memory that the FDT was in after it loads it into guest memory. So we add a void *pfdt argument to load_fit() for it to store the FDT pointer into. There is some readjustment required of the pointer handling in loader-fit.c, so that it applies 'const' only where it should (e.g. the data pointer we get back from fdt_getprop() is const, because it's into the middle of the input FDT data, but the pointer that fit_load_image_alloc() should not be const, because it's freshly allocated memory that the caller can change if it likes). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250206151214.2947842-5-peter.maydell@linaro.org
* Merge tag 'mem-next-pull-request' of https://gitlab.com/peterx/qemu into stagingStefan Hajnoczi2025-02-192-5/+10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Memory pull request for 10.0 v2 changelog: - Fix Mac (and possibly some other) build issues for two patches - os: add an ability to lock memory on_fault - memory: pass MemTxAttrs to memory_access_is_direct() List of features: - William's fix on ram hole punching when with file offset - Daniil's patchset to introduce mem-lock=on-fault - William's hugetlb hwpoison fix for size report & remap - David's series to allow qemu debug writes to MMIOs # -----BEGIN PGP SIGNATURE----- # # iIgEABYKADAWIQS5GE3CDMRX2s990ak7X8zN86vXBgUCZ6zcQBIccGV0ZXJ4QHJl # ZGhhdC5jb20ACgkQO1/MzfOr1wbL3wEAqx94NpB/tEEBj6WXE3uV9LqQ0GCTYmV+ # MbM51Vep8ksA/35yFn3ltM2yoSnUf9WJW6LXEEKhQlwswI0vChQERgkE # =++O1 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 13 Feb 2025 01:37:04 HKT # gpg: using EDDSA key B9184DC20CC457DACF7DD1A93B5FCCCDF3ABD706 # gpg: issuer "peterx@redhat.com" # gpg: Good signature from "Peter Xu <xzpeter@gmail.com>" [full] # gpg: aka "Peter Xu <peterx@redhat.com>" [full] # Primary key fingerprint: B918 4DC2 0CC4 57DA CF7D D1A9 3B5F CCCD F3AB D706 * tag 'mem-next-pull-request' of https://gitlab.com/peterx/qemu: overcommit: introduce mem-lock=on-fault system: introduce a new MlockState enum system/vl: extract overcommit option parsing into a helper os: add an ability to lock memory on_fault system/physmem: poisoned memory discard on reboot system/physmem: handle hugetlb correctly in qemu_ram_remap() physmem: teach cpu_memory_rw_debug() to write to more memory regions hmp: use cpu_get_phys_page_debug() in hmp_gva2gpa() memory: pass MemTxAttrs to memory_access_is_direct() physmem: disallow direct access to RAM DEVICE in address_space_write_rom() physmem: factor out direct access check into memory_region_supports_direct_access() physmem: factor out RAM/ROMD check in memory_access_is_direct() physmem: factor out memory_region_is_ram_device() check in memory_access_is_direct() system/physmem: take into account fd_offset for file fallocate Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * physmem: teach cpu_memory_rw_debug() to write to more memory regionsDavid Hildenbrand2025-02-121-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Right now, we only allow for writing to memory regions that allow direct access using memcpy etc; all other writes are simply ignored. This implies that debugging guests will not work as expected when writing to MMIO device regions. Let's extend cpu_memory_rw_debug() to write to more memory regions, including MMIO device regions. Reshuffle the condition in memory_access_is_direct() to make it easier to read and add a comment. While this change implies that debug access can now also write to MMIO devices, we now are also permit ELF image loads and similar users of cpu_memory_rw_debug() to write to MMIO devices; currently we ignore these writes. Peter assumes [1] that there's probably a class of guest images, which will start writing junk (likely zeroes) into device model registers; we previously would silently ignore any such bogus ELF sections. Likely these images are of questionable correctness and this can be ignored. If ever a problem, we could make these cases use address_space_write_rom() instead, which is left unchanged for now. This patch is based on previous work by Stefan Zabka. [1] https://lore.kernel.org/all/CAFEAcA_2CEJKFyjvbwmpt=on=GgMVamQ5hiiVt+zUr6AY3X=Xg@mail.gmail.com/ Resolves: https://gitlab.com/qemu-project/qemu/-/issues/213 Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com> Link: https://lore.kernel.org/r/20250210084648.33798-8-david@redhat.com Signed-off-by: Peter Xu <peterx@redhat.com>
| * memory: pass MemTxAttrs to memory_access_is_direct()David Hildenbrand2025-02-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | We want to pass another flag that will be stored in MemTxAttrs. So pass MemTxAttrs directly. Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Link: https://lore.kernel.org/r/20250210084648.33798-6-david@redhat.com [peterx: Fix MacOS builds] Signed-off-by: Peter Xu <peterx@redhat.com>
* | Merge tag 'hw-misc-20250216' of https://github.com/philmd/qemu into stagingStefan Hajnoczi2025-02-164-24/+49
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Misc HW patches - Use qemu_hexdump_line() in TPM backend (Philippe) - Remove magic number in APIC (Phil) - Disable thread-level cache topology (Zhao) - Xen QOM style cleanups (Bernhard) - Introduce TYPE_DYNAMIC_SYS_BUS_DEVICE (Philippe) - Invert logic of machine no_sdcard flag (Philippe) - Housekeeping in MicroBlaze functional tests (Philippe) - Prevent out-of-bound access in SMC91C111 RX path (Peter) - Declare more fields / arguments as const (Philippe) - Introduce EndianMode QAPI enum (Philippe) - Make various Xilinx devices endianness configurable (Philippe) - Mark some devices memory regions as little-endian (Philippe) - Allow execution RX gdbsim machine without BIOS/kernel (Keith) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmeyUY8ACgkQ4+MsLN6t # wN7OQQ/+PwMfwJUjmkUYgS2E4RMEQFq3LVeY7hRcsga/F0EAQV5ksn9f8nqkWu7b # vkXIxcatWb1dgpkqIYRPG/PuAELIub9ZFpc57TNVvFZiGzqtOg1rXSAinDEtb8oL # fMB/HnLGLScOaIeWa7d7t58oOnpO6yAYZi/BYiByKnToHO4nkfu3yNIB290Tjia0 # npbundH3Gmk8B+LmcFpqXqj0KyDZNxHw8WMh8nba+mhp0gp0z5hlOKoaGgSzNW4f # Az1sjeKCVVcMf+C01tfO5V8NHQdqFQovqcua+wMoWd9we3JuIHFkhTpZHxWUvW/l # e8ovqXBfFv++TqjNb1tZJMwYqM2mBH7txqOoZmWXcnihISURIa4GkwtNOLMx0HGk # omxZYLnsVbrHivdelzNB1ipVehhqD37/lW1Tq8b+bMfCGFF2coXWyx10pyXZTB+P # 6Xyd9QWcCTQPXMgIHJ28DU8s+bIHERdPHQVtaaBSahggFm/suR+gBanCxCiGfbA/ # 8/AFolptCaxRh4OoXOFft+SOcjsURCWHSDAVK64rp7yRc4D/nEnXb79d4sthDRuG # DKvaO4D03QYIo79Bas+u687lEwQ7fiecFtt6iI0fHe5MiJG0ZymAkwmWe7UnnUZF # VvqkjRjapjphASxPKVnXAzLXBL3rCL27VeTlaXO5Qk34Jf9d1J4= # =URn3 # -----END PGP SIGNATURE----- # gpg: Signature made Sun 16 Feb 2025 15:58:55 EST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'hw-misc-20250216' of https://github.com/philmd/qemu: (39 commits) hw/rx: Allow execution without either bios or kernel hw/pci-host: Mark versatile regions as little-endian hw/mips: Mark Loonson3 Virt machine devices as little-endian hw/mips: Mark Boston machine devices as little-endian hw/arm: Mark Allwinner Technology devices as little-endian hw/ssi/xilinx_spi: Make device endianness configurable hw/char/xilinx_uartlite: Make device endianness configurable hw/timer/xilinx_timer: Make device endianness configurable hw/net/xilinx_ethlite: Make device endianness configurable hw/intc/xilinx_intc: Make device endianness configurable hw/qdev-properties-system: Introduce EndianMode QAPI enum hw: Make class data 'const' hw: Declare various const data as 'const' tests/functional: Remove sleep() kludges from microblaze tests tests/functional: Allow microblaze tests to take a machine name argument tests/functional: Explicit endianness of microblaze assets hw/net/smc91c111: Ignore attempt to pop from empty RX fifo hw/riscv/opentitan: Include missing 'exec/address-spaces.h' header hw/boards: Ensure machine setting auto_create_sdcard expose a SD Bus hw/riscv: Remove all invalid uses of auto_create_sdcard=true ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * | hw/qdev-properties-system: Introduce EndianMode QAPI enumPhilippe Mathieu-Daudé2025-02-161-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce the EndianMode type and the DEFINE_PROP_ENDIAN() macros. Endianness can be BIG, LITTLE or unspecified (default). Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250213122217.62654-2-philmd@linaro.org>
| * | hw/boards: Rename no_sdcard -> auto_create_sdcardPhilippe Mathieu-Daudé2025-02-161-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Invert the 'no_sdcard' logic, renaming it as the more explicit "auto_create_sdcard". Machines are supposed to create a SD Card drive when this flag is set. In many cases it doesn't make much sense (as boards don't expose SD Card host controller), but this is patch only aims to expose that nonsense; so no logical change intended (mechanical patch using gsed). Most of the changes are: - mc->no_sdcard = ON_OFF_AUTO_OFF; + mc->auto_create_sdcard = true; Except in . hw/core/null-machine.c . hw/arm/xilinx_zynq.c . hw/s390x/s390-virtio-ccw.c where the disabled option is manually removed (since default): - mc->no_sdcard = ON_OFF_AUTO_ON; + mc->auto_create_sdcard = false; - mc->auto_create_sdcard = false; and in system/vl.c we change the 'default_sdcard' type to boolean. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20250204200934.65279-4-philmd@linaro.org>
| * | hw/boards: Convert no_sdcard flag to OnOffAuto tri-statePhilippe Mathieu-Daudé2025-02-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MachineClass::no_sdcard is initialized as false by default. To catch all uses, convert it to a tri-state, having the current default (false) becoming AUTO. No logical change intended. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20250204200934.65279-2-philmd@linaro.org>
| * | hw/sysbus: Introduce TYPE_DYNAMIC_SYS_BUS_DEVICEPhilippe Mathieu-Daudé2025-02-161-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some TYPE_SYS_BUS_DEVICEs can be optionally dynamically plugged on the TYPE_PLATFORM_BUS_DEVICE. Rather than sometimes noting that with comment around the 'user_creatable = true' line in each DeviceRealize handler, introduce an abstract TYPE_DYNAMIC_SYS_BUS_DEVICE class. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alexander Graf <graf@amazon.com> Reviewed-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com> Message-Id: <20250125181343.59151-4-philmd@linaro.org>
| * | hw/sysbus: Declare QOM types using DEFINE_TYPES() macroPhilippe Mathieu-Daudé2025-02-161-23/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When multiple QOM types are registered in the same file, it is simpler to use the the DEFINE_TYPES() macro. In particular because type array declared with such macro are easier to review. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alexander Graf <graf@amazon.com> Reviewed-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com> Reviewed-by: Bernhard Beschow <shentey@gmail.com> Message-Id: <20250125181343.59151-3-philmd@linaro.org>
| * | hw/sysbus: Use sizeof(BusState) in main_system_bus_create()Philippe Mathieu-Daudé2025-02-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than using the obscure system_bus_info.instance_size, directly use sizeof(BusState). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alexander Graf <graf@amazon.com> Reviewed-by: Clément Mathieu--Drif<clement.mathieu--drif@eviden.com> Message-Id: <20250125181343.59151-2-philmd@linaro.org>
| * | hw/core/machine: Reject thread level cacheZhao Liu2025-02-161-0/+7
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, neither i386 nor ARM have real hardware support for per- thread cache, and there is no clear demand for this specific cache topology. Additionally, since ARM even can't support this special cache topology in device tree, it is unnecessary to support it at this moment, even though per-thread cache might have potential scheduling benefits for VMs without CPU affinity. Therefore, disable thread-level cache topology in the general machine part. At present, i386 has not enabled SMP cache, so disabling the thread parameter does not pose compatibility issues. In the future, if there is a clear demand for this feature, the correct approach would be to add a new control field in MachineClass.smp_props and enable it only for the machines that require it. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250110145115.1574345-2-zhao1.liu@intel.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
* / migration/multifd: Add a compat property for TLS terminationFabiano Rosas2025-02-141-0/+1
|/ | | | | | | | | | | | | | | | | | | | | We're currently changing the way the source multifd migration handles the shutdown of the multifd channels when TLS is in use to perform a clean termination by calling gnutls_bye(). Older src QEMUs will always close the channel without terminating the TLS session. New dst QEMUs treat an unclean termination as an error. Add multifd_clean_tls_termination (default true) that can be switched on the destination whenever a src QEMU <= 9.2 is in use. (Note that the compat property is only strictly necessary for src QEMUs older than 9.1. Due to synchronization coincidences, src QEMUs 9.1 and 9.2 can put the destination in a condition where it doesn't see the unclean termination. Still, make the property more inclusive to facilitate potential backports.) Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Fabiano Rosas <farosas@suse.de>
* qapi: Move include/qapi/qmp/ to include/qobject/Daniel P. Berrangé2025-02-104-4/+4
| | | | | | | | | | | | | | | | | | | | | | The general expectation is that header files should follow the same file/path naming scheme as the corresponding source file. There are various historical exceptions to this practice in QEMU, with one of the most notable being the include/qapi/qmp/ directory. Most of the headers there correspond to source files in qobject/. This patch corrects most of that inconsistency by creating include/qobject/ and moving the headers for qobject/ there. This also fixes MAINTAINERS for include/qapi/qmp/dispatch.h: scripts/get_maintainer.pl now reports "QAPI" instead of "No maintainers found". Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Acked-by: Halil Pasic <pasic@linux.ibm.com> #s390x Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20241118151235.2665921-2-armbru@redhat.com> [Rebased]
* Merge tag 'hw-misc-20250131' of https://github.com/philmd/qemu into stagingStefan Hajnoczi2025-02-023-38/+20
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Misc HW patches - Remove uses of &first_cpu in rx-gdbsim and loongson3_virt machines (Philippe) - Convert few legacy qemu_allocate_irqs to qemu_init_irqs (Philippe) - Add tracing events in i2c-echo device (Titus) - Fix debug format string in USB EHCI (Zoltan) - Rework loader API to remove its target_words_bigendian() call (Philippe) - QOMify OMAP MMC device (Peter) - Remove legacy SD Card APIs (Peter) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmedOmkACgkQ4+MsLN6t # wN4qHhAAtL3vmk6hQgKD76bSaB3CDEdHsnS7qqeRVVmbr7pQL9D6yyXzkjJBzZtk # nG7ubhoS5WFeKswzD8tY/mgP25hntnq38TNrRxDrpRNdFYF+a2cncpRGfgzk0z/9 # nme/BuUx6fNowV8MVGLNOLvaDCeDHl9biTLJmcQyqwlHy9l9Wi6DSa6Xi9ZQWlHi # fxYVeuQ7HYlKwhiu3mqpfNeauIgMSWz8V48ETCrFnjMWmiF1k1L0GccWDS8zpPDk # QkdOxHC4eVMxk0d2458eUXeqo/izfzoc7Z9hW6W8cyI69y4m011xqANd/udTS03E # HMcG9Ks0E+Yw8NGoErOP7zu8yFVEzCn2BKhH/wrUHBC2UfP99vNR/b8LNkg25y19 # IItOkMban0Oyr9KaNb1Ga+3pZIsyyil+shSYNHpWkfqk+TUpZkMUSaVHA9r1oB3V # u/dOO/lPLaWMvftKVXRl3K/Lfz4WF5cWjza5RratnzbBqqwr03CwjjBEuZIX/5ww # ATj/fV10OSHScxCqauYp8uuNSgEOKaJCJe2uEMaLvxn/O9ka0FQZ5CLUJ0yIKs/t # Tg4sS0QLgmpaXwSnscKoVE7aHWNFT1WomHI4SjWbwUQhmm0DmPizBZ2yX8dnSR24 # ubtzmxNYFWScrUTGQvbMhkU6I+Sc0Ca8APmPxErNV2mzF4p3CPE= # =Jvwi # -----END PGP SIGNATURE----- # gpg: Signature made Fri 31 Jan 2025 16:02:33 EST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'hw-misc-20250131' of https://github.com/philmd/qemu: (36 commits) hw/sd: Remove unused SDState::enable hw/sd: Remove unused legacy functions, stop killing mammoths hw/sd: Remove unused 'enable' method from SDCardClass hw/sd/omap_mmc: Untabify hw/sd/omap_mmc: Remove unused coverswitch qemu_irq hw/arm/omap1: Inline creation of MMC hw/sd/omap_mmc: Use similar API for "wire up omap_clk" to other OMAP devices hw/sd/omap_mmc: Convert to SDBus API hw/sd/omap_mmc: Convert output qemu_irqs to gpio and sysbus IRQ APIs hw/sd/omap_mmc: Convert remaining 'struct omap_mmc_s' uses to OMAPMMCState hw/sd/omap_mmc: Do a minimal conversion to QDev hw/loader: Pass ELFDATA endian order argument to load_elf() hw/loader: Pass ELFDATA endian order argument to load_elf_as() hw/loader: Pass ELFDATA endian order argument to load_elf_ram_sym() hw/loader: Clarify local variable name in load_elf_ram_sym() hw/loader: Remove unused load_elf_ram() hw/avr/boot: Replace load_elf_ram_sym() -> load_elf_as() hw/usb/hcd-ehci: Fix debug printf format string hw/misc/i2c-echo: add tracing hw/char/pci-multi: Convert legacy qemu_allocate_irqs to qemu_init_irq ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * hw/loader: Pass ELFDATA endian order argument to load_elf()Philippe Mathieu-Daudé2025-01-311-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than passing a boolean 'is_big_endian' argument, directly pass the ELFDATA, which can be unspecified using the ELFDATANONE value. Update the call sites: 0 -> ELFDATA2LSB 1 -> ELFDATA2MSB TARGET_BIG_ENDIAN -> TARGET_BIG_ENDIAN ? ELFDATA2MSB : ELFDATA2LSB Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250127113824.50177-7-philmd@linaro.org>
| * hw/loader: Pass ELFDATA endian order argument to load_elf_as()Philippe Mathieu-Daudé2025-01-312-9/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than passing a boolean 'is_big_endian' argument, directly pass the ELFDATA, which can be unspecified using the ELFDATANONE value. Update the call sites: 0 -> ELFDATA2LSB 1 -> ELFDATA2MSB Note, this allow removing the target_words_bigendian() call in the GENERIC_LOADER device, where we pass ELFDATANONE. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250127113824.50177-6-philmd@linaro.org>
| * hw/loader: Pass ELFDATA endian order argument to load_elf_ram_sym()Philippe Mathieu-Daudé2025-01-311-10/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than passing a boolean 'is_big_endian' argument, directly pass the ELFDATA, which can be unspecified using the ELFDATANONE value. Update the call sites: 0 -> ELFDATA2LSB Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250127113824.50177-5-philmd@linaro.org>