index
:
focaccia-qemu
this commit
master
sr/plugin
ta/focaccia
Unnamed repository; edit this file 'description' to name the repository.
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
hw
/
intc
/
sifive_plic.c
(
follow
)
Commit message (
Expand
)
Author
Age
Files
Lines
*
hw/intc: sifive_plic: Fix the pending register range check
Bin Meng
2023-01-06
1
-2
/
+3
*
hw/intc: sifive_plic: Change "priority-base" to start from interrupt source 0
Bin Meng
2023-01-06
1
-2
/
+3
*
hw/intc: sifive_plic: Update "num-sources" property default value
Bin Meng
2023-01-06
1
-1
/
+7
*
hw/intc: sifive_plic: Use error_setg() to propagate the error up via errp in ...
Bin Meng
2023-01-06
1
-3
/
+4
*
hw/intc: sifive_plic: Improve robustness of the PLIC config parser
Bin Meng
2023-01-06
1
-8
/
+16
*
hw/intc: sifive_plic: Drop PLICMode_H
Bin Meng
2023-01-06
1
-1
/
+0
*
hw/intc: sifive_plic: fix out-of-bound access of source_priority array
Jim Shu
2023-01-06
1
-1
/
+11
*
hw/intc: sifive_plic: Renumber the S irqs for numa support
Frédéric Pétrot
2023-01-06
1
-2
/
+2
*
hw/intc: sifive_plic: change interrupt priority register to WARL field
Jim Shu
2022-10-14
1
-2
/
+19
*
hw/intc: sifive_plic: fix hard-coded max priority level
Jim Shu
2022-10-14
1
-2
/
+4
*
hw/intc: sifive_plic: Fix multi-socket plic configuraiton
Atish Patra
2022-07-28
1
-2
/
+2
*
hw/intc: sifive_plic: Avoid overflowing the addr_config buffer
Alistair Francis
2022-06-10
1
-10
/
+9
*
target/riscv: Support start kernel directly by KVM
Yifei Jiang
2022-01-21
1
-5
/
+15
*
hw/intc: sifive_plic: Cleanup remaining functions
Alistair Francis
2022-01-08
1
-87
/
+22
*
hw/intc: sifive_plic: Cleanup the read function
Alistair Francis
2022-01-08
1
-44
/
+11
*
hw/intc: sifive_plic: Cleanup the write function
Alistair Francis
2022-01-08
1
-49
/
+27
*
hw/intc: sifive_plic: Add a reset function
Alistair Francis
2022-01-08
1
-0
/
+18
*
hw/intc: sifive_plic: Cleanup the irq_request function
Alistair Francis
2021-10-22
1
-6
/
+4
*
hw/intc: sifive_plic: Cleanup the realize function
Alistair Francis
2021-10-22
1
-21
/
+24
*
hw/intc: sifive_plic: Move the properties
Alistair Francis
2021-10-22
1
-15
/
+15
*
hw/intc: sifive_plic: Convert the PLIC to use RISC-V CPU GPIO lines
Alistair Francis
2021-09-21
1
-7
/
+23
*
Do not include hw/boards.h if it's not really necessary
Thomas Huth
2021-05-02
1
-1
/
+0
*
Do not include sysemu/sysemu.h if it's not really necessary
Thomas Huth
2021-05-02
1
-1
/
+0
*
target/riscv: Add sifive_plic vmstate
Yifei Jiang
2020-11-03
1
-1
/
+25
*
qemu/atomic.h: rename atomic_ to qatomic_
Stefan Hajnoczi
2020-09-23
1
-2
/
+2
*
hw/riscv: Move sifive_plic model to hw/intc
Bin Meng
2020-09-09
1
-0
/
+524