summary refs log tree commit diff stats
path: root/hw/intc (follow)
Commit message (Expand)AuthorAgeFilesLines
...
* hw/intc: Add LoongArch ls7a msi interrupt controller support(PCH-MSI)Xiaojuan Yang2022-06-064-0/+82
* hw/intc: Add LoongArch ls7a interrupt controller support(PCH-PIC)Xiaojuan Yang2022-06-064-0/+445
* hw/loongarch: Add LoongArch ipi interrupt support(IPI)Xiaojuan Yang2022-06-064-0/+250
* pnv/xive2: Don't overwrite PC registers when writing TCTXT registersFrederic Barrat2022-05-261-3/+0
* hw/intc: Pass correct hartid while updating mtimecmpAtish Patra2022-05-241-1/+2
* hw/intc/arm_gicv3: Provide ich_num_aprs()Peter Maydell2022-05-191-6/+10
* hw/intc/arm_gicv3: Use correct number of priority bits for the CPUPeter Maydell2022-05-192-4/+16
* hw/intc/arm_gicv3: Support configurable number of physical priority bitsPeter Maydell2022-05-191-54/+128
* hw/intc/arm_gicv3_kvm.c: Stop using GIC_MIN_BPR constantPeter Maydell2022-05-191-3/+13
* hw/intc/arm_gicv3: report correct PRIbits field in ICV_CTLR_EL1Peter Maydell2022-05-191-1/+1
* hw/intc/arm_gicv3_cpuif: Handle CPUs that don't specify GICv3 parametersPeter Maydell2022-05-191-5/+13
* ppc/xive: Update the state of the External interrupt signalFrederic Barrat2022-05-052-0/+16
* ppc/xive: Always recompute the PIPR when pushing an OS contextFrederic Barrat2022-05-052-10/+17
* target/arm: Replace sentinels with ARRAY_SIZE in cpregs.hRichard Henderson2022-05-052-6/+0
* target/arm: Split out cpregs.hRichard Henderson2022-05-052-0/+3
* hw/intc: Vectored Interrupt Controller (VIC)Amir Gonnen2022-04-263-0/+317
* Merge tag 'pull-target-arm-20220422-1' of https://git.linaro.org/people/pmayd...Richard Henderson2022-04-229-242/+1508
|\
| * hw/intc/arm_gicv3: Allow 'revision' property to be set to 4Peter Maydell2022-04-222-5/+12
| * hw/intc/arm_gicv3: Update ID and feature registers for GICv4Peter Maydell2022-04-226-12/+32
| * hw/intc/arm_gicv3_redist: Implement gicv3_redist_inv_vlpi()Peter Maydell2022-04-221-2/+5
| * hw/intc/arm_gicv3_redist: Implement gicv3_redist_vinvall()Peter Maydell2022-04-221-1/+7
| * hw/intc/arm_gicv3_redist: Implement gicv3_redist_mov_vlpi()Peter Maydell2022-04-221-2/+18
| * hw/intc/arm_gicv3_redist: Use set_pending_table_bit() in mov handlingPeter Maydell2022-04-221-8/+1
| * hw/intc/arm_gicv3_redist: Implement gicv3_redist_vlpi_pending()Peter Maydell2022-04-221-2/+21
| * hw/intc/arm_gicv3_redist: Implement gicv3_redist_process_vlpi()Peter Maydell2022-04-221-4/+44
| * hw/intc/arm_gicv3_redist: Factor out "update bit in pending table" codePeter Maydell2022-04-221-19/+30
| * hw/intc/arm_gicv3_redist: Recalculate hppvlpi on VPENDBASER writesPeter Maydell2022-04-221-3/+84
| * hw/intc/arm_gicv3_redist: Factor out "update hpplpi for all LPIs" logicPeter Maydell2022-04-221-20/+46
| * hw/intc/arm_gicv3_redist: Factor out "update hpplpi for one LPI" logicPeter Maydell2022-04-221-27/+47
| * hw/intc/arm_gicv3_cpuif: Don't recalculate maintenance irq unnecessarilyPeter Maydell2022-04-221-5/+5
| * hw/intc/arm_gicv3_cpuif: Support vLPIsPeter Maydell2022-04-225-6/+137
| * hw/intc/arm_gicv3_cpuif: Split "update vIRQ/vFIQ" from gicv3_cpuif_virt_update()Peter Maydell2022-04-223-25/+53
| * hw/intc/arm_gicv3: Implement new GICv4 redistributor registersPeter Maydell2022-04-223-0/+99
| * hw/intc/arm_gicv3: Implement GICv4's new redistributor framePeter Maydell2022-04-223-5/+26
| * hw/intc/arm_gicv3_its: Implement VINVALLPeter Maydell2022-04-224-0/+45
| * hw/intc/arm_gicv3_its: Implement VMOVIPeter Maydell2022-04-224-0/+116
| * hw/intc/arm_gicv3_its: Implement INV for virtual interruptsPeter Maydell2022-04-223-2/+31
| * hw/intc/arm_gicv3_its: Implement INV command properlyPeter Maydell2022-04-224-2/+74
| * hw/intc/arm_gicv3_its: Implement VSYNCPeter Maydell2022-04-223-0/+13
| * hw/intc/arm_gicv3_its: Implement VMOVPPeter Maydell2022-04-223-0/+85
| * hw/intc/arm_gicv3: Keep pointers to every connected ITSPeter Maydell2022-04-223-0/+6
| * hw/intc/arm_gicv3_its: Handle virtual interrupts in process_its_cmd()Peter Maydell2022-04-224-2/+125
| * hw/intc/arm_gicv3_its: Split out process_its_cmd() physical interrupt codePeter Maydell2022-04-221-17/+32
| * hw/intc/arm_gicv3_its: Factor out CTE lookup sequencePeter Maydell2022-04-221-70/+39
| * hw/intc/arm_gicv3_its: Factor out "find ITE given devid, eventid"Peter Maydell2022-04-221-50/+54
| * hw/intc/arm_gicv3_its: Distinguish success and error cases of CMD_CONTINUEPeter Maydell2022-04-221-13/+16
| * hw/intc/arm_gicv3_its: Implement VMAPPPeter Maydell2022-04-223-0/+102
| * hw/intc/arm_gicv3_its: Implement VMAPI and VMAPTIPeter Maydell2022-04-223-0/+102
| * hw/intc/arm_gicv3_its: Implement GITS_BASER2 for GICv4Peter Maydell2022-04-222-0/+41
| * hw/intc/arm_gicv3_its: Factor out "is intid a valid LPI ID?"Peter Maydell2022-04-221-3/+7