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path: root/hw/misc/stm32l4x5_rcc.c (follow)
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* hw/misc/pll: Do not expose as user-creatablePhilippe Mathieu-Daudé2025-03-311-0/+4
* include/hw/qdev-properties: Remove DEFINE_PROP_END_OF_LISTRichard Henderson2024-12-191-1/+0
* hw/misc: Constify all PropertyRichard Henderson2024-12-151-1/+1
* hw/misc/stm32l4x5_rcc: Add validation for MCOPRE and MCOSEL valuesZheyu Ma2024-08-131-8/+20
* hw, target: Add ResetType argument to hold and exit phase methodsPeter Maydell2024-04-251-5/+5
* hw/misc/stm32l4x5_rcc: Propagate period when enabling a clockArnaud Minier2024-03-261-1/+1
* hw/misc/stm32l4x5_rcc: Inline clock_update() in clock_mux_update()Philippe Mathieu-Daudé2024-03-261-1/+6
* hw/misc/stm32l4x5_rcc: Add write protections to CR registerArnaud Minier2024-03-051-50/+114
* hw/misc/stm32l4x5_rcc: Handle Register UpdatesArnaud Minier2024-03-051-12/+512
* hw/misc/stm32l4x5_rcc: Initialize PLLs and clock multiplexersArnaud Minier2024-03-051-17/+128
* hw/misc/stm32l4x5_rcc: Add an internal PLL Clock objectArnaud Minier2024-03-051-0/+176
* hw/misc/stm32l4x5_rcc: Add an internal clock multiplexer objectArnaud Minier2024-03-051-0/+160
* hw/misc/stm32l4x5_rcc: Implement STM32L4x5_RCC skeletonArnaud Minier2024-03-051-0/+446