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* pnv/phb4: Delete unused "pnv-phb4-pec-stack" devicesMarkus Armbruster2020-06-151-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The number of stacks is controlled by property "num-stacks". pnv_pec_instance_init() creates the maximum supported number, because the property has not been set then. pnv_pec_realize() realizes only the wanted number. Works, although it can leave unrealized devices hanging around in the QOM composition tree. Affects machine powernv9. Delete the unused devices by making pnv_pec_realize() unparent them. Visible in "info qom-tree": /machine (powernv9-machine) /chip[0] (power9_v2.0-pnv-chip) [...] /pec[0] (pnv-phb4-pec) /stack[0] (pnv-phb4-pec-stack) [...] - /stack[1] (pnv-phb4-pec-stack) - /phb (pnv-phb4) - /pcie-mmcfg-mmio[0] (qemu:memory-region) - /root (pnv-phb4-root-port) - /source (xive-source) - /stack[2] (pnv-phb4-pec-stack) - /phb (pnv-phb4) - /pcie-mmcfg-mmio[0] (qemu:memory-region) - /root (pnv-phb4-root-port) - /source (xive-source) /xscom-pec-0.0-nest[0] (qemu:memory-region) /xscom-pec-0.0-pci[0] (qemu:memory-region) /pec[1] (pnv-phb4-pec) /stack[0] (pnv-phb4-pec-stack) [...] /stack[1] (pnv-phb4-pec-stack) [...] - /stack[2] (pnv-phb4-pec-stack) - /phb (pnv-phb4) - /pcie-mmcfg-mmio[0] (qemu:memory-region) - /root (pnv-phb4-root-port) - /source (xive-source) /xscom-pec-0.1-nest[0] (qemu:memory-region) /xscom-pec-0.1-pci[0] (qemu:memory-region) /pec[2] (pnv-phb4-pec) /stack[0] (pnv-phb4-pec-stack) [...] /stack[1] (pnv-phb4-pec-stack) [...] /stack[2] (pnv-phb4-pec-stack) [...] Cc: Cédric Le Goater <clg@kaod.org> Cc: David Gibson <david@gibson.dropbear.id.au> Cc: qemu-ppc@nongnu.org Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20200609122339.937862-12-armbru@redhat.com>
* pnv/phb4: Fix error path in pnv_pec_realize()Greg Kurz2020-02-211-1/+1
| | | | | | | | | | | Obviously, we want to pass &local_err so that we can check it then line below, not errp. Reported-by: Coverity CID 1419395 'Constant' variable guards dead code Fixes: 4f9924c4d4cf "ppc/pnv: Add models for POWER9 PHB4 PCIe Host bridge" Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <158153364605.3229002.2796177658957390343.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* ppc/pnv: change the PowerNV machine devices to be non user creatableCédric Le Goater2020-02-021-0/+2
| | | | | | | | | | | | | | | | The PowerNV machine emulates an OpenPOWER system and the PowerNV chip devices are models of the internal logic of the POWER processor. They can not be instantiated by the user on the QEMU command line. The PHB3/PHB4 devices could be an exception in the future after some rework on how the device tree is built. For the moment, exclude them also. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20200129113720.7404-1-clg@kaod.org> Tested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* ppc/pnv: Add models for POWER9 PHB4 PCIe Host bridgeBenjamin Herrenschmidt2020-02-021-0/+593
These changes introduces models for the PCIe Host Bridge (PHB4) of the POWER9 processor. It includes the PowerBus logic interface (PBCQ), IOMMU support, a single PCIe Gen.4 Root Complex, and support for MSI and LSI interrupt sources as found on a POWER9 system using the XIVE interrupt controller. POWER9 processor comes with 3 PHB4 PEC (PCI Express Controller) and each PEC can have several PHBs. By default, * PEC0 provides 1 PHB (PHB0) * PEC1 provides 2 PHBs (PHB1 and PHB2) * PEC2 provides 3 PHBs (PHB3, PHB4 and PHB5) Each PEC has a set "global" registers and some "per-stack" (per-PHB) registers. Those are organized in two XSCOM ranges, the "Nest" range and the "PCI" range, each range contains both some "PEC" registers and some "per-stack" registers. No default device layout is provided and PCI devices can be added on any of the available PCIe Root Port (pcie.0 .. 2 of a Power9 chip) with address 0x0 as the firwware (skiboot) only accepts a single device per root port. To run a simple system with a network and a storage adapters, use a command line options such as : -device e1000e,netdev=net0,mac=C0:FF:EE:00:00:02,bus=pcie.0,addr=0x0 -netdev bridge,id=net0,helper=/usr/libexec/qemu-bridge-helper,br=virbr0,id=hostnet0 -device megasas,id=scsi0,bus=pcie.1,addr=0x0 -drive file=$disk,if=none,id=drive-scsi0-0-0-0,format=qcow2,cache=none -device scsi-hd,bus=scsi0.0,channel=0,scsi-id=0,lun=0,drive=drive-scsi0-0-0-0,id=scsi0-0-0-0,bootindex=2 If more are needed, include a bridge. Multi chip is supported, each chip adding its set of PHB4 controllers and its PCI busses. The model doesn't emulate the EEH error handling. This model is not ready for hotplug yet. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [ clg: - numerous cleanups - commit log - fix for broken LSI support - PHB pic printinfo - large QOM rework ] Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20200127144506.11132-2-clg@kaod.org> [dwg: Use device_class_set_props()] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>