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* Merge tag 'pull-tcg-20240507' of https://gitlab.com/rth7680/qemu into stagingRichard Henderson2024-05-071-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | tcg: Add write_aofs to GVecGen3i tcg/i386: Simplify immediate 8-bit logical vector shifts tcg/i386: Optimize setcond of TST{EQ,NE} with 0xffffffff tcg/optimize: Optimize setcond with zmask accel/tcg: Introduce CF_BP_PAGE target/sh4: Update DisasContextBase.insn_start gitlab: Drop --static from s390x linux-user build gitlab: Streamline ubuntu-22.04-s390x # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmY6OoAdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8FEwf7Bhs9bV2Kp4LxUzGq # +dSHHc/WuCyIILLDQ4kZyXvILuI59wYhrWBUUTzBnAZ/tEf0oMG2y57F/lIcxz9w # VvsFicMOhtjQ8iBEfl/rkkaYs9BLcxqMTAA3PxNBE6l3bzjcHSTkhey4MoPGRibn # CkwaLzb2ebNjfgzC1IsNf/tyiMXl0tBQM7JVV4EztaOGEmqw8X0/PyVZDiC3WUNC # tf9yqiNIlgGkn7rj3sT/rNdi4xlzQybgrb1MCFT6z5cqsW2bwqivRpxHi4yulHKI # VhYA3kud+TX2ASukpibsSkA+9SbcH/qwOugPhPIu+KANsFUcVKL6Anzv6Ysl9kZ0 # +Wnbow== # =FJCW # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 May 2024 07:28:16 AM PDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * tag 'pull-tcg-20240507' of https://gitlab.com/rth7680/qemu: gitlab: Streamline ubuntu-22.04-s390x gitlab: Drop --static from s390x linux-user build gitlab: Drop --disable-libssh from ubuntu-22.04-s390x.yml target/sh4: Update DisasContextBase.insn_start accel/tcg: Introduce CF_BP_PAGE tcg/optimize: Optimize setcond with zmask tcg/i386: Optimize setcond of TST{EQ,NE} with 0xffffffff tcg/i386: Simplify immediate 8-bit logical vector shifts tcg: Add write_aofs to GVecGen3i Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * accel/tcg: Introduce CF_BP_PAGERichard Henderson2024-05-061-0/+1
| | | | | | | | | | | | | | | | Record the fact that we've found a breakpoint on the page in which a TranslationBlock is running. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | accel/tcg: Access tcg_cflags with getter / setterPhilippe Mathieu-Daudé2024-05-062-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Access the CPUState::tcg_cflags via tcg_cflags_has() and tcg_cflags_set() helpers. Mechanical change using the following Coccinelle spatch script: @@ expression cpu; expression flags; @@ - cpu->tcg_cflags & flags + tcg_cflags_has(cpu, flags) @@ expression cpu; expression flags; @@ - (tcg_cflags_has(cpu, flags)) + tcg_cflags_has(cpu, flags) @@ expression cpu; expression flags; @@ - cpu->tcg_cflags |= flags; + tcg_cflags_set(cpu, flags); Then manually moving the declarations, and adding both tcg_cflags_has() and tcg_cflags_set() definitions. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240427155714.53669-15-philmd@linaro.org>
* | exec/cpu: Extract page-protection definitions to page-protection.hPhilippe Mathieu-Daudé2024-05-063-30/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extract page-protection definitions from "exec/cpu-all.h" to "exec/page-protection.h". The list of files requiring the new header was generated using: $ git grep -wE \ 'PAGE_(READ|WRITE|EXEC|RWX|VALID|ANON|RESERVED|TARGET_.|PASSTHROUGH)' Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Nicholas Piggin <npiggin@gmail.com> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240427155714.53669-3-philmd@linaro.org>
* | exec/cpu: Remove duplicated PAGE_PASSTHROUGH definitionPhilippe Mathieu-Daudé2024-05-061-6/+0
| | | | | | | | | | | | | | | | | | Missed in commit 58771921af ("include/exec: Move PAGE_* macros to common header"), PAGE_PASSTHROUGH ended being defined twice. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240427155714.53669-8-philmd@linaro.org>
* | exec/cpu: Remove obsolete PAGE_RESERVED definitionPhilippe Mathieu-Daudé2024-05-061-4/+0
| | | | | | | | | | | | | | | | | | | | We stopped using the PAGE_RESERVED definition in commit 50d25c8aec ("accel/tcg: Drop PAGE_RESERVED for CONFIG_BSD"). This completes commit 2e9a5713f0 ("Remove PAGE_RESERVED"). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240427155714.53669-7-philmd@linaro.org>
* | exec/cpu: Rename PAGE_BITS macro to PAGE_RWXBALATON Zoltan2024-05-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This macro can be used to abbreviate PAGE_READ | PAGE_WRITE | PAGE_EXEC for which PAGE_RWX is a better name and renaming it also shows it is not related to TARGET_PAGE_BITS. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240505121008.44A0D4E602D@zero.eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
* | exec/cpu: Indent TARGET_PAGE_foo definitionsPhilippe Mathieu-Daudé2024-05-061-12/+13
|/ | | | | | | | | The TARGET_PAGE_foo definitions are defined with multiple level of #ifdef'ry. Indent it a bit for clarity. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240427155714.53669-6-philmd@linaro.org>
* Merge tag 'accel-sh4-ui-20240503' of https://github.com/philmd/qemu into stagingRichard Henderson2024-05-034-299/+8
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Fix NULL dereference in NVMM & WHPX init_vcpu() - Move user emulation headers "exec/user" to "user" - Fix SH-4 ADDV / SUBV opcodes - Drop Cocoa compatility on macOS <= 10.12 - Update Anthony PERARD email # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmY1BE4ACgkQ4+MsLN6t # wN73jg//dbdHQU+4oM7BgTduDZn1ulKz5DtNEJawRP6vxIcSQ+Co2Yd+gdLOSXNI # 2BaoiOQ8cyDEHj1Uud3WVB0GsQYvHrqgXcjeHpX6yFFCZNyRvzEXizJPHKCtq+4e # XQFtfTFftlJdaKCLqyDqVnrVNRacFPm7kinrEQbTSmglAhwnyu3GwsokDAYiJTqp # g0n6mX/pWVEMDNY1HrDsk2Q/pyIZFmzhtuRyXRvi/bh8/BnmMCpySG+2463dnu1O # xIGr2w8ldc+mKn2w2k3wYKDnUHz/NhOkE86tL/ZxIgjCzeenZXwXNdzM+cuAmOZX # L9KIu5io6bTevYVwwHhd5/N6MCqVEhoRmsUQfF0CIkIzxXbyF14M89YHXZo3YJAd # n2uoJ7i6hF/4Pt6Uqlg09+vEk7onwrobnTPnbKHEKNWHNOMKXpq1CBxxcVz2qe24 # +CTAAOOhHqaTjODPSexzHZDZYxugCy1XSqps9AFF1HqUcmsPCL/PQ75YGTJJO0oF # 0V1Yvzjhin26AQS9SglIeXnHxYC26Cg2mXnUpVbryWnG888r0XAGpRl+FEuXK7Ln # /dGuCIWTozypSkG9304IlxlYsOoXhL11NZqINW+W/Tor3dMRQhWUQcHqv98Jl4Ad # rnpzZ0Dhd9ityZdbI0CCMZZZLY5dw1Rq5q407GTJr1CDU4PJBh0= # =N8q0 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 03 May 2024 08:35:42 AM PDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] * tag 'accel-sh4-ui-20240503' of https://github.com/philmd/qemu: ui/cocoa.m: Drop old macOS-10.12-and-earlier compat ifdefs target/sh4: Rename TCGv variables as manual for SUBV opcode target/sh4: Rename TCGv variables as manual for ADDV opcode target/sh4: Fix SUBV opcode target/sh4: Fix ADDV opcode MAINTAINERS: Update my email address plugins: Update stale comment plugins/api: Only include 'exec/ram_addr.h' with system emulation coverity: Update user emulation regexp user: Move 'thunk.h' from 'exec/user' to 'user' user: Move 'abitypes.h' from 'exec/user' to 'user' exec: Include missing license in 'exec/cpu-common.h' accel/whpx: Fix NULL dereference in whpx_init_vcpu() accel/nvmm: Fix NULL dereference in nvmm_init_vcpu() Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * user: Move 'thunk.h' from 'exec/user' to 'user'Philippe Mathieu-Daudé2024-05-031-209/+0
| | | | | | | | | | | | | | | | Keep all user emulation headers under the same user/ directory. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240428221450.26460-2-philmd@linaro.org>
| * user: Move 'abitypes.h' from 'exec/user' to 'user'Philippe Mathieu-Daudé2024-05-033-89/+2
| | | | | | | | | | | | | | | | Keep all user emulation headers under the same user/ directory. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240503125202.35667-1-philmd@linaro.org>
| * exec: Include missing license in 'exec/cpu-common.h'Philippe Mathieu-Daudé2024-05-031-2/+7
| | | | | | | | | | | | | | | | | | Commit 1ad2134f91 ("Hardware convenience library") extracted "cpu-common.h" from "cpu-all.h", which uses the LGPL-2.1+ license. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240427155714.53669-5-philmd@linaro.org>
* | plugins: Remove plugin helpersRichard Henderson2024-04-302-8/+0
| | | | | | | | | | | | | | These placeholder helpers are no longer required. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | plugins: Use emit_before_op for PLUGIN_GEN_FROM_MEMRichard Henderson2024-04-301-4/+0
| | | | | | | | | | | | | | | | | | Introduce a new plugin_mem_cb op to hold the address temp and meminfo computed by tcg-op-ldst.c. Because this now has its own opcode, we no longer need PLUGIN_GEN_FROM_MEM. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Pass function pointer to tcg_gen_call*Richard Henderson2024-04-301-8/+16
|/ | | | | | | | | | For normal helpers, read the function pointer from the structure earlier. For plugins, this will allow the function pointer to come from elsewhere. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* exec: Move CPUTLBEntry helpers to cputlb.cPhilippe Mathieu-Daudé2024-04-261-55/+0
| | | | | | | | | | | | | | | The following CPUTLBEntry helpers are only used in accel/tcg/cputlb.c: - tlb_index() - tlb_entry() - tlb_read_idx() - tlb_addr_write() Move them to this file, allowing to remove the huge "cpu.h" header inclusion from "exec/cpu_ldst.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240418192525.97451-13-philmd@linaro.org>
* exec: Restrict inclusion of 'user/guest-base.h'Philippe Mathieu-Daudé2024-04-262-3/+2
| | | | | | | | | | | | | | | | Declare 'have_guest_base' in "user/guest-base.h". Very few files require this header, so explicitly include it there instead of "exec/cpu-all.h" which is used in many source files. Assert this user-specific header is only included from user emulation. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231211212003.21686-23-philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng>
* exec: Rename 'exec/user/guest-base.h' as 'user/guest-base.h'Philippe Mathieu-Daudé2024-04-262-13/+1
| | | | | | | | | The include/user/ directory contains the user-emulation specific headers. Move guest-base.h there too. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20240418192525.97451-15-philmd@linaro.org>
* exec: Restrict 'cpu_ldst.h' to TCG acceleratorPhilippe Mathieu-Daudé2024-04-261-1/+5
| | | | | | | | | "exec/cpu_ldst.h" is specific to TCG, do not allow its inclusion from other accelerators. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240418192525.97451-6-philmd@linaro.org>
* exec: Restrict TCG specific declarations of 'cputlb.h'Philippe Mathieu-Daudé2024-04-261-0/+5
| | | | | | | | Avoid TCG specific declarations being used from non-TCG accelerators. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240418192525.97451-5-philmd@linaro.org>
* exec: Declare CPUBreakpoint/CPUWatchpoint type in 'breakpoint.h' headerPhilippe Mathieu-Daudé2024-04-261-0/+30
| | | | | | | | | | | | | The CPUBreakpoint and CPUWatchpoint structures are declared in "hw/core/cpu.h", which contains declarations related to CPUState and CPUClass. Some source files only require the BP/WP definitions and don't need to pull in all CPU* API. In order to simplify, create a new "exec/breakpoint.h" header. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20240418192525.97451-3-philmd@linaro.org>
* exec: Declare MMUAccessType type in 'mmu-access-type.h' headerPhilippe Mathieu-Daudé2024-04-263-0/+20
| | | | | | | | | | | | The MMUAccessType enum is declared in "hw/core/cpu.h". "hw/core/cpu.h" contains declarations related to CPUState and CPUClass. Some source files only require MMUAccessType and don't need to pull in all CPU* declarations. In order to simplify, create a new "exec/mmu-access-type.h" header. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240418192525.97451-2-philmd@linaro.org>
* exec: Declare abi_ptr type in its own 'abi_ptr.h' headerPhilippe Mathieu-Daudé2024-04-264-15/+41
| | | | | | | | | | | The abi_ptr type is declared in "exec/cpu_ldst.h" with all the load/store helpers. Some source files requiring abi_ptr type don't need the load/store helpers. In order to simplify, create a new "exec/abi_ptr.h" header. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231212123401.37493-21-philmd@linaro.org>
* exec/user: Do not include 'cpu.h' in 'abitypes.h'Philippe Mathieu-Daudé2024-04-261-1/+6
| | | | | | | | | | | | | | | | | "exec/user/abitypes.h" requires: - "exec/cpu-defs.h" (TARGET_LONG_BITS) - "exec/tswap.h" (tswap32) In order to avoid "cpu.h", pick the minimum required headers. Assert this user-specific header is only included from user emulation. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231212123401.37493-20-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
* exec: Move [b]tswapl() declarations to 'exec/user/tswap-target.h'Philippe Mathieu-Daudé2024-04-262-8/+1
| | | | | | | | | | | tswapl() and bswaptls() are target-dependent and only used by user emulation. Move their definitions to a new header: "exec/user/tswap-target.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20231212123401.37493-17-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
* exec: Declare target_words_bigendian() in 'exec/tswap.h'Philippe Mathieu-Daudé2024-04-261-1/+11
| | | | | | | | | | | | | | We usually check target endianess before swapping values, so target_words_bigendian() declaration makes sense in "exec/tswap.h" with the target swapping helpers. Remove "hw/core/cpu.h" when it was only included to get the target_words_bigendian() declaration. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20231212123401.37493-16-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
* exec/cpu-all: Remove unused tswapls() definitionsPhilippe Mathieu-Daudé2024-04-261-2/+0
| | | | | | | | | | Last use of tswapls() was removed 2 years ago in commit aee14c77f4 ("linux-user: Rewrite do_getdents, do_getdents64"). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20231212123401.37493-15-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
* exec/cpu-all: Remove unused 'qemu/thread.h' headerPhilippe Mathieu-Daudé2024-04-261-1/+0
| | | | | | | | | Nothing is required from "qemu/thread.h" in "exec/cpu-all.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20231212123401.37493-13-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
* exec/cpu-all: Reduce 'qemu/rcu.h' header inclusionPhilippe Mathieu-Daudé2024-04-262-1/+1
| | | | | | | | | "exec/cpu-all.h" doesn't need definitions from "qemu/rcu.h", however "exec/ram_addr.h" does. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231211212003.21686-17-philmd@linaro.org>
* accel/tcg: Rename helper-head.h -> helper-head.h.incPhilippe Mathieu-Daudé2024-04-264-3/+3
| | | | | | | | | | | | | | | | | | | Since commit 139c1837db ("meson: rename included C source files to .c.inc"), QEMU standard procedure for included C files is to use *.c.inc. Besides, since commit 6a0057aa22 ("docs/devel: make a statement about includes") this is documented in the Coding Style: If you do use template header files they should be named with the ``.c.inc`` or ``.h.inc`` suffix to make it clear they are being included for expansion. Therefore rename "exec/helper-head.h" as "exec/helper-head.h.inc". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240424173333.96148-4-philmd@linaro.org>
* accel/tcg: Un-inline retaddr helpers to 'user-retaddr.h'Philippe Mathieu-Daudé2024-04-261-26/+2
| | | | | | | | | | | | | | | set_helper_retaddr() is only used in accel/tcg/user-exec.c. clear_helper_retaddr() is only used in accel/tcg/cpu-exec.c and accel/tcg/user-exec.c. No need to expose their definitions to all user-emulation files including "exec/cpu_ldst.h", move them to a new "user-retaddr.h" header (restricted to accel/tcg/). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231211212003.21686-19-philmd@linaro.org>
* exec: Include 'cpu.h' before validating CPUArchState placementPhilippe Mathieu-Daudé2024-04-261-0/+1
| | | | | | | | | CPUArchState 'env' field is defined within the ArchCPU structure, so we need to include each target "cpu.h" header which defines it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Warner Losh <imp@bsdimp.com> Message-Id: <20231211212003.21686-2-philmd@linaro.org>
* exec: Reduce tlb_set_dirty() declaration scopePhilippe Mathieu-Daudé2024-04-261-1/+0
| | | | | | | | | | | tlb_set_dirty() is only used in accel/tcg/cputlb.c, where it is defined. Declare it statically, removing the stub. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240418192525.97451-11-philmd@linaro.org>
* exec: Rename NEED_CPU_H -> COMPILING_PER_TARGETPhilippe Mathieu-Daudé2024-04-265-9/+9
| | | | | | | | | | | | | | | | | | 'NEED_CPU_H' guard target-specific code; it is defined by meson altogether with the 'CONFIG_TARGET' definition. Rename NEED_CPU_H as COMPILING_PER_TARGET to clarify its meaning. Mechanical change running: $ sed -i s/NEED_CPU_H/COMPILING_PER_TARGET/g $(git grep -l NEED_CPU_H) then manually add a /* COMPILING_PER_TARGET */ comment after the '#endif' when the block is large. Inspired-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240322161439.6448-4-philmd@linaro.org>
* Merge tag 'housekeeping-20240424' of https://github.com/philmd/qemu into stagingRichard Henderson2024-04-242-4/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Removal of deprecated code - Remove the Nios II target and hardware - Remove pvrdma device and rdmacm-mux helper - Remove GlusterFS RDMA protocol handling - Update Sriram Yagnaraman mail address # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmYpE0YACgkQ4+MsLN6t # wN5PIA//egomANjRHAUAf9tdjljgT/JR49ejM7iInyxspR/xaiq0TlP2kP6aDNps # y1HAWBwfj5lGxeMgQ1mSKJGka3v2AIPWb7RbNT+9AaiWHv+sx5OrEytozUsFHLo8 # gSgRQocq0NY2a9dPbtkDqfbmq/rkCC7wgZzwroHsyOdiqYsWDKPJFleBDMjGmEaf # colhiDmhUPgvE3NNpwfEVNh/2SzxUxY8k5FHal6qij5z56ZqBglgnziDZEvGVCZ1 # uF4Hca/kh7TV2MVsdStPbGWZYDhJ/Np/2FnRoThD1Hc4qq8d/SH997m2F94tSOud # YeH54Vp5lmCeYgba5y8VP0ZPx/b9XnTtLvKggNdoqB+T2LBWPRt8kehqoaxvammF # ALzbY/t2vUxL6nIVbosOaTyqVOXvynk3/Js5S0jbnlu+vP2WvvFEzfYKIs2DIA8w # z56o/rG4KfyxF0aDB+CvLNwtJS8THqeivPqmYoKTdN9FPpN2RyBNLITrKo389ygF # 3oWy3+xsKGIPdNFY0a4l25xntqWNhND89ejzyL9M6G1cQ9RdEmTIUGTrinPQQmfP # oHIJMBeTdj7EqPL4LB3BR/htw9U5PobeMNYKFsRkS39PjGDqba5wbIdk3w5/Rcxa # s/PKdspDKWPwZ5jhcLD0qxAGJFnqM2UFjPo+U8qyI3RXKXFAn0E= # =c8Aj # -----END PGP SIGNATURE----- # gpg: Signature made Wed 24 Apr 2024 07:12:22 AM PDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] * tag 'housekeeping-20240424' of https://github.com/philmd/qemu: block/gluster: Remove deprecated RDMA protocol handling hw/rdma: Remove deprecated pvrdma device and rdmacm-mux helper hw/timer: Remove the ALTERA_TIMER model target/nios2: Remove the deprecated Nios II target MAINTAINERS: Update Sriram Yagnaraman mail address Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * target/nios2: Remove the deprecated Nios II targetPhilippe Mathieu-Daudé2024-04-242-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Nios II target is deprecated since v8.2 in commit 9997771bc1 ("target/nios2: Deprecate the Nios II architecture"). Remove: - Buildsys / CI infra - User emulation - System emulation (10m50-ghrd & nios2-generic-nommu machines) - Tests Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Marek Vasut <marex@denx.de> Message-Id: <20240327144806.11319-3-philmd@linaro.org>
* | Merge tag 'migration-20240423-pull-request' of ↵Richard Henderson2024-04-232-3/+9
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.com/peterx/qemu into staging Migration pull for 9.1 - Het's new test cases for "channels" - Het's fix for a typo for vsock parsing - Cedric's VFIO error report series - Cedric's one more patch for dirty-bitmap error reports - Zhijian's rdma deprecation patch - Yuan's zeropage optimization to fix double faults on anon mem - Zhijian's COLO fix on a crash # -----BEGIN PGP SIGNATURE----- # # iIgEABYKADAWIQS5GE3CDMRX2s990ak7X8zN86vXBgUCZig4HxIccGV0ZXJ4QHJl # ZGhhdC5jb20ACgkQO1/MzfOr1wbQiwD/V5nSJzSuAG4Ra1Fjo+LRG2TT6qk8eNCi # fIytehSw6cYA/0wqarxOF0tr7ikeyhtG3w4xFf44kk6KcPkoVSl1tqoL # =pJmQ # -----END PGP SIGNATURE----- # gpg: Signature made Tue 23 Apr 2024 03:37:19 PM PDT # gpg: using EDDSA key B9184DC20CC457DACF7DD1A93B5FCCCDF3ABD706 # gpg: issuer "peterx@redhat.com" # gpg: Good signature from "Peter Xu <xzpeter@gmail.com>" [unknown] # gpg: aka "Peter Xu <peterx@redhat.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B918 4DC2 0CC4 57DA CF7D D1A9 3B5F CCCD F3AB D706 * tag 'migration-20240423-pull-request' of https://gitlab.com/peterx/qemu: (26 commits) migration/colo: Fix bdrv_graph_rdlock_main_loop: Assertion `!qemu_in_coroutine()' failed. migration/multifd: solve zero page causing multiple page faults migration: Add Error** argument to add_bitmaps_to_list() migration: Modify ram_init_bitmaps() to report dirty tracking errors migration: Add Error** argument to xbzrle_init() migration: Add Error** argument to ram_state_init() memory: Add Error** argument to the global_dirty_log routines migration: Introduce ram_bitmaps_destroy() memory: Add Error** argument to .log_global_start() handler migration: Add Error** argument to .load_setup() handler migration: Add Error** argument to .save_setup() handler migration: Add Error** argument to qemu_savevm_state_setup() migration: Add Error** argument to vmstate_save() migration: Always report an error in ram_save_setup() migration: Always report an error in block_save_setup() vfio: Always report an error in vfio_save_setup() s390/stattrib: Add Error** argument to set_migrationmode() handler tests/qtest/migration: Fix typo for vsock in SocketAddress_to_str tests/qtest/migration: Add negative tests to validate migration QAPIs tests/qtest/migration: Add multifd_tcp_plain test using list of channels instead of uri ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | migration/multifd: solve zero page causing multiple page faultsYuan Liu2024-04-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implemented recvbitmap tracking of received pages in multifd. If the zero page appears for the first time in the recvbitmap, this page is not checked and set. If the zero page has already appeared in the recvbitmap, there is no need to check the data but directly set the data to 0, because it is unlikely that the zero page will be migrated multiple times. Signed-off-by: Yuan Liu <yuan1.liu@intel.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/r/20240401154110.2028453-2-yuan1.liu@intel.com [peterx: touch up the comment, as the bitmap is used outside postcopy now] Signed-off-by: Peter Xu <peterx@redhat.com>
| * | memory: Add Error** argument to the global_dirty_log routinesCédric Le Goater2024-04-231-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the log_global*() handlers take an Error** parameter and return a bool, do the same for memory_global_dirty_log_start() and memory_global_dirty_log_stop(). The error is reported in the callers for now and it will be propagated in the call stack in the next changes. To be noted a functional change in ram_init_bitmaps(), if the dirty pages logger fails to start, there is no need to synchronize the dirty pages bitmaps. colo_incoming_start_dirty_log() could be modified in a similar way. Cc: Stefano Stabellini <sstabellini@kernel.org> Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Paul Durrant <paul@xen.org> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: David Hildenbrand <david@redhat.com> Cc: Hyman Huang <yong.huang@smartx.com> Signed-off-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Acked-by: Peter Xu <peterx@redhat.com> Link: https://lore.kernel.org/r/20240320064911.545001-12-clg@redhat.com Signed-off-by: Peter Xu <peterx@redhat.com>
| * | memory: Add Error** argument to .log_global_start() handlerCédric Le Goater2024-04-231-1/+4
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify all .log_global_start() handlers to take an Error** parameter and return a bool. Adapt memory_global_dirty_log_start() to interrupt on the first error the loop on handlers. In such case, a rollback is performed to stop dirty logging on all listeners where it was previously enabled. Cc: Stefano Stabellini <sstabellini@kernel.org> Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Paul Durrant <paul@xen.org> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: David Hildenbrand <david@redhat.com> Signed-off-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Link: https://lore.kernel.org/r/20240320064911.545001-10-clg@redhat.com [peterx: modify & enrich the comment for listener_add_address_space() ] Signed-off-by: Peter Xu <peterx@redhat.com>
* | physmem: Introduce ram_block_discard_guest_memfd_range()Xiaoyao Li2024-04-231-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When memory page is converted from private to shared, the original private memory is back'ed by guest_memfd. Introduce ram_block_discard_guest_memfd_range() for discarding memory in guest_memfd. Based on a patch by Isaku Yamahata <isaku.yamahata@intel.com>. Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Michael Roth <michael.roth@amd.com> Message-ID: <20240320083945.991426-12-michael.roth@amd.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | RAMBlock: Add support of KVM private guest memfdXiaoyao Li2024-04-233-4/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add KVM guest_memfd support to RAMBlock so both normal hva based memory and kvm guest memfd based private memory can be associated in one RAMBlock. Introduce new flag RAM_GUEST_MEMFD. When it's set, it calls KVM ioctl to create private guest_memfd during RAMBlock setup. Allocating a new RAM_GUEST_MEMFD flag to instruct the setup of guest memfd is more flexible and extensible than simply relying on the VM type because in the future we may have the case that not all the memory of a VM need guest memfd. As a benefit, it also avoid getting MachineState in memory subsystem. Note, RAM_GUEST_MEMFD is supposed to be set for memory backends of confidential guests, such as TDX VM. How and when to set it for memory backends will be implemented in the following patches. Introduce memory_region_has_guest_memfd() to query if the MemoryRegion has KVM guest_memfd allocated. Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-ID: <20240320083945.991426-7-michael.roth@amd.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | confidential guest support: Add kvm_init() and kvm_reset() in classXiaoyao Li2024-04-231-1/+33
|/ | | | | | | | | | | | | | | | Different confidential VMs in different architectures all have the same needs to do their specific initialization (and maybe resetting) stuffs with KVM. Currently each of them exposes individual *_kvm_init() functions and let machine code or kvm code to call it. To facilitate the introduction of confidential guest technology from different x86 vendors, add two virtual functions, kvm_init() and kvm_reset() in ConfidentialGuestSupportClass, and expose two helpers functions for invodking them. Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> Message-Id: <20240229060038.606591-1-xiaoyao.li@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* accel/tcg: Improve can_do_io managementRichard Henderson2024-04-091-1/+0
| | | | | | | | | | | | | | | | | | | | | | We already attempted to set and clear can_do_io before the first and last insns, but only used the initial value of max_insns and the call to translator_io_start to find those insns. Now that we track insn_start in DisasContextBase, and now that we have emit_before_op, we can wait until we have finished translation to identify the true first and last insns and emit the sets of can_do_io at that time. This fixes the case of a translation block which crossed a page boundary, and for which the second page turned out to be mmio. In this case we truncate the block, and the previous logic for can_do_io could leave a block with a single insn with can_do_io set to false, which would fail an assertion in cpu_io_recompile. Reported-by: Jørgen Hansen <Jorgen.Hansen@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Jørgen Hansen <Jorgen.Hansen@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Add insn_start to DisasContextBaseRichard Henderson2024-04-091-0/+3
| | | | | | | | | This is currently target-specific for many; begin making it target independent. Tested-by: Jørgen Hansen <Jorgen.Hansen@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* physmem: Fix migration dirty bitmap coherency with TCG memory accessNicholas Piggin2024-03-121-0/+3
| | | | | | | | | | | | | | | | | | | | | The fastpath in cpu_physical_memory_sync_dirty_bitmap() to test large aligned ranges forgot to bring the TCG TLB up to date after clearing some of the dirty memory bitmap bits. This can result in stores though the TCG TLB not setting the dirty memory bitmap and ultimately causes memory corruption / lost updates during migration from a TCG host. Fix this by calling cpu_physical_memory_dirty_bits_cleared() when dirty bits have been cleared. Fixes: aa8dc044772 ("migration: synchronize memory bitmap 64bits at a time") Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Tested-by: Thomas Huth <thuth@redhat.com> Message-ID: <20240219061731.232570-1-npiggin@gmail.com> [PMD: Split patch in 2: part 2/2, slightly adapt description] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Link: https://lore.kernel.org/r/20240312201458.79532-4-philmd@linaro.org Signed-off-by: Peter Xu <peterx@redhat.com>
* physmem: Factor cpu_physical_memory_dirty_bits_cleared() outNicholas Piggin2024-03-121-0/+9
| | | | | | | | | | | Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Tested-by: Thomas Huth <thuth@redhat.com> Message-ID: <20240219061731.232570-1-npiggin@gmail.com> [PMD: Split patch in 2: part 1/2] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Link: https://lore.kernel.org/r/20240312201458.79532-3-philmd@linaro.org Signed-off-by: Peter Xu <peterx@redhat.com>
* physmem: Expose tlb_reset_dirty_range_all()Philippe Mathieu-Daudé2024-03-121-0/+1
| | | | | | | | | | In order to call tlb_reset_dirty_range_all() outside of system/physmem.c, expose its prototype. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Link: https://lore.kernel.org/r/20240312201458.79532-2-philmd@linaro.org Signed-off-by: Peter Xu <peterx@redhat.com>
* Merge tag 'pull-target-arm-20240305' of ↵Peter Maydell2024-03-052-13/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * raspi: Implement Broadcom Serial Controller (BSC) for BCM2835 boards * hw/char/pl011: Add support for loopback * STM32L4x5: Implement RCC clock control device * target/arm: Do memory type alignment checks * atomic.h: Reword confusing comment for qatomic_cmpxchg * qemu-options.hx: Don't claim "-serial" has limit of 4 serial ports # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmXnI4gZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3p5ED/wOtAHA3PK+WbQhVhnji3+k # gdhvVcldf+HLaI2v4tfaW152xjY80/j3PQFNkzptoXENA9U51F47oNYOIfULLZZX # FTKmw/mjTBc2LqJ8gLpS8Wkr/PFtDq9JJzDwZd0MwguXpzIJp31JJpESvXlAqjjv # FhuAcqNNuGwI2SXCBmp2lPoEMn8ExLDoG9rmzjxVZeZCyzUjVnJYM61ykhC4ByvK # j5+/a7pUcpgHSX5cbq7kFloPOx3JXI5lS6xUKhGXXk75qHRwiQIsxMcPq8PD1+ok # yrmp7cySwK8I7AlIPdDjpJmhU0OiBu+PkYiXmHlF2nvaUy6M0nVX2lSTzqj6VpVV # 7yYhvWXHrtIA9AUspqTRsX7tP7iMJkco7qWfKSzYl+3pTbxS4+rEoee4jNR3hqsU # lbWC47sNVtTN507qIL1dcsu+BaeSsYVftfxtFql3odTqRB+ticsjDfKg69dRSFyk # SS0t8Zy3TdomcEoQkAv/ZSpkQnQUGavbRumCG58lJdiTwTuJUmGi1ufKBrD/GeKj # IlDEl9yvKiR8uvdjj6EQqr5kOj09mmN5nvokNsq5a4aNXBYoesszWK2xodzXE2x5 # M9DHJ3S8xnN++p1idS2bikwEklG1XVQ/q52bDXQkUmQSNerVS1PCvg9hzYqA+x53 # ihJtMcsmGVfxY8aQHyHweA== # =isAe # -----END PGP SIGNATURE----- # gpg: Signature made Tue 05 Mar 2024 13:52:08 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20240305' of https://git.linaro.org/people/pmaydell/qemu-arm: qemu-options.hx: Don't claim "-serial" has limit of 4 serial ports atomic.h: Reword confusing comment for qatomic_cmpxchg target/arm: Do memory type alignment check when translation enabled target/arm: Do memory type alignment check when translation disabled accel/tcg: Add TLB_CHECK_ALIGNED accel/tcg: Add tlb_fill_flags to CPUTLBEntryFull exec/memattrs: Remove target_tlb_bit* target/arm: Support 32-byte alignment in pow2_align tests/qtest/stm32l4x5_rcc-test.c: Add tests for the STM32L4x5_RCC hw/arm/stm32l4x5_soc.c: Use the RCC Sysclk hw/misc/stm32l4x5_rcc: Add write protections to CR register hw/misc/stm32l4x5_rcc: Handle Register Updates hw/misc/stm32l4x5_rcc: Initialize PLLs and clock multiplexers hw/misc/stm32l4x5_rcc: Add an internal PLL Clock object hw/misc/stm32l4x5_rcc: Add an internal clock multiplexer object hw/misc/stm32l4x5_rcc: Implement STM32L4x5_RCC skeleton hw/char/pl011: Add support for loopback tests/qtest: Add testcase for BCM2835 BSC hw/arm: Connect BSC to BCM2835 board as I2C0, I2C1 and I2C2 hw/i2c: Implement Broadcom Serial Controller (BSC) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * accel/tcg: Add TLB_CHECK_ALIGNEDRichard Henderson2024-03-051-1/+3
| | | | | | | | | | | | | | | | | | This creates a per-page method for checking of alignment. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240301204110.656742-5-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>