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* hw/ide/ahci: Move SysBus definitions to 'ahci-sysbus.h'Philippe Mathieu-Daudé2024-02-151-1/+1
| | | | | | | | | Keep "hw/ide/ahci.h" AHCI-generic. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20240213081201.78951-10-philmd@linaro.org>
* hw/arm: Add watchdog timer to Allwinner H40 and Bananapi boardGuenter Roeck2024-01-261-0/+3
| | | | | | | | | | | Add watchdog timer support to Allwinner-H40 and Bananapi. The watchdog timer is added as an overlay to the Timer module memory map. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Message-id: 20240115182757.1095012-4-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm: Add AHCI/SATA controller to Allwinner R40 and Bananapi boardGuenter Roeck2024-01-261-0/+3
| | | | | | | | | | Allwinner R40 supports an AHCI compliant SATA controller. Add support for it. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20240115182757.1095012-3-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm: Add EHCI/OHCI controllers to Allwinner R40 and Bananapi boardGuenter Roeck2024-01-261-0/+9
| | | | | | | | | | | | | | Allwinner R40 supports two USB host ports shared between a USB 2.0 EHCI host controller and a USB 1.1 OHCI host controller. Add support for both of them. If machine USB support is not enabled, create unimplemented devices for the USB memory ranges to avoid crashes when booting Linux. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240115182757.1095012-2-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/allwinner-r40: Remove 'hw/arm/boot.h' from headerPhilippe Mathieu-Daudé2023-10-271-1/+0
| | | | | | | | | | "hw/arm/boot.h" is only required on the source file. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Luc Michel <luc.michel@amd.com> Message-id: 20231025065316.56817-4-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw: arm: allwinner-sramc: Add SRAM Controller support for R40qianfan Zhao2023-06-061-0/+3
| | | | | | | | | Only a few important registers are added, especially the SRAM_VER register. Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw: arm: allwinner-r40: Add emac and gmac supportqianfan Zhao2023-06-061-0/+6
| | | | | | | | R40 has two ethernet controllers named as emac and gmac. The emac is compatibled with A10, and the GMAC is compatibled with H3. Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/allwinner-r40: add SDRAM controller deviceqianfan Zhao2023-06-061-1/+12
| | | | | | | | | | | Types of memory that the SDRAM controller supports are DDR2/DDR3 and capacities of up to 2GiB. This commit adds emulation support of the Allwinner R40 SDRAM controller. This driver only support 256M, 512M and 1024M memory now. Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw: arm: allwinner-r40: Add i2c0 deviceqianfan Zhao2023-06-061-0/+3
| | | | | | | | | | | TWI(i2c) is designed to be used as an interface between CPU host and the serial 2-Wire bus. It can support all standard 2-Wire transfer, can be operated in standard mode(100kbit/s) or fast-mode, supporting data rate up to 400kbit/s. Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw: allwinner-r40: Complete uart devicesqianfan Zhao2023-06-061-0/+8
| | | | | | | R40 has eight UARTs, support both 16450 and 16550 compatible modes. Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/allwinner-r40: add Clock Control Unitqianfan Zhao2023-06-061-0/+2
| | | | | | | | | | | | | The CCU provides the registers to program the PLLs and the controls most of the clock generation, division, distribution, synchronization and gating. This commit adds support for the Clock Control Unit which emulates a simple read/write register interface. Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw: arm: Add bananapi M2-Ultra and allwinner-r40 supportqianfan Zhao2023-06-061-0/+110
Allwinner R40 (sun8i) SoC features a Quad-Core Cortex-A7 ARM CPU, and a Mali400 MP2 GPU from ARM. It's also known as the Allwinner T3 for In-Car Entertainment usage, A40i and A40pro are variants that differ in applicable temperatures range (industrial and military). Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>