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| * KVM: Rename KVMMemoryListener.nr_used_slots to nr_slots_usedPeter Xu2024-10-171-1/+1
| | | | | | | | | | | | | | | | | | This will make all nr_slots counters to be named in the same manner. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Peter Xu <peterx@redhat.com> Link: https://lore.kernel.org/r/20240917163835.194664-4-peterx@redhat.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * KVM: Dynamic sized kvm memslots arrayPeter Xu2024-10-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zhiyi reported an infinite loop issue in VFIO use case. The cause of that was a separate discussion, however during that I found a regression of dirty sync slowness when profiling. Each KVMMemoryListerner maintains an array of kvm memslots. Currently it's statically allocated to be the max supported by the kernel. However after Linux commit 4fc096a99e ("KVM: Raise the maximum number of user memslots"), the max supported memslots reported now grows to some number large enough so that it may not be wise to always statically allocate with the max reported. What's worse, QEMU kvm code still walks all the allocated memslots entries to do any form of lookups. It can drastically slow down all memslot operations because each of such loop can run over 32K times on the new kernels. Fix this issue by making the memslots to be allocated dynamically. Here the initial size was set to 16 because it should cover the basic VM usages, so that the hope is the majority VM use case may not even need to grow at all (e.g. if one starts a VM with ./qemu-system-x86_64 by default it'll consume 9 memslots), however not too large to waste memory. There can also be even better way to address this, but so far this is the simplest and should be already better even than before we grow the max supported memslots. For example, in the case of above issue when VFIO was attached on a 32GB system, there are only ~10 memslots used. So it could be good enough as of now. In the above VFIO context, measurement shows that the precopy dirty sync shrinked from ~86ms to ~3ms after this patch applied. It should also apply to any KVM enabled VM even without VFIO. NOTE: we don't have a FIXES tag for this patch because there's no real commit that regressed this in QEMU. Such behavior existed for a long time, but only start to be a problem when the kernel reports very large nr_slots_max value. However that's pretty common now (the kernel change was merged in 2021) so we attached cc:stable because we'll want this change to be backported to stable branches. Cc: qemu-stable <qemu-stable@nongnu.org> Reported-by: Zhiyi Guo <zhguo@redhat.com> Tested-by: Zhiyi Guo <zhguo@redhat.com> Signed-off-by: Peter Xu <peterx@redhat.com> Acked-by: David Hildenbrand <david@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/r/20240917163835.194664-2-peterx@redhat.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | Merge tag 'pull-loongarch-20241016' of https://gitlab.com/gaosong/qemu into ↵Peter Maydell2024-10-172-3/+5
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging pull-loongarch-20241016 # -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZw91kQAKCRBAov/yOSY+ # 3+RyA/9vpqCesEBch5mzrazO4MT2IxeN2bstF8mY+EyfEwK7Ocg+esRBsigWw56k # y6RDyCzHg200GL9TC8bJ/nMiMJjXrahhHRPVs8AADazMzX/Ys7E7ntvUUnqqANh6 # ZX8fzNJMKW6qeUVrCIwCC7E+KjfNu32dcxbXCF4mZsehIumpUQ== # =uk+a # -----END PGP SIGNATURE----- # gpg: Signature made Wed 16 Oct 2024 09:13:05 BST # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF * tag 'pull-loongarch-20241016' of https://gitlab.com/gaosong/qemu: hw/loongarch/fw_cfg: Build in common_ss[] hw/loongarch/virt: Remove unnecessary 'cpu.h' inclusion target/loongarch: Avoid bits shift exceeding width of bool type hw/loongarch/virt: Add FDT table support with acpi ged pm register acpi: ged: Add macro for acpi sleep control register Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | hw/loongarch/virt: Remove unnecessary 'cpu.h' inclusionPhilippe Mathieu-Daudé2024-10-161-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240927213254.17552-2-philmd@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn>
| * | acpi: ged: Add macro for acpi sleep control registerBibo Mao2024-10-161-2/+5
| |/ | | | | | | | | | | | | | | | | | | | | Macro definition is added for acpi sleep control register, ged emulation driver can use the macro , also it can be used in FDT table if ged is exposed with FDT table. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20240918014206.2165821-2-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
* | Merge tag 'single-binary-20241015' of https://github.com/philmd/qemu into ↵Peter Maydell2024-10-165-7/+8
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging Remove some target-specific endianness knowledge from target/. For MIPS, propagate endianness at the board level, using QOM property. # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmcOihcACgkQ4+MsLN6t # wN4VaRAAor+5gUJiV0OOMQVfP8e1o9ssKcYy9m31zLeii1Iq2M/2oz6YK4OjdQDe # oJ8VRJvBPKC2Bpi14TfKsSGaP8CGNO/hdxcMi71pjHZC+bjHt5Uv0U/7T4XCBWuV # N+85juN1PTc4cci4FkGIXaPB1YWL00L56BDCzja0uhLF4+Xe2eYGVrPXeFCkN/3I # Ky7jHlB/dgzc47kTXvg5snCee2egDFf/x4igwZj6+gWJyo+jubRpwoOqKbK2M0Nd # VvNpBVFNGZMP3Fn9lh45uDOuRWGu6zSIPBVkjoFc+wdGsFsITIMrZ3h46UffsGTJ # F1j6Zsq6hoLbaNRRjZ6OsN6u683oo1lknmWauD62LrjXcX0RlRwRFbMD0AjedR8t # 6+YHg5LlwGg6r/AOtEe28ggXZohB2vjr2V0MJm1x/XgLYhFHoN3//jxn22oOHj4p # 0z3+eDc3Se8JNRV6jPMHbbuTqZqZjRgVFbYN3aMbdoXYzhpYnrPj6f7WQL2smiAW # C2vdswrubQWKou1wcn6rbg0nnMRVTh+GxrtZ3mkgaxNzgNFxsrX8YubMsh77XUcr # mnCGj1tE3hp40xsuSk6yZXY3ZZiTyZasvO1wq4gWOI9le0Zmq+d335F9+IVJ8RlP # YhA+MY5aeomsixVRdmrPrgOfanQiHXv02lsbperU8QFfGRhf2Y8= # =Qydb # -----END PGP SIGNATURE----- # gpg: Signature made Tue 15 Oct 2024 16:28:23 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'single-binary-20241015' of https://github.com/philmd/qemu: (33 commits) hw/mips: Have mips_cpu_create_with_clock() take an endianness argument hw/mips/cps: Set the vCPU 'cpu-big-endian' property target/mips: Expose MIPSCPU::is_big_endian property target/mips: Use tcg_constant_tl() instead of tcg_gen_movi_tl() target/mips: Use gen_op_addr_addi() when possible target/mips: Have gen_addiupc() expand $pc during translation target/mips: Replace MO_TE by mo_endian() target/mips: Introduce mo_endian() helper target/mips: Remove unused MEMOP_IDX() macro target/mips: Rename unused sysemu argument of OP_LD_ATOMIC() target/mips: Explode MO_TExx -> MO_TE | MO_xx target/mips: Factor mo_endian_rev() out of MXU code target/mips: Convert mips16e decr_and_load/store() macros to functions target/mips: Replace MO_TE by mo_endian_env() in get_pte() target/mips: Introduce mo_endian_env() helper target/mips: Rename cpu_is_bigendian() -> disas_is_bigendian() target/mips: Declare mips_env_is_bigendian() in 'internal.h' hw/xtensa/xtfpga: Remove TARGET_BIG_ENDIAN #ifdef'ry target/ppc: Use tcg_constant_tl() instead of tcg_gen_movi_tl() target/tricore: Use tcg_constant_tl() instead of tcg_gen_movi_tl() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/mips/cps: Set the vCPU 'cpu-big-endian' propertyPhilippe Mathieu-Daudé2024-10-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Have the CPS expose a 'cpu-big-endian' property so it can set it to the vCPUs it creates. Note, since the number of vCPUs created is dynamic, we can not use QOM aliases. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241010215015.44326-16-philmd@linaro.org>
| * gdbstub/helpers: Introduce ldtul_$endian_p() helpersPhilippe Mathieu-Daudé2024-10-151-0/+4
| | | | | | | | | | | | | | | | | | | | | | Introduce ldtul_le_p() and ldtul_be_p() to use directly in place of ldtul_p() when a target endianness is fixed. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241010175246.15779-3-philmd@linaro.org>
| * exec/memop: Remove unused memop_big_endian() helperPhilippe Mathieu-Daudé2024-10-151-6/+0
| | | | | | | | | | | | | | | | | | Last use of memop_big_endian() was removed in commit 592134617c9 ("accel/tcg: Reorg system mode store helpers"). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20241003234211.53644-3-philmd@linaro.org>
| * exec/tswap: Massage target_needs_bswap() definitionPhilippe Mathieu-Daudé2024-10-151-1/+1
| | | | | | | | | | | | | | | | | | | | Invert target_needs_bswap() comparison to match the COMPILING_PER_TARGET definition (2 lines upper). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241010175246.15779-2-philmd@linaro.org>
| * qemu/bswap: Undefine CPU_CONVERT() once donePhilippe Mathieu-Daudé2024-10-151-0/+2
| | | | | | | | | | | | | | | | | | Better undefined macros once we are done with them, like we do few lines later with DO_STN_LDN_P(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20241003234211.53644-2-philmd@linaro.org>
* | Merge tag 'pull-target-arm-20241015-1' of ↵Peter Maydell2024-10-1515-260/+291
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * hw/arm/omap1: Remove unused omap_uwire_attach() method * stm32f405: Add RCC device to stm32f405 SoC * arm/gicv3: add missing casts * hw/misc: Create STM32L4x5 SYSCFG clock * hw/arm: Add SPI to Allwinner A10 * hw/intc/omap_intc: Remove now-unnecessary abstract base class * hw/char/pl011: Use correct masks for IBRD and FBRD * docs/devel: Convert txt files to rST * Remove MAX111X, MAX7310, DSCM-1XXXX, pcmcia devices (used only by now-removed omap/pxa2xx boards) * vl.c: Remove pxa2xx-specific -portrait and -rotate options * dma: Fix function names in documentation * hw/arm/xilinx_zynq: Add various missing unimplemented devices # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmcOeWEZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3jCMD/482mpT1s+mrEJFWSJJXU4G # 8kr4Zj6+NafbayJ0vHTkpSbkEbPxuvDiUqmlnbI+3o11i+Z3IyiaGZbba7dyNnKl # 02MdQavL0dB+eMrcFNofRRvwvsposuj2ixgwTQe6L32HSFdHerVVwuhHM/wfwyCh # DKt7gPRovD/7CtwDOSpyW7cK64WK1IUlE8VEsbFdQbCPkopm55LQ2sLT4TshadpG # A6xcxyLN0x/lHgCmvijB1T09LSc1nQpUEQNIokC4f1Rmy6HNgGDYY1G7GAJf99mT # nWhATuuhZThiYfRbN5KQoS9tGEUduxtkGhHiOgpdXpgc3cS7RusCHoqAnibpsVh3 # TgAkaRAX1d/jQ2KYR2h2jI3nh66ObhrFRT3dkzRZrIvmK9zeWUKmS9lzZ94aVfPH # +MtBPwsO5OhzEABs8WpMY9V1nYaYDsFATMc1akUSaSLn1Er9Uz66NIk+J4Lob4P0 # 78IPvTmwvAIITiqQvkISsc37n5a2/toeaffU2hPKtQLlhyilWynEZA5YItrXSTuk # gYIBxyZSbzGj/ofZ9T9C0GDLbhJp9ksNIpIqRUiHOH3z9b85r7HVZORp+COw/ZXR # UGak6rpJ+XVOxVL/cPRTvZB0RbUHIZh7WLNH2G7Tfv4E4llqL81iuImHXVh/2CXO # 9GWr9qbDLDYQ+BI7ipLAYg== # =n2CA # -----END PGP SIGNATURE----- # gpg: Signature made Tue 15 Oct 2024 15:17:05 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20241015-1' of https://git.linaro.org/people/pmaydell/qemu-arm: (28 commits) hw/arm/xilinx_zynq: Add various missing unimplemented devices dma: Fix function names in documentation vl.c: Remove pxa2xx-specific -portrait and -rotate options hw/block: Remove ecc hw: Remove PCMCIA subsystem hw/ide: Remove DSCM-1XXXX microdrive device model hw/gpio: Remove MAX7310 device hw/adc: Remove MAX111X device docs/devel/lockcnt: Include kernel-doc API documentation include: Move QemuLockCnt APIs to their own header docs/devel/rcu: Convert to rST format docs/devel/multiple-iothreads: Convert to rST format docs/devel/lockcnt: Convert to rST format docs/devel/blkverify: Convert to rST format docs/devel/blkdebug: Convert to rST format hw/char/pl011: Use correct masks for IBRD and FBRD hw/intc/omap_intc: Remove now-unnecessary abstract base class hw/arm: Add SPI to Allwinner A10 hw/ssi: Allwinner A10 SPI emulation tests/qtest: Check STM32L4x5 clock connections ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * dma: Fix function names in documentationAkihiko Odaki2024-10-151-6/+5
| | | | | | | | | | | | | | | | | | Ensure the function names match. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-id: 20241012-dma-v2-1-6afddf5f3c8d@daynix.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * vl.c: Remove pxa2xx-specific -portrait and -rotate optionsPeter Maydell2024-10-151-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ``-portrait`` and ``-rotate`` options were documented as only working with the PXA LCD device, and all the machine types using that display device were removed in 9.2. These options were intended to simulate a mobile device being rotated by the user, and had three effects: * the display output was rotated by 90, 180 or 270 degrees (implemented in the PXA display device models) * the mouse/trackpad input was rotated the opposite way (implemented in generic code) * the machine model would signal to the guest about its orientation (implemented by e.g. the spitz machine model) Of these three things, the input-rotation was coded without being restricted to boards which supported the full set of device-rotation handling, so in theory the options were usable on other machine models with odd effects (rotating input but not display output). But this was never intended or documented behaviour, so we can reasonably drop these command line arguments without a formal deprecate-and-drop cycle for them. Remove the options, and their implementation and documentation. Describe the removal in removed-features.rst. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241003140010.1653808-7-peter.maydell@linaro.org
| * hw/block: Remove eccPeter Maydell2024-10-151-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | The ecc.c code was used only by the PXA2xx and OMAP2 SoC devices, which we have removed, so it is now completely unused. Note that hw/misc/eccmemctl.c does not in fact use any of the code frome ecc.c, so that KConfig dependency was incorrect. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241003140010.1653808-6-peter.maydell@linaro.org
| * hw: Remove PCMCIA subsystemPeter Maydell2024-10-151-63/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only PCMCIA subsystem was the PXA2xx SoC and the machines using it, which have now been removed. Although in theory we have a few machine types which have PCMCIA (e.g. kzm, the strongarm machines, sh4's sh7750), none of those machines implement their PCMCIA controller, and they're all old and no longer very interesting machine types. Rather than keeping all the PCMCIA code in-tree without any active users of it, delete it. If we need PCMCIA in future we can always resurrect it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241003140010.1653808-5-peter.maydell@linaro.org
| * hw/ide: Remove DSCM-1XXXX microdrive device modelPeter Maydell2024-10-151-3/+0
| | | | | | | | | | | | | | | | | | | | | | The DSCM-1XXXX microdrive device model was used only by the XScale-based Zaurus machine types. Now they have been removed, we can delete this device too. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241003140010.1653808-4-peter.maydell@linaro.org
| * hw/adc: Remove MAX111X devicePeter Maydell2024-10-151-56/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MAX111X ADC device was used only by the XScale-based Zaurus machine types. Now they have all been removed, we can drop this device model too. Because this device is an SSI device, in theory it could be created by users on the command line for boards with a different SSI controller, but we don't believe users are doing this -- it would be impossible on the command line to connect up the GPIO inputs which correspond to ADC inputs, or the GPIO output which is an interrupt line. The only example a web search produces for "device max1111" or "device max1110" is our own bug report https://gitlab.com/qemu-project/qemu/-/issues/2228 where it's used as an example of a bogus command that causes an assertion in an aspeed machine type that wasn't expecting anything other than flash devices on its SMC bus. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241003140010.1653808-2-peter.maydell@linaro.org
| * docs/devel/lockcnt: Include kernel-doc API documentationPeter Maydell2024-10-151-1/+1
| | | | | | | | | | | | | | | | | | Pull in the kernel-doc API documentation into the lockcnt docs. This requires us to fix one rST markup syntax error in the header file comments. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240816132212.3602106-8-peter.maydell@linaro.org
| * include: Move QemuLockCnt APIs to their own headerPeter Maydell2024-10-154-111/+132
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the QemuLockCnt data structure and associated functions are in the include/qemu/thread.h header. Move them to their own qemu/lockcnt.h. The main reason for doing this is that it means we can autogenerate the documentation comments into the docs/devel documentation. The copyright/author in the new header is drawn from lockcnt.c, since the header changes were added in the same commit as lockcnt.c; since neither thread.h nor lockcnt.c state an explicit license, the standard default of GPL-2-or-later applies. We include the new header (and the .c file, which was accidentally omitted previously) in the "RCU" part of MAINTAINERS, since that is where the lockcnt.rst documentation is categorized. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 20240816132212.3602106-7-peter.maydell@linaro.org
| * hw/intc/omap_intc: Remove now-unnecessary abstract base classPeter Maydell2024-10-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The OMAP interrupt controller code used to have an omap-intc class and an omap2-intc class, which shared common code via the abstract class common-omap-intc. Now we have deleted omap2-intc, we don't need the separate abstract base class; fold int into omap-intc. Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241003135323.1653230-1-peter.maydell@linaro.org
| * hw/arm: Add SPI to Allwinner A10Strahinja Jankovic2024-10-151-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | The Allwinner A10 SPI controller is added to the Allwinner A10 description, so it is available when Cubieboard is emulated. Update the documentation for Cubieboard to indicate SPI availability. Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Message-id: 20241001221349.8319-3-strahinja.p.jankovic@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/ssi: Allwinner A10 SPI emulationStrahinja Jankovic2024-10-151-0/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements Allwinner A10 SPI controller emulation. Only master-mode functionality is implemented. Since U-Boot and Linux SPI drivers for Allwinner A10 perform only byte-wide CPU access (no DMA) to the transmit and receive registers of the peripheral, the emulated controller does not implement DMA control, and supports only byte-wide access to transmit and receive registers (half-word and word accesses will be treated as byte accesses). Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Message-id: 20241001221349.8319-2-strahinja.p.jankovic@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/misc: Create STM32L4x5 SYSCFG clockInès Varhol2024-10-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | This commit creates a clock in STM32L4x5 SYSCFG and wires it up to the corresponding clock from STM32L4x5 RCC. Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Message-id: 20241003081105.40836-2-ines.varhol@telecom-paris.fr Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/stm32f405: Add RCC device to stm32f405 SoCRomán Cárdenas Rodríguez2024-10-151-0/+2
| | | | | | | | | | | | | | | | | | Add the reset and clock controller device to the stm32f405 SoC. Signed-off-by: Roman Cardenas Rodriguez <rcardenas.rod@gmail.com> [PMM: tweak commit message] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/misc/stm32_rcc: Implement RCC device for STM32F4 SoCsRomán Cárdenas Rodríguez2024-10-151-0/+91
| | | | | | | | | | | | | | | | | | | | | | Generic RCC class for STM32 devices. It can be used for most of the STM32 chips. Note that it only implements enable and reset capabilities. Signed-off-by: Roman Cardenas Rodriguez <rcardenas.rod@gmail.com> [PMM: tweaked commit message, added MAINTAINERS lines] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/omap1: Remove unused omap_uwire_attach() methodPhilippe Mathieu-Daudé2024-10-151-8/+0
| | | | | | | | | | | | | | | | | | | | | | The recently removed 'cheetah' machine was the single user of the omap_uwire_attach() method. Remove it altogether with the uWireSlave structure. Replace the send/receive callbacks by Unimplemented logging. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | Merge tag 'chr-pull-request' of https://gitlab.com/marcandre.lureau/qemu ↵Peter Maydell2024-10-151-1/+1
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging chardev patch queue # -----BEGIN PGP SIGNATURE----- # # iQJQBAABCAA6FiEEh6m9kz+HxgbSdvYt2ujhCXWWnOUFAmcOLLEcHG1hcmNhbmRy # ZS5sdXJlYXVAcmVkaGF0LmNvbQAKCRDa6OEJdZac5eTaD/0Strje27bLtepVKLQU # ZbD9X89G8lI2l87j9odwLjWcUEFCTVBhVgSCzrRdllWTlJoc5NVSUPQT9KcuWRpx # MOjaiR+BO/QnflAKN0GfxCQAnPfYb/29rIe2Xr8co8byVUuE32GPcAy+0xoScOHD # tpFbZegESsJ8MJN/pmYX83rt82mcNnCxIJxSxm7f4W8+3pdmFPsGQ8Ph+oVnz2n0 # Ag32e9rPUON6yeIZDyyc9Bn+JDxH+DsB8kK5N+KwoKvFIH3Knu725m8skwZvXjl0 # HmscpivJ4JS2N//Y0s891PaBFBzQOjWgv/EtBdW/LQZTcQdjaV4ZF1mUuom/oVPJ # ydtoJz44dkSC/dOf4J6uwWTk7PNCqlqQfHRuZqosedIAw9MFvBSq5NhfPTut2qKr # AWPu4r82zM18a/GEjRLPXCnF2APPGa56WhSxn8jGe+FIxcCADDCA9TAzSJLPMHJ8 # 5moXFmPXjYNrT/Wj4jsso73GCCGNPSNcJa+6/avn7SW8SjJGtpj3f7Qj5Aou5i+j # zsFyzFlAKnGQMBi1Qv4kfd4H87hqGvVahT9+uG/pKfvNQw1VB4dKMWSNs1Utiuim # sydt2VBwx6B923/6bmZ5HTbO5S9Hfep9jgwemPONNiIi5UeUCv6wTs0f8aallrv0 # idOZFmMK5JNn2NybEgALL1x6lg== # =+W1p # -----END PGP SIGNATURE----- # gpg: Signature made Tue 15 Oct 2024 09:49:53 BST # gpg: using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5 # gpg: issuer "marcandre.lureau@redhat.com" # gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full] # gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full] # Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5 * tag 'chr-pull-request' of https://gitlab.com/marcandre.lureau/qemu: tests/unit/test-char: implement a few mux remove test cases chardev/mux: implement detach of frontends from mux chardev/mux: switch mux frontends management to bitset chardev/mux: introduce `mux_chr_attach_frontend() call chardev/mux: convert size members to unsigned int chardev/mux: use bool type for `linestart` and `term_got_escape` chardev/chardev-internal: remove unused `max_size` struct member chardev/char: fix qemu_chr_is_busy() check Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * chardev/mux: convert size members to unsigned intRoman Penyaev2024-10-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no sense to keep `focus`, `mux_cnt`, `prod`, `cons` and `tag` variables as signed, those represent either size, either position in array, which both are unsigned. `focus` member of `MuxChardev` is kept signed, because initially set to -1. Signed-off-by: Roman Penyaev <r.peniaev@gmail.com> Cc: "Marc-André Lureau" <marcandre.lureau@redhat.com> Cc: qemu-devel@nongnu.org Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-ID: <20241014152408.427700-5-r.peniaev@gmail.com>
* | ui: refactor using a common qemu_pixman_shareableMarc-André Lureau2024-10-143-20/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | Use a common shareable type for win32 & unix, and helper functions. This simplify the code as it avoids a lot of #ifdef'ery. Note: if it helps review, commits could be reordered to introduce the common type before introducing shareable memory for unix. Suggested-by: Akihiko Odaki <akihiko.odaki@daynix.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-ID: <20241008125028.1177932-19-marcandre.lureau@redhat.com>
* | virtio-gpu: allocate shareable 2d resources on !win32Marc-André Lureau2024-10-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | Similar to what was done in commit 9462ff46 ("virtio-gpu/win32: allocate shareable 2d resources/images") for win32, allocate resource memory with memfd, so the associated display surface memory can be shared with a different process. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-ID: <20241008125028.1177932-18-marcandre.lureau@redhat.com>
* | ui/surface: allocate shared memory on !win32Marc-André Lureau2024-10-141-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Use qemu_memfd_alloc() to allocate the display surface memory, which will fallback on tmpfile/mmap() on systems without memfd, and allow to share the display with other processes. This is similar to how display memory is allocated on win32 since commit 09b4c198 ("console/win32: allocate shareable display surface"). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-ID: <20241008125028.1177932-13-marcandre.lureau@redhat.com>
* | ui/pixman: generalize shared_image_destroyMarc-André Lureau2024-10-141-1/+1
| | | | | | | | | | | | | | | | Learn to free memfd-allocated shared memory. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-ID: <20241008125028.1177932-10-marcandre.lureau@redhat.com>
* | ui/win32: fix potential use-after-free with dbus shared memoryMarc-André Lureau2024-10-141-0/+2
|/ | | | | | | | | | | | | | | | | | DisplaySurface may be free before the pixman image is freed, since the image is refcounted and used by different objects, including pending dbus messages. Furthermore, setting the destroy function in create_displaysurface_from() isn't appropriate, as it may not be used, and may be overriden as in ramfb. Set the destroy function when the shared handle is set, use the HANDLE directly for destroy data, using a single common helper qemu_pixman_win32_image_destroy(). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-ID: <20241008125028.1177932-5-marcandre.lureau@redhat.com>
* accel/tcg: Add TCGCPUOps.tlb_fill_alignRichard Henderson2024-10-133-2/+29
| | | | | | | | | | | | | | | | | Add a new callback to handle softmmu paging. Return the page details directly, instead of passing them indirectly to tlb_set_page. Handle alignment simultaneously with paging so that faults are handled with target-specific priority. Route all calls of the two hooks through a tlb_fill_align function local to cputlb.c. As yet no targets implement the new hook. As yet cputlb.c does not use the new alignment check. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* include/exec/memop: Introduce memop_atomicity_bitsRichard Henderson2024-10-131-0/+24
| | | | | | | | | Split out of mmu_lookup. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* include/exec/memop: Rename get_alignment_bitsRichard Henderson2024-10-131-2/+2
| | | | | | | | | | Rename to use "memop_" prefix, like other functions that operate on MemOp. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* include/exec/memop: Move get_alignment_bits from tcg.hRichard Henderson2024-10-132-23/+23
| | | | | | | | | This function is specific to MemOp, not TCG in general. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* include/exec: Introduce env_cpu_const()Ilya Leoshkevich2024-10-131-1/+12
| | | | | | | | | It's the same as env_cpu(), but for const objects. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-ID: <20240912093012.402366-2-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: remove singlestep_enabled from DisasContextBasePaolo Bonzini2024-10-131-2/+0
| | | | | | | | | | It is used in a couple of places only, both within the same target. Those can use the cflags just as well, so remove the separate field. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-ID: <20241010083641.1785069-1-pbonzini@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* Merge tag 'crypto-fixes-pull-request' of https://gitlab.com/berrange/qemu ↵Peter Maydell2024-10-102-0/+146
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging Introduce new cryptography hashing APIs # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE2vOm/bJrYpEtDo4/vobrtBUQT98FAmcH/iIACgkQvobrtBUQ # T9+Yjg/+NReYV5BDjOLk6vfgTsK6Ku0/hdis2cf9OS8Ud1VXzKaxfhwkchtw9QVI # kuAthesQNocEPfQfl2K4+f4oaKfysO7awDwYto/JhY/m1iCZ8iqofZWehOITszvM # EvWlNBr83NtpGFIwQWIxFEVZo42gaUnA69iAjBo7YQnE5xufJuPIbgMjB/O4/zar # Xlo15A69TP9dBJTvIDdrhkt3Quiysa7a68BW+piAAKvplOjOfugCEo3ebLwlZYOh # dK0Cg9v24+BMAqQ7kDMroS4uHC+OEs2AOvfYh01QqWxNkk7RsPjb9VAA60Ng89eC # 6BU4jw17zUAqL67of+M1cTTX4UPGBWGIUXt8CtO1DpByxiGXXfEkBrBmIyDJvxn9 # EzB4WpAXpVo2AG6vYpYSBGyxycWQs33ljfBb/qR6xu5PnA+Jc/jfJkVv5iYP96wW # F6pJm6FoK69aTJU7K4kAJPjD2fZum+iHVWc283NIkq9HQJLz2EYE0LIfOOY5feJK # S0tjEE5ZLqKG5JAdpsaCe5V/vExc512/D56Xb5fY4mC2DPb/b6fM66Oc5M7DTuK1 # LxCgnEuqm1Lo3CMR0k4W8Xezs7hWp+u3tr+i705l5qFxklYkmFeVAzTWdQ56JOGk # Z1XKUbcPUnweormPMxMQXyxXpey4DBwUGbjC98iqE8tjUg6NA3o= # =yVgk # -----END PGP SIGNATURE----- # gpg: Signature made Thu 10 Oct 2024 17:17:38 BST # gpg: using RSA key DAF3A6FDB26B62912D0E8E3FBE86EBB415104FDF # gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>" [full] # gpg: aka "Daniel P. Berrange <berrange@redhat.com>" [full] # Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E 8E3F BE86 EBB4 1510 4FDF * tag 'crypto-fixes-pull-request' of https://gitlab.com/berrange/qemu: tests/unit: Add a assert for test_io_channel_unix_listen_cleanup crypto: drop obsolete back compat logic for old nettle crypto/hashpriv: Remove old hash API function crypto/hash-afalg: Remove old hash API functions crypto/hash-nettle: Remove old hash API functions crypto/hash-gnutls: Remove old hash API functions crypto/hash-gcrypt: Remove old hash API functions crypto/hash-glib: Remove old hash API functions tests/unit/test-crypto-hash: accumulative hashing crypto/hash: Implement and use new hash API crypto/hash-afalg: Implement new hash API util/iov: Introduce iov_send_recv_with_flags() crypto/hash-nettle: Implement new hash API crypto/hash-gnutls: Implement new hash API crypto/hash-gcrypt: Implement new hash API crypto/hash-glib: Implement new hash API crypto: accumulative hashing API Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * util/iov: Introduce iov_send_recv_with_flags()Alejandro Zeise2024-10-101-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to support a new update function, a flag needs to be passed to the kernel via the socket send call (MSG_MORE) to notify it that more data is to be expected to calculate the hash correctly. Add a new iov helper for this purpose. Signed-off-by: Alejandro Zeise <alejandro.zeise@seagate.com> [ clg: - Split iov changes from original patch - Checkpatch fixes ] Signed-off-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
| * crypto: accumulative hashing APIAlejandro Zeise2024-10-101-0/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changes the hash API to support accumulative hashing. Hash objects are created with "qcrypto_hash_new", updated with data with "qcrypto_hash_update", and the hash obtained with "qcrypto_hash_finalize". These changes bring the hashing API more in line with the hmac API. Signed-off-by: Alejandro Zeise <alejandro.zeise@seagate.com> [ clg: - Changed documentation "non-zero on error" -> "-1 on error" ] Signed-off-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
* | Merge tag 'migration-20241009-pull-request' of ↵Peter Maydell2024-10-092-26/+0
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.com/peterx/qemu into staging Migration pull request - Ani's patch to complete the memory API on coalesced IO / eventfd notifies - Fabiano's Coverity fix on using pstrcpy() over strncpy() - Dave's series on removing/deprecating zero-blocks and uffd cleanups - Juraj's one more fix on multifd/cancel test where it can fail when cancellation happens too slow on src - Dave's one more remove deadcode patch in iova-tree.c - Yuan's build fix for multifd qpl compressor # -----BEGIN PGP SIGNATURE----- # # iIgEABYKADAWIQS5GE3CDMRX2s990ak7X8zN86vXBgUCZwZ6CBIccGV0ZXJ4QHJl # ZGhhdC5jb20ACgkQO1/MzfOr1wa3ZwD9HiAN9m7WOfZxXKOVIIwhOjUNTw0FiFeO # HMxp8A2jeYsBAK+d5lYGX1V2FtQ152YiOJQzRW31MkdAOishJzcHCXgO # =gBW0 # -----END PGP SIGNATURE----- # gpg: Signature made Wed 09 Oct 2024 13:41:44 BST # gpg: using EDDSA key B9184DC20CC457DACF7DD1A93B5FCCCDF3ABD706 # gpg: issuer "peterx@redhat.com" # gpg: Good signature from "Peter Xu <xzpeter@gmail.com>" [marginal] # gpg: aka "Peter Xu <peterx@redhat.com>" [marginal] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: B918 4DC2 0CC4 57DA CF7D D1A9 3B5F CCCD F3AB D706 * tag 'migration-20241009-pull-request' of https://gitlab.com/peterx/qemu: migration/multifd: fix build error when qpl compression is enabled util/iova-tree: Remove deadcode tests/migration-test: Wait for cancellation sooner in multifd cancel util/userfaultfd: Remove unused uffd_poll_events migration/postcopy: Use uffd helpers util/userfaultfd: Return -errno on error migration: Remove unused socket_send_channel_create_sync migration: Deprecate zero-blocks capability migration: Remove unused migrate_zero_blocks migration: Remove migrate_cap_set migration/multifd: Ensure packet->ramblock is null-terminated memory: notify hypervisor of all eventfds during listener (de)registration Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * util/iova-tree: Remove deadcodeDr. David Alan Gilbert2024-10-081-25/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | iova_tree_find_address, and iova_tree_foreach have never been used since the code was originally added by: eecf5eedbd ("util: implement simple iova tree") Remove them. Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Link: https://lore.kernel.org/r/20240918142515.153074-1-dave@treblig.org Signed-off-by: Peter Xu <peterx@redhat.com>
| * util/userfaultfd: Remove unused uffd_poll_eventsDr. David Alan Gilbert2024-10-081-1/+0
| | | | | | | | | | | | | | | | | | | | uffd_poll_events has been unused since it was added; it's also just a wrapper around a plain old poll call, so doesn't add anything. Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org> Reviewed-by: Peter Xu <peterx@redhat.com> Link: https://lore.kernel.org/r/20240919134626.166183-8-dave@treblig.org Signed-off-by: Peter Xu <peterx@redhat.com>
* | Merge tag 'chr-pull-request' of https://gitlab.com/marcandre.lureau/qemu ↵Peter Maydell2024-10-091-1/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging chardev: introduce 'reconnect-ms' and deprecate 'reconnect' chardev: add path option for pty backend # -----BEGIN PGP SIGNATURE----- # # iQJQBAABCAA6FiEEh6m9kz+HxgbSdvYt2ujhCXWWnOUFAmcGQTYcHG1hcmNhbmRy # ZS5sdXJlYXVAcmVkaGF0LmNvbQAKCRDa6OEJdZac5crYEACdw2EjdHm+OSkC2cUt # p9x0spZ8xkUJpU7f7Xc+9fIYHTqqmtgKhbC2/iSaeeL8aSN5LugOAP7u0ya9gXo2 # M1pXPx4WYwy7yftmanwVSvD94GPiCT5EN2W3zFMzvkey9b2AdayGyCXaZY2ago4+ # QJq0pPwWu5VFR0b3ocXIJM1WiEzbR6wr+R0xuPGMLAp0uOnNIyE8AD9MhHJ/BROB # dDCD7xhG6MB1CnRG6+saGV/Aon9mml5i5MmiwmQ6JjC0zZ0w4arkWfjkW5r+yZOc # BrpC6P+MdwX7t7W//4bszlW0Lv+qw9Q9FBavtLrOSTCy/h+cq5XgNjZnf0j0edNp # /EGwQ6D7lqbHp0fGX1O+vnWe0IcyGMKWTU05UGpb3TBDzfzlmjNinQxU6LZPfizh # evRkKELRsy+WTOyJzyeKemw/SdoP8o7RmDF9x3uCP6dF8Q8/UD3CgnwVa8h9L+Jz # 591Ek6srXQhEHkUJdpf48LHvCho4eWkpIy2M7/iurXFZBhpz77A27DCnfBedYg/O # f67MreVDz3C/RSlsnGj7/c0eKnZHPuNhI4AxCAH01bCy1PEv65LrWUdeAtJRm84X # upbn9alqP4LCviUBIwjDqSDhb48mYbgmP8sC3oXeyZObSGQUz94oXh1QQapUHSzz # BCImJN+feMFgLLuEXreJP1N/kQ== # =musy # -----END PGP SIGNATURE----- # gpg: Signature made Wed 09 Oct 2024 09:39:18 BST # gpg: using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5 # gpg: issuer "marcandre.lureau@redhat.com" # gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full] # gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full] # Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5 * tag 'chr-pull-request' of https://gitlab.com/marcandre.lureau/qemu: chardev: add path option for pty backend chardev: introduce 'reconnect-ms' and deprecate 'reconnect' Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | chardev: introduce 'reconnect-ms' and deprecate 'reconnect'Daniil Tatianin2024-10-091-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'reconnect' option only allows to specify the time in seconds, which is way too long for certain workflows. We have a lightweight disk backend server, which takes about 20ms to live update, but due to this limitation in QEMU, previously the guest disk controller would hang for one second because it would take this long for QEMU to reinitialize the socket connection. Introduce a new option called 'reconnect-ms', which is the same as 'reconnect', except the value is treated as milliseconds. These are mutually exclusive and specifying both results in an error. 'reconnect' is also deprecated by this commit to make it possible to remove it in the future as to not keep two options that control the same thing. Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Acked-by: Peter Krempa <pkrempa@redhat.com> Signed-off-by: Daniil Tatianin <d-tatianin@yandex-team.ru> Acked-by: Markus Armbruster <armbru@redhat.com> Tested-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20240913094604.269135-1-d-tatianin@yandex-team.ru>
* / accel/tcg: Make page_set_flags() documentation publicPhilippe Mathieu-Daudé2024-10-081-0/+13
|/ | | | | | | | | | | | Commit e505a063ba ("translate-all: Add assert_(memory|tb)_lock annotations") states page_set_flags() is "public APIs and [is] documented as needing them held for linux-user mode". Document the prototype. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240822095045.72643-2-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* disas: Remove CRIS disassemblerPhilippe Mathieu-Daudé2024-10-072-7/+0
| | | | | | | | | We just removed the CRIS target, the disassembler is now dead code. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240904143603.52934-15-philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>