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* linux-user/microblaze: Create init_main_threadRichard Henderson2025-08-282-41/+6
| | | | | | | | Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user/mips: Create init_main_threadRichard Henderson2025-08-282-17/+7
| | | | | | | | | | | | Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Note that init_thread had set cp0_status in target_pt_regs, but target_cpu_copy_regs did not copy to env. This turns out to be ok because mips_cpu_reset_hold initializes CP0_Status properly. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user/loongarch64: Create init_main_threadRichard Henderson2025-08-282-15/+5
| | | | | | | | | | | | Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Note that init_thread had set crmd in target_pt_regs, but target_cpu_copy_regs did not copy to env. This turns out to be ok because loongarch_cpu_reset_hold initializes CRMD properly. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user/ppc: Create init_main_threadRichard Henderson2025-08-282-24/+19
| | | | | | | | Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user/sparc: Create init_main_threadRichard Henderson2025-08-282-19/+9
| | | | | | | | Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user/aarch64: Create init_main_threadRichard Henderson2025-08-282-17/+7
| | | | | | | | Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user/arm: Remove a.out startup remenentsRichard Henderson2025-08-281-4/+0
| | | | | | | | | The setting of r1/r2 was removed in kernel commit acfdd4b1f7590d0 ("ARM: 7791/1: a.out: remove partial a.out support"), and the kernel commit message explains the history. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user/arm: Create init_main_threadRichard Henderson2025-08-282-50/+44
| | | | | | | | Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user/i386: Create init_main_threadRichard Henderson2025-08-283-49/+29
| | | | | | | | | Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Temporarily introduce HAVE_INIT_MAIN_THREAD during conversion. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Create do_init_main_threadRichard Henderson2025-08-284-16/+12
| | | | | | | | Provide a unified function to initialize the main thread. Keep target_pt_regs isolated to this function. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Move target_cpu_copy_regs decl to qemu.hRichard Henderson2025-08-281-0/+3
| | | | | | | | The function is not used by bsd-user, so placement within include/user/cpu_loop.h is not ideal. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Move get_elf_base_platform to mips/elfload.cRichard Henderson2025-08-285-36/+37
| | | | | | | | | Pass in CPUState; define HAVE_ELF_BASE_PLATFORM. Since this was the only instance of ELF_BASE_PLATFORM, go ahead and provide the stub definition for other platforms. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Remove ELF_PLATFORMRichard Henderson2025-08-281-14/+4
| | | | | | | | | All real definitions of ELF_PLATFORM are now identical, and the stub definitions are NULL. Use HAVE_ELF_PLATFORM and provide a stub as a fallback definition of get_elf_platform. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user/hppa: Create get_elf_platformRichard Henderson2025-08-283-1/+8
| | | | | | | Move the string literal to a new function. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user/loongarch64: Create get_elf_platformRichard Henderson2025-08-283-1/+7
| | | | | | | Move the string literal to a new function. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Move get_elf_platform to arm/elfload.cRichard Henderson2025-08-286-38/+38
| | | | | | | | | | | | | Move the aarch32 get_elf_platform to arm/elfload.c; pass in CPUState. Create a simple version in aarch64/elfload.c, which we must do at the same time because of the ifdef dependency between TARGET_AARCH64 and TARGET_ARM. Since all versions of get_elf_platform now have the same signature, remove the ifdef from the declaration in loader.h. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user/i386: Return const data from get_elf_platformRichard Henderson2025-08-281-8/+4
| | | | | | | Rather than modify a static buffer, index into an array of const data. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Move get_elf_platform to {i386,x86_64}/elfload.cRichard Henderson2025-08-286-16/+25
| | | | | | | | | Move get_elf_platform to i386/elfload.c; pass in CPUState. Create a simple get_elf_platform for x86_64. Introduce HAVE_ELF_PLATFORM. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Remove ELF_HWCAP2Richard Henderson2025-08-281-13/+10
| | | | | | | | All definitions of ELF_HWCAP2 are now identical. Provide a not-reached stub as a fallback definition of get_elf_hwcap2. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Remove ELF_HWCAPRichard Henderson2025-08-281-23/+12
| | | | | | | | All real definitions of ELF_HWCAP are now identical, and the stub definitions are 0. Provide zero stub as a fallback definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Move get_elf_hwcap to riscv/elfload.cRichard Henderson2025-08-284-18/+15
| | | | | | | | | Change the return type to abi_ulong, and pass in the cpu. As this is the last instance of get_elf_hwcap to be converted, remove the ifdef around the declaration in loader.h. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Move hwcap functions to s390x/elfload.cRichard Henderson2025-08-285-64/+62
| | | | | | | | For get_elf_hwcap, change the return type to abi_ulong and pass in the cpu. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Move get_elf_hwcap to sh4/elfload.cRichard Henderson2025-08-284-29/+32
| | | | | | | Change the return type to abi_ulong, and pass in the cpu. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Move get_elf_hwcap to mips/elfload.cRichard Henderson2025-08-285-52/+56
| | | | | | | Change the return type to abi_ulong, and pass in the cpu. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Move get_elf_hwcap to loongarch64/elfload.cRichard Henderson2025-08-284-49/+52
| | | | | | | Change the return type to abi_ulong, and pass in the cpu. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Move hwcap functions to ppc/elfload.cRichard Henderson2025-08-284-115/+122
| | | | | | | Change the return type to abi_ulong, and pass in the cpu. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Move get_elf_hwcap to sparc/elfload.cRichard Henderson2025-08-284-30/+32
| | | | | | | Change the return type to abi_ulong, and pass in the cpu. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Move hwcap functions to {arm,aarch64}/elfload.cRichard Henderson2025-08-287-509/+510
| | | | | | | | | | For get_elf_hwcap and get_elf_hwcap2, change the return type to abi_ulong, and pass in the cpu. We must do these targets at the same time because of the ifdef dependency between TARGET_AARCH64 and TARGET_ARM. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Move get_elf_hwcap to {i386,x86_64}/elfload.cRichard Henderson2025-08-286-8/+18
| | | | | | | | | Change the return type to abi_ulong, and pass in the cpu. Duplicate the one line function between i386 and x86_64, as most other additions to elfload.c won't be common. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Move get_elf_cpu_model to target/elfload.cRichard Henderson2025-08-2839-145/+272
| | | | | | | | | | Rename from cpu_get_model to emphasize that this is an elf-specific function. Declare the function once in loader.h. This frees up target_elf.h for other uses. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Move ppc uabi/asm/elf.h workaround to osdep.hRichard Henderson2025-08-281-10/+0
| | | | | | | | | | | | | Move the workaround out of linux-user/elfload.c, so that we don't have to replicate it in many places. Place it immediately after the include of <signal.h>, which draws in the relevant symbols. Note that ARCH_DLINFO is not defined by the kernel header, and so there's no need to undef it either. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Create target/elfload.c filesRichard Henderson2025-08-2819-0/+19
| | | | | | | | Prepare to split the main linux-user/elfload.c. Create empty files for each target, and add the common build rule. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* semihosting: Initialize heap once per processRichard Henderson2025-08-285-38/+11
| | | | | | | | | | | While semihosting isn't really thread aware, the current implementation allocates space for the heap per-thread. Remove the heap_base and heap_limit fields from TaskState. Replace with static variables within do_common_semihosting. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* semihosting: Retrieve stack top from image_infoRichard Henderson2025-08-285-5/+0
| | | | | | | | Remove the write-once field TaskState.stack_base, and use the same value from struct image_info. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user/strace.list: add riscv_hwprobe entryDaniel Henrique Barboza2025-07-301-0/+3
| | | | | | | | | | | | | | | | | We're missing a strace entry for riscv_hwprobe, and using -strace will report it as "Unknown syscall 258". After this patch we'll have: $ ./build/qemu-riscv64 -strace test_mutex_riscv 110182 riscv_hwprobe(0x7f207efdc700,1,0,0,0,0) = 0 110182 brk(NULL) = 0x0000000000082000 (...) Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250728170633.113384-1-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* linux-user/aarch64: Support ZT_MAGIC signal frame recordPeter Maydell2025-07-251-1/+92
| | | | | | | | | | | | | | | | | | | FEAT_SME2 adds the ZT0 register, whose contents may need to be preserved and restored on signal handler entry and exit. This is done with a new ZT_MAGIC record. We forgot to implement support for this in our linux-user code before enabling the SME2p1 emulation, which meant that a signal handler using SME would corrupt the ZT0 register value, and code that attempted to unwind an exception from inside a signal handler would not work. Add the missing record handling. Fixes: 7b1613a1020d2942 ("target/arm: Enable FEAT_SME2p1 on -cpu max") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250725175510.3864231-4-peter.maydell@linaro.org>
* linux-user/aarch64: Support TPIDR2_MAGIC signal frame recordPeter Maydell2025-07-251-2/+40
| | | | | | | | | | | | | | | | | | | | | | | FEAT_SME adds the TPIDR2 userspace-accessible system register, which is used as part of the procedure calling standard's lazy saving scheme for the ZA registers: https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#66the-za-lazy-saving-scheme The Linux kernel has a signal frame record for saving and restoring this value when calling signal handlers, but we forgot to implement this. The result is that code which tries to unwind an exception out of a signal handler will not work correctly. Add support for the missing record. Cc: qemu-stable@nongnu.org Fixes: 78011586b90d1 ("target/arm: Enable SME for user-only") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250725175510.3864231-3-peter.maydell@linaro.org>
* linux-user/aarch64: Clear TPIDR2_EL0 when delivering signalsPeter Maydell2025-07-251-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A recent change to the kernel (Linux commit b376108e1f88 "arm64/fpsimd: signal: Clear TPIDR2 when delivering signals") updated the signal-handler entry code to always clear TPIDR2_EL0. This is necessary for the userspace ZA lazy saving scheme to work correctly when unwinding exceptions across a signal boundary. (For the essay-length description of the incorrect behaviour and why this is the correct fix, see the commit message for the kernel commit.) Make QEMU also clear TPIDR2_EL0 on signal entry, applying the equivalent bugfix to our implementation. Note that getting this unwinding to work correctly also requires changes to the userspace code, e.g. as implemented in gcc in https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=b5ffc8e75a8 This change is technically an ABI change; from the kernel's point of view SME was never enabled (it was hidden behind CONFIG_BROKEN) before the change. From QEMU's point of view our SME-related signal handling was broken anyway as we weren't saving and restoring TPIDR2_EL0. Cc: qemu-stable@nongnu.org Fixes: 78011586b90d1 ("target/arm: Enable SME for user-only") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250725175510.3864231-2-peter.maydell@linaro.org>
* Merge tag 'accel-20250715' of https://github.com/philmd/qemu into stagingStefan Hajnoczi2025-07-161-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Accelerators patches - Unify x86/arm hw/xen/arch_hvm.h header - Move non-system-specific 'accel/accel-ops.h' and 'accel-cpu-ops.h' to accel/ - Move KVM definitions qapi/accelerator.json - Add @qom-type field to CpuInfoFast QAPI structure - Display CPU model name in 'info cpus' HMP command - Introduce @x-accel-stats QMP command - Add 'info accel' on HMP - Improve qemu_add_vm_change_state_handler*() docstring - Extract TCG statistic related code to tcg-stats.c - Implement AccelClass::get_[vcpu]_stats() handlers for TCG and HVF - Do not dump NaN in TCG statistics - Revert incomplete "accel/tcg: Unregister the RCU before exiting RR thread" # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmh2r4UACgkQ4+MsLN6t # wN5i6xAAkOvwFh1GmsPUdz5RxzsWoIUDvyENg6E8Axwe5tSEMRFiPjabbTQJomQg # GZt75XIS24LZFZ+hvqrLSA+dFgXTgWv08ZE81EjwjmAMBlLCOPhCgeN6C1p8100Y # scSvRJbP9k9lpA5K7et/1X4AkK2cZyh+LGJgCjr2Al2mbERpPueDF8fxqeohFvXQ # nTSks4XlA0yQ06+9r49aQAiuXvgg9lDT1wIglD2HEV7vOVs/ud+yyL8+z5YMeFzx # pSIc6wDu4PqdA46w4MZs90uTy7S/PMvBiYDEiV3tKzg0MLttvFGlT58/YjVtguTP # mNkfwIEwQtDQzoxsFIJO7yBTlTRBs95V4aIVk3pB+Gb/bideRPIkeVQvgMSEBKj7 # N0pEXWOxfB9iIWO6b1utYpQ4uxeDOU/8DPUCit1IBbNgKTaJkJb77fboYk7NaB0K # KEtObAk6jMatB/xr+vUFWc4sMk9wlm72w8wcQzgKZ0xV2U3d1/Y/9nS4GvI510ev # TRQ3mKj7N319uCeId1czF6W8rillCJ2u8ZK53u+Nfp7R3PbsRSMc6IDJ1UdDUlyR # HFcWHxbcbEGhe8SnFGab4Qd6fWChcn2EaEoAJJz+Rqv0k3zcwqccNM5waCABAjTE # 0S22JIHePJKcpkMLGq3EOUAQuu+8Zsol7gPCLxSAMclVqPTl9ck= # =rAav # -----END PGP SIGNATURE----- # gpg: Signature made Tue 15 Jul 2025 15:44:05 EDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'accel-20250715' of https://github.com/philmd/qemu: system/runstate: Document qemu_add_vm_change_state_handler_prio* in hdr system/runstate: Document qemu_add_vm_change_state_handler() accel/hvf: Implement AccelClass::get_vcpu_stats() handler accel/tcg: Implement AccelClass::get_stats() handler accel/tcg: Propagate AccelState to dump_accel_info() accel/system: Add 'info accel' on human monitor accel/system: Introduce @x-accel-stats QMP command accel/tcg: Extract statistic related code to tcg-stats.c Revert "accel/tcg: Unregister the RCU before exiting RR thread" accel: Extract AccelClass definition to 'accel/accel-ops.h' accel: Rename 'system/accel-ops.h' -> 'accel/accel-cpu-ops.h' accel/tcg: Do not dump NaN statistics hw/core/machine: Display CPU model name in 'info cpus' command qapi/machine: Add @qom-type field to CpuInfoFast structure qapi/accel: Move definitions related to accelerators in their own file hw/arm/xen-pvh: Remove unnecessary 'hw/xen/arch_hvm.h' header hw/xen/arch_hvm: Unify x86 and ARM variants Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Conflicts: qapi/machine.json Commit 0462da9d6b19 ("qapi: remove trivial "Returns:" sections") removed trivial "Returns:". This caused a conflict with the move from machine.json to accelerator.json.
| * accel: Extract AccelClass definition to 'accel/accel-ops.h'Philippe Mathieu-Daudé2025-07-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | Only accelerator implementations (and the common accelator code) need to know about AccelClass internals. Move the definition out but forward declare AccelState and AccelClass. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250703173248.44995-39-philmd@linaro.org>
* | plugins: fix inclusion of user-mode APIsAlex Bennée2025-07-142-1/+5
|/ | | | | | | | | | | | | | | | In 903e870f24 (plugins/api: split out binary path/start/end/entry code) we didn't actually enable the building of the new plugin helper. However this was missed because only contrib plugins like drcov actually used the helpers. With that fixed we discover we also need some more includes to be able to extract the relevant data from TaskState. Fixes: 903e870f24 (plugins/api: split out binary path/start/end/entry code) Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3014 Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250710104531.3099313-6-alex.bennee@linaro.org>
* linux-user: Use qemu_set_cloexec() to mark pidfd as FD_CLOEXECPeter Maydell2025-07-111-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | In the linux-user do_fork() function we try to set the FD_CLOEXEC flag on a pidfd like this: fcntl(pid_fd, F_SETFD, fcntl(pid_fd, F_GETFL) | FD_CLOEXEC); This has two problems: (1) it doesn't check errors, which Coverity complains about (2) we use F_GETFL when we mean F_GETFD Deal with both of these problems by using qemu_set_cloexec() instead. That function will assert() if the fcntls fail, which is fine (we are inside fork_start()/fork_end() so we know nothing can mess around with our file descriptors here, and we just got this one from pidfd_open()). (As we are touching the if() statement here, we correct the indentation.) Coverity: CID 1508111 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250711141217.1429412-1-peter.maydell@linaro.org>
* linux-user: Hold the fd-trans lock across forkGeoffrey Thomas2025-07-102-0/+12
| | | | | | | | | | | | | | | | | If another thread is holding target_fd_trans_lock during a fork, then the lock becomes permanently locked in the child and the emulator deadlocks at the next interaction with the fd-trans table. As with other locks, acquire the lock in fork_start() and release it in fork_end(). Cc: qemu-stable@nongnu.org Signed-off-by: Geoffrey Thomas <geofft@ldpreload.com> Fixes: c093364f4d91 "fd-trans: Fix race condition on reallocation of the translation table." Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2846 Buglink: https://github.com/astral-sh/uv/issues/6105 Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250314124742.4965-1-geofft@ldpreload.com>
* linux-user/mips/o32: Drop sa_restorer functionalityThomas Weißschuh2025-07-102-5/+0
| | | | | | | | | | | | | | | | | The Linux kernel dropped support for sa_restorer on O32 MIPS in the release 2.5.48 because it was unused. See the comment in arch/mips/include/uapi/asm/signal.h. Applications using the kernels UAPI headers will not reserve enough space for qemu-user to copy the sigaction.sa_restorer field to. Unrelated data may be overwritten. Align qemu-user with the kernel by also dropping sa_restorer support. Signed-off-by: Thomas Weißschuh <thomas@t-8ch.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250709-mips-sa-restorer-v1-1-fc17120e4afe@t-8ch.de>
* linux-user/gen-vdso: Don't read off the end of buf[]Peter Maydell2025-07-101-0/+5
| | | | | | | | | | | | | | | | | | | | | | In gen-vdso we load in a file and assume it's a valid ELF file. In particular we assume it's big enough to be able to read the ELF information in e_ident in the ELF header. Add a check that the total file length is at least big enough for all the e_ident bytes, which is good enough for the code in gen-vdso.c. This will catch the most obvious possible bad input file (truncated) and allow us to run the sanity checks like "not actually an ELF file" without potentially crashing. The code in elf32_process() and elf64_process() still makes assumptions about the file being well-formed, but this is OK because we only run it on the vdso binaries that we create ourselves in the build process by running the compiler. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250710170707.1299926-3-peter.maydell@linaro.org>
* linux-user/gen-vdso: Handle fseek() failurePeter Maydell2025-07-101-2/+9
| | | | | | | | | | | | | | Coverity points out that we don't check for fseek() failure in gen-vdso.c, and so we might pass -1 to malloc(). Add the error checking. (This is a standalone executable that doesn't link against glib, so we can't do the easy thing and use g_file_get_contents().) Coverity: CID 1523742 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250710170707.1299926-2-peter.maydell@linaro.org>
* linux-user: Check for EFAULT failure in nanosleepPeter Maydell2025-07-101-2/+6
| | | | | | | | | | | | | | | | target_to_host_timespec() returns an error if the memory the guest passed us isn't actually readable. We check for this everywhere except the callsite in the TARGET_NR_nanosleep case, so this mistake was caught by a Coverity heuristic. Add the missing error checks to the calls that convert between the host and target timespec structs. Coverity: CID 1507104 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250710164355.1296648-1-peter.maydell@linaro.org>
* linux-user: Implement fchmodat2 syscallPeter Maydell2025-07-101-0/+13
| | | | | | | | | | | | The fchmodat2 syscall is new from Linux 6.6; it is like the existing fchmodat syscall except that it takes a flags parameter. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3019 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250710113123.1109461-1-peter.maydell@linaro.org>
* Merge tag 'pull-target-arm-20250704' of https://gitlab.com/pm215/qemu into ↵Stefan Hajnoczi2025-07-072-2/+10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging target-arm queue: * Implement emulation of SME2p1 and SVE2p1 * Correctly enforce alignment checks for v8M loads and stores done via helper functions * Mark the "highbank" and the "midway" machine as deprecated # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmhoABMZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3n5CD/9esli7dCvutRUv0YCDR0ca # HyFgZT5Z+rnjdUgIBWk3qPIdmQ+dCvK8gci8Du8mY7WWPvJFc+x2wE9b0trxaARZ # ckjPo/dPq18FPRqppbNo5LGeBImwVqMYioJtuLIDw6vdMlm6eYvyyJWoFo6pXXPY # 3FlW0vBWZ78/KlQ8dYVK8TQryT2qswjXqvhz96/wCFQWRyWCXNosgETGQQH2z/20 # y5qAMkmI3NATaSSnkVox88RipFSnqotKSpczG5MBXs/n4hZvMHHNfrNxgZ17lygP # WI4R5j/M3cRHnglRzxVm5xzz0Vy8gWV+Zn97YMN2syJhze2nFQDcD6dWGNEYdCgT # R83/FF2yVn7v4ZompmyL97eUtfiFR/t40M+ojdhrfwADNelAU0JbeLahJuJjXfBm # ptdiTnDXYD8Ts6X+FTCafWO9ciPmPJ+SyXOcDnRpy8NpNstL6e7Um5BU8Tcw41nV # cAP5K5LooQO6yDkrVf2sjFCU9QxamPhCck+xQsT85njy3br3OA2MTGA/ZdD5noet # i2EIcdovQjMZqRv/P8c/+WzDhUw27fPbMzLOvl+nUHQM29Mx7hdTvbdvj/CiQtpV # wXprWqdG6jeAXeIkhwFs6/8Uc+7mn3guPi8RQZ5uwX5e1pYNSVOKMjGpooVekNbL # qjb+ZLPXIpkCV3N5Vbg9Uw== # =onnF # -----END PGP SIGNATURE----- # gpg: Signature made Fri 04 Jul 2025 12:23:47 EDT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20250704' of https://gitlab.com/pm215/qemu: (119 commits) linux-user/aarch64: Set hwcap bits for SME2p1/SVE2p1 target/arm: Enable FEAT_SME2p1 on -cpu max target/arm: Implement SME2 BFMOPA (non-widening) target/arm: Implement FMOPA (non-widening) for fp16 target/arm: Support FPCR.AH in SME FMOPS, BFMOPS target/arm: Rename BFMOPA to BFMOPA_w target/arm: Rename FMOPA_h to FMOPA_w_h target/arm: Implement LUTI2, LUTI4 for SME2/SME2p1 target/arm: Implement MOVAZ for SME2p1 target/arm: Implement LD1Q, ST1Q for SVE2p1 target/arm: Implement {LD, ST}[234]Q for SME2p1/SVE2p1 target/arm: Move ld1qq and st1qq primitives to sve_ldst_internal.h target/arm: Implement {LD1, ST1}{W, D} (128-bit element) for SVE2p1 target/arm: Split the ST_zpri and ST_zprr patterns target/arm: Implement SME2 counted predicate register load/store target/arm: Implement TBLQ, TBXQ for SME2p1/SVE2p1 target/arm: Implement ZIPQ, UZPQ for SME2p1/SVE2p1 target/arm: Implement PMOV for SME2p1/SVE2p1 target/arm: Implement EXTQ for SME2p1/SVE2p1 target/arm: Implement DUPQ for SME2p1/SVE2p1 ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * linux-user/aarch64: Set hwcap bits for SME2p1/SVE2p1Richard Henderson2025-07-041-0/+8
| | | | | | | | | | | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250704142112.1018902-108-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>