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2022-03-21hw/audio/intel-hda: Restrict DMA engine to memories (not MMIO devices)Philippe Mathieu-Daudé1-1/+1
Issue #542 reports a reentrancy problem when the DMA engine accesses the HDA controller I/O registers. Fix by restricting the DMA engine to memories regions (forbidding MMIO devices such the HDA controller). Reported-by: OSS-Fuzz (Issue 28435) Reported-by: Alexander Bulekov <alxndr@bu.edu> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/542 CVE: CVE-2021-3611 Message-Id: <20211218160912.1591633-3-philmd@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-03-21hw/audio/intel-hda: Do not ignore DMA overrun errorsPhilippe Mathieu-Daudé1-2/+7
Per the "High Definition Audio Specification" manual (rev. 1.0a), section "3.3.30 Offset 5Dh: RIRBSTS - RIRB Status": Response Overrun Interrupt Status (RIRBOIS): Hardware sets this bit to a 1 when an overrun occurs in the RIRB. An interrupt may be generated if the Response Overrun Interrupt Control bit is set. This bit will be set if the RIRB DMA engine is not able to write the incoming responses to memory before additional incoming responses overrun the internal FIFO. When hardware detects an overrun, it will drop the responses which overrun the buffer and set the RIRBOIS status bit to indicate the error condition. Optionally, if the RIRBOIC is set, the hardware will also generate an error to alert software to the problem. QEMU emulates the DMA engine with the stl_le_pci_dma() calls. This function returns a MemTxResult indicating whether the DMA access was successful. Handle any MemTxResult error as "DMA engine is not able to write the incoming responses to memory" and raise the Overrun Interrupt flag when this case occurs. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20211218160912.1591633-2-philmd@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-03-21softmmu/physmem: Introduce MemTxAttrs::memory field and MEMTX_ACCESS_ERRORPhilippe Mathieu-Daudé2-2/+51
Add the 'memory' bit to the memory attributes to restrict bus controller accesses to memories. Introduce flatview_access_allowed() to check bus permission before running any bus transaction. Have read/write accessors return MEMTX_ACCESS_ERROR if an access is restricted. There is no change for the default case where 'memory' is not set. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20211215182421.418374-4-philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> [thuth: Replaced MEMTX_BUS_ERROR with MEMTX_ACCESS_ERROR, remove "inline"] Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-03-21softmmu/physmem: Simplify flatview_write and address_space_access_validPhilippe Mathieu-Daudé1-8/+3
Remove unuseful local 'result' variables. Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20211215182421.418374-3-philmd@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-03-18virtio/virtio-balloon: Prefer Object* over void* parameterBernhard Beschow1-5/+5
*opaque is an alias to *obj. Using the ladder makes the code consistent with with other devices, e.g. accel/kvm/kvm-all and accel/tcg/tcg-all. It also makes the cast more typesafe. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: David Hildenbrand <david@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20220301222301.103821-2-shentey@gmail.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-03-18hw/pci/pci.c: Fix typos of "Firewire", and of "controller" on same lineRebecca Cran1-1/+1
Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220318101124.912-1-quic_rcran@quicinc.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-03-18util/osdep: Remove some early cruftAndrew Deason1-7/+0
The include for statvfs.h has not been needed since all statvfs calls were removed in commit 4a1418e07bdc ("Unbreak large mem support by removing kqemu"). The comment mentioning CONFIG_BSD hasn't made sense since an include for config-host.h was removed in commit aafd75841001 ("util: Clean up includes"). Remove this cruft. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrew Deason <adeason@sinenomine.net> Message-id: 20220316035227.3702-4-adeason@sinenomine.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-18hw/i386/acpi-build: Avoid 'sun' identifierAndrew Deason1-2/+2
On Solaris, 'sun' is #define'd to 1, which causes errors if a variable is named 'sun'. Slightly change the name of the var for the Slot User Number so we can build on Solaris. Reviewed-by: Ani Sinha <ani@anisinha.ca> Signed-off-by: Andrew Deason <adeason@sinenomine.net> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20220316035227.3702-3-adeason@sinenomine.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-18util/osdep: Avoid madvise proto on modern SolarisAndrew Deason3-5/+29
On older Solaris releases (before Solaris 11), we didn't get a prototype for madvise, and so util/osdep.c provides its own prototype. Some time between the public Solaris 11.4 release and Solaris 11.4.42 CBE, we started getting an madvise prototype that looks like this: extern int madvise(void *, size_t, int); which conflicts with the prototype in util/osdeps.c. Instead of always declaring this prototype, check if we're missing the madvise() prototype, and only declare it ourselves if the prototype is missing. Move the prototype to include/qemu/osdep.h, the normal place to handle platform-specific header quirks. The 'missing_madvise_proto' meson check contains an obviously wrong prototype for madvise. So if that code compiles and links, we must be missing the actual prototype for madvise. Signed-off-by: Andrew Deason <adeason@sinenomine.net> Message-id: 20220316035227.3702-2-adeason@sinenomine.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-18hw/arm/xlnx-zynqmp: Connect the ZynqMP APU ControlEdgar E. Iglesias2-3/+26
Connect the ZynqMP APU Control device. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com> Reviewed-by: Luc Michel <luc@lmichel.fr> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20220316164645.2303510-7-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-18hw/misc: Add a model of the Xilinx ZynqMP APU ControlEdgar E. Iglesias3-0/+347
Add a model of the Xilinx ZynqMP APU Control. Reviewed-by: Luc Michel <luc@lmichel.fr> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20220316164645.2303510-6-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-18hw/arm/xlnx-zynqmp: Connect the ZynqMP CRFEdgar E. Iglesias2-0/+18
Connect the ZynqMP CRF - Clock Reset FPD device. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com> Reviewed-by: Luc Michel <luc@lmichel.fr> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20220316164645.2303510-5-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-18hw/misc: Add a model of the Xilinx ZynqMP CRFEdgar E. Iglesias3-0/+478
Add a model of the Xilinx ZynqMP CRF. At the moment this is mostly a stub model. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20220316164645.2303510-4-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-18target/arm: Make rvbar settable after realizeEdgar E. Iglesias3-9/+16
Make the rvbar property settable after realize. This is done in preparation to model the ZynqMP's runtime configurable rvbar. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20220316164645.2303510-3-edgar.iglesias@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-18hw/arm/xlnx-zynqmp: Add an unimplemented SERDES areaEdgar E. Iglesias2-1/+6
Add an unimplemented SERDES (Serializer/Deserializer) area. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20220316164645.2303510-2-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-18target/arm: Log fault address for M-profile faultsPeter Maydell1-0/+6
For M-profile, the fault address is not always exposed to the guest in a fault register (for instance the BFAR bus fault address register is only updated for bus faults on data accesses, not instruction accesses). Currently we log the address only if we're putting it into a particular guest-visible register. Since we always have it, log it generically, to make logs of i-side faults a bit clearer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20220315204306.2797684-3-peter.maydell@linaro.org
2022-03-18target/arm: Log M-profile vector table accessesPeter Maydell2-0/+10
Currently the CPU_LOG_INT logging misses some useful information about loads from the vector table. Add logging where we load vector table entries. This is particularly helpful for cases where the user has accidentally not put a vector table in their image at all, which can result in confusing guest crashes at startup. Here's an example of the new logging for a case where the vector table contains garbage: Loaded reset SP 0x0 PC 0x0 from vector table Loaded reset SP 0xd008f8df PC 0xf000bf00 from vector table Taking exception 3 [Prefetch Abort] on CPU 0 ...with CFSR.IACCVIOL ...BusFault with BFSR.STKERR ...taking pending nonsecure exception 3 ...loading from element 3 of non-secure vector table at 0xc ...loaded new PC 0x20000558 ---------------- IN: 0x20000558: 08000079 stmdaeq r0, {r0, r3, r4, r5, r6} (The double reset logging is the result of our long-standing "CPUs all get reset twice" weirdness; it looks a bit ugly but it'll go away if we ever fix that :-)) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20220315204306.2797684-2-peter.maydell@linaro.org
2022-03-18hw/arm/virt: Fix gic-version=max when CONFIG_ARM_GICV3_TCG is unsetEric Auger1-1/+6
In TCG mode, if gic-version=max we always select GICv3 even if CONFIG_ARM_GICV3_TCG is unset. We shall rather select GICv2. This also brings the benefit of fixing qos tests errors for tests using gic-version=max with CONFIG_ARM_GICV3_TCG unset. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-id: 20220308182452.223473-3-eric.auger@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-18hw/intc: Rename CONFIG_ARM_GIC_TCG into CONFIG_ARM_GICV3_TCGEric Auger2-3/+3
CONFIG_ARM_GIC_TCG actually guards the compilation of TCG GICv3 specific files. So let's rename it into CONFIG_ARM_GICV3_TCG Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-id: 20220308182452.223473-2-eric.auger@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-18nsis installer: Fix mouse-over descriptions for emulatorsPeter Maydell2-5/+13
We use the nsis.py script to write out an installer script Section for each emulator executable, so the exact set of Sections depends on which executables were built. However the part of qemu.nsi which specifies mouse-over descriptions for each Section still has a hard-coded and very outdated list (with just i386 and alpha). This causes two problems. Firstly, if you build the installer for a configuration where you didn't build the i386 binaries you get warnings like this: warning 6000: unknown variable/constant "{Section_i386}" detected, ignoring (macro:_==:1) warning 6000: unknown variable/constant "{Section_i386w}" detected, ignoring (macro:_==:1) (this happens in our gitlab CI jobs, for instance). Secondly, most of the emulators in the generated installer don't have any mouseover text. Make nsis.py generate a second output file which has the necessary MUI_DESCRIPTION_TEXT lines for each Section it creates, so we can include that at the right point in qemu.nsi to set the mouse-over text. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: John Snow <jsnow@redhat.com> Message-id: 20220305105743.2384766-4-peter.maydell@linaro.org
2022-03-18nsis installer: Suppress "ANSI targets are deprecated" warningPeter Maydell1-0/+3
When we build our Windows installer, it emits the warning: warning 7998: ANSI targets are deprecated Fix this by making our installer a Unicode installer instead. These won't work on Win95/98/ME, but we already do not support those. See https://nsis.sourceforge.io/Docs/Chapter4.html#aunicodetarget for the documentation of the Unicode directive. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Stefan Weil <sw@weilnetz.de> Message-id: 20220305105743.2384766-3-peter.maydell@linaro.org
2022-03-18nsis installer: List emulators in alphabetical orderPeter Maydell1-2/+2
We currently list the emulators in the Windows installer's dialog in an essentially random order (it's whatever glob.glob() returns them to, which is filesystem-implementation-dependent). Add a call to sorted() so they appear in alphabetical order. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: John Snow <jsnow@redhat.com> Message-id: 20220305105743.2384766-2-peter.maydell@linaro.org
2022-03-18hw/misc/npcm7xx_clk: Don't leak string in npcm7xx_clk_sel_init()Peter Maydell1-2/+2
In npcm7xx_clk_sel_init() we allocate a string with g_strdup_printf(). Use g_autofree so we free it rather than leaking it. (Detected with the clang leak sanitizer.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20220308170302.2582820-1-peter.maydell@linaro.org
2022-03-18hw/dma/xlnx_csu_dma: Set TYPE_XLNX_CSU_DMA class_sizePeter Maydell1-0/+1
In commit 00f05c02f9e7342f we gave the TYPE_XLNX_CSU_DMA object its own class struct, but forgot to update the TypeInfo::class_size accordingly. This meant that not enough memory was allocated for the class struct, and the initialization of xcdc->read in the class init function wrote off the end of the memory. Add the missing line. Found by running 'check-qtest-aarch64' with a clang address-sanitizer build, which complains: ==2542634==ERROR: AddressSanitizer: heap-buffer-overflow on address 0x61000000ab00 at pc 0x559a20aebc29 bp 0x7fff97df74d0 sp 0x7fff97df74c8 WRITE of size 8 at 0x61000000ab00 thread T0 #0 0x559a20aebc28 in xlnx_csu_dma_class_init /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/san/../../hw/dma/xlnx_csu_dma.c:722:16 #1 0x559a21bf297c in type_initialize /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/san/../../qom/object.c:365:9 #2 0x559a21bf3442 in object_class_foreach_tramp /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/san/../../qom/object.c:1070:5 #3 0x7f09bcb641b7 in g_hash_table_foreach (/usr/lib/x86_64-linux-gnu/libglib-2.0.so.0+0x401b7) #4 0x559a21bf3c27 in object_class_foreach /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/san/../../qom/object.c:1092:5 #5 0x559a21bf3c27 in object_class_get_list /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/san/../../qom/object.c:1149:5 #6 0x559a2081a2fd in select_machine /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/san/../../softmmu/vl.c:1661:24 #7 0x559a2081a2fd in qemu_create_machine /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/san/../../softmmu/vl.c:2146:35 #8 0x559a2081a2fd in qemu_init /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/san/../../softmmu/vl.c:3706:5 #9 0x559a20720ed5 in main /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/san/../../softmmu/main.c:49:5 #10 0x7f09baec00b2 in __libc_start_main /build/glibc-sMfBJT/glibc-2.31/csu/../csu/libc-start.c:308:16 #11 0x559a2067673d in _start (/mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/san/qemu-system-aarch64+0xf4b73d) 0x61000000ab00 is located 0 bytes to the right of 192-byte region [0x61000000aa40,0x61000000ab00) allocated by thread T0 here: #0 0x559a206eeff2 in calloc (/mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/san/qemu-system-aarch64+0xfc3ff2) #1 0x7f09bcb7bef0 in g_malloc0 (/usr/lib/x86_64-linux-gnu/libglib-2.0.so.0+0x57ef0) #2 0x559a21bf3442 in object_class_foreach_tramp /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/san/../../qom/object.c:1070:5 Fixes: 00f05c02f9e7342f ("hw/dma/xlnx_csu_dma: Support starting a read transfer through a class method") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20220308150207.2546272-1-peter.maydell@linaro.org
2022-03-18target/arm: Fix handling of LPAE block descriptorsPeter Maydell1-2/+8
LPAE descriptors come in three forms: * table descriptors, giving the address of the next level page table * page descriptors, which occur only at level 3 and describe the mapping of one page (which might be 4K, 16K or 64K) * block descriptors, which occur at higher page table levels, and describe the mapping of huge pages QEMU's page-table-walk code treats block and page entries identically, simply ORing in a number of bits from the input virtual address that depends on the level of the page table that we stopped at; we depend on the previous masking of descaddr with descaddrmask to have already cleared out the low bits of the descriptor word. This is not quite right: the address field in a block descriptor is smaller, and so there are bits which are valid address bits in a page descriptor or a table descriptor but which are not supposed to be part of the address in a block descriptor, and descaddrmask does not clear them. We previously mostly got away with this because those descriptor bits are RES0; however with FEAT_BBM (part of Armv8.4) block descriptor bit 16 is defined to be the nT bit. No emulated QEMU CPU has FEAT_BBM yet, but if the host CPU has it then we might see it when using KVM or hvf. Explicitly zero out all the descaddr bits we're about to OR vaddr bits into. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/790 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220304165628.2345765-1-peter.maydell@linaro.org
2022-03-18target/arm: Fix pauth_check_trap vs SEL2Richard Henderson1-1/+1
When arm_is_el2_enabled was introduced, we missed updating pauth_check_trap. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/788 Fixes: e6ef0169264b ("target/arm: use arm_is_el2_enabled() where applicable") Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20220315021205.342768-1-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-18target/arm: Fix sve2 ldnt1 and stnt1Richard Henderson5-5/+109
For both ldnt1 and stnt1, the meaning of the Rn and Rm are different from ld1 and st1: the vector and integer registers are reversed, and the integer register 31 refers to XZR instead of SP. Secondly, the 64-bit version of ldnt1 was being interpreted as 32-bit unpacked unscaled offset instead of 64-bit unscaled offset, which discarded the upper 32 bits of the address coming from the vector argument. Thirdly, validate that the memory element size is in range for the vector element size for ldnt1. For ld1, we do this via independent decode patterns, but for ldnt1 we need to do it manually. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/826 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20220308031655.240710-1-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-18hw/display/vga: Report a proper error when adding a 2nd ISA VGAThomas Huth1-0/+6
QEMU currently abort()s if the user tries to add a second ISA VGA device, for example: $ ./qemu-system-x86_64 -device isa-vga -device isa-vga RAMBlock "vga.vram" already registered, abort! Aborted (core dumped) $ ./qemu-system-x86_64 -device isa-cirrus-vga -device isa-cirrus-vga RAMBlock "vga.vram" already registered, abort! Aborted (core dumped) $ ./qemu-system-mips64el -M pica61 -device isa-vga RAMBlock "vga.vram" already registered, abort! Aborted (core dumped) Such a crash should never happen just because of giving bad parameters at the command line. Let's return a proper error message instead. (The idea is based on an original patch by Jose R. Ziviani for the isa-vga device, but this now fixes it for the isa-cirrus-vga device, too) Resolves: https://gitlab.com/qemu-project/qemu/-/issues/44 Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220317083027.16688-4-thuth@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2022-03-18hw/display: Allow vga_common_init() to return errorsThomas Huth11-13/+42
The vga_common_init() function currently cannot report errors to its caller. But in the following patch, we'd need this possibility, so let's change it to take an "Error **" as parameter for this. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220317083027.16688-3-thuth@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2022-03-18hw/display/cirrus_vga: Clean up indentation in pci_cirrus_vga_realize()Thomas Huth1-28/+29
Most of the code in this function had been indented with 5 spaces instead of 4. Since 4 is our preferred style, remove one space in the bad lines here. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220317083027.16688-2-thuth@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2022-03-18audio/mixeng: Do not declare unused variablesAkihiko Odaki1-4/+4
The unused variables when FLOAT_MIXENG is defined caused warnings on Apple clang version 13.1.6 (clang-1316.0.21.2). Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220316061053.60587-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2022-03-18ui: avoid unnecessary memory operations in vnc_refresh_server_surface()Wen, Jianxian1-9/+17
Check the dirty bits in advance to avoid unnecessary memory operations. In the case that guest surface has different format than the server, but it does not have dirty bits which means no refresh is actually needed, the memory operations is not necessary. Signed-off-by: Jianxian Wen <jianxian.wen@verisilicon.com> Signed-off-by: Lu Gao <lu.gao@verisilicon.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <4C23C17B8E87E74E906A25A3254A03F4FA22100C@SHASXM06.verisilicon.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2022-03-18ui/gtk: Ignore 2- and 3-button press eventsK. Lange1-0/+4
GTK already produces corresponding GDK_BUTTON_PRESS events alongside 2BUTTON and 3BUTTON_PRESS events. The 2BUTTON and 3BUTTON_PRESS events were incorrectly being interpreted and passed to guests as button release events. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/558 Signed-off-by: K. Lange <klange@toaruos.org> Message-Id: <20220305104521.3583703-1-klange@toaruos.org> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2022-03-16softmmu: List CPU types againPhilippe Mathieu-Daudé4-10/+11
Commit e0220bb5b2 made cpus.c target-agnostic but didn't notice the cpu_list() function is only defined in target-specific code in "cpu.h". Move list_cpus() declaration to "exec/cpu-common.h" because this function is not softmmu-specific and can also be used by user-mode, along with moving its implementation to cpu.c, which is compiled per target. Fixes: e0220bb5b2 ("softmmu: Build target-agnostic objects once") Reported-by: Max Filippov <jcmvbkbc@gmail.com> Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220314140108.26222-1-philippe.mathieu.daude@gmail.com> Tested-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-03-16accel/tcg: Fix cpu_ldq_be_mmu typoRichard Henderson1-1/+1
In the conversion to cpu_ld_*_mmu, the retaddr parameter was corrupted in the one case of cpu_ldq_be_mmu. Fixes: f83bcecb1 ("accel/tcg: Add cpu_{ld,st}*_mmu interfaces") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/902 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220315002506.152030-1-richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-03-16tests/avocado: start PhoneServer upfrontBeraldo Leal1-6/+7
Race conditions can happen with the current code, because the port that was available might not be anymore by the time the server is started. By setting the port to 0, PhoneServer it will use the OS default behavior to get a free port, then we save this information so we can later configure the guest. Suggested-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Beraldo Leal <bleal@redhat.com> Message-Id: <20220311171127.2189534-1-bleal@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-03-16tests/tcg/s390x: Test BRASL and BRCL with large negative offsetsIlya Leoshkevich2-0/+69
Add a small test in order to prevent regressions. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20220314104232.675863-4-iii@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-03-16s390x/tcg: Fix BRCL with a large negative offsetIlya Leoshkevich1-1/+1
When RI2 is 0x80000000, qemu enters an infinite loop instead of jumping backwards. Fix by adding a missing cast, like in in2_ri2(). Fixes: 7233f2ed1717 ("target-s390: Convert BRANCH ON CONDITION") Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20220314104232.675863-3-iii@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-03-16s390x/tcg: Fix BRASL with a large negative offsetIlya Leoshkevich1-1/+1
When RI2 is 0x80000000, qemu enters an infinite loop instead of jumping backwards. Fix by adding a missing cast, like in in2_ri2(). Fixes: 8ac33cdb8bfb ("Convert BRANCH AND SAVE") Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20220314104232.675863-2-iii@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-03-16tests/tcg: drop -cpu max from s390x sha512-mvx invocationAlex Bennée1-2/+0
With -cpu max we get a warning: qemu-s390x: warning: 'msa5-base' requires 'kimd-sha-512'. But dropping the -cpu max and it still runs fine. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220309112248.4083619-1-alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-03-15Update version for v7.0.0-rc0 releasePeter Maydell1-1/+1
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-15MAINTAINERS: Volunteer to maintain Darwin-based hosts supportPhilippe Mathieu-Daudé1-0/+8
While I am not an experienced Darwin OS user, I now have to use a macOS based workstation and alike CI, meaning I should easily spot regressions and test fixes. I therefore volunteer to collect Darwin related patches and keep QEMU in good state on macOS, and to some extent iOS. Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Christian Schoenebeck <qemu_oss@crudebyte.com> Cc: Akihiko Odaki <akihiko.odaki@gmail.com> Cc: Joelle van Dyne <j@getutm.app> Cc: Daniel P. Berrangé <berrange@redhat.com> Cc: Peter Maydell <peter.maydell@linaro.org> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-03-15ui/cocoa: add option to swap Option and CommandGustavo Noronha Silva3-12/+46
On Mac OS X the Option key maps to Alt and Command to Super/Meta. This change swaps them around so that Alt is the key closer to the space bar and Meta/Super is between Control and Alt, like on non-Mac keyboards. It is a cocoa display option, disabled by default. Acked-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Gustavo Noronha Silva <gustavo@noronha.dev.br> Message-Id: <20210713213200.2547-3-gustavo@noronha.dev.br> Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com> Message-Id: <20220306121119.45631-3-akihiko.odaki@gmail.com> Reviewed-by: Will Cohen <wwcohen@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-03-15ui/cocoa: capture all keys and combos when mouse is grabbedGustavo Noronha Silva3-2/+74
Applications such as Gnome may use Alt-Tab and Super-Tab for different purposes, some use Ctrl-arrows so we want to allow qemu to handle everything when it captures the mouse/keyboard. However, Mac OS handles some combos like Command-Tab and Ctrl-arrows at an earlier part of the event handling chain, not letting qemu see it. We add a global Event Tap that allows qemu to see all events when the mouse is grabbed. Note that this requires additional permissions. See: https://developer.apple.com/documentation/coregraphics/1454426-cgeventtapcreate?language=objc#discussion https://support.apple.com/en-in/guide/mac-help/mh32356/mac Acked-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Gustavo Noronha Silva <gustavo@noronha.dev.br> Message-Id: <20210713213200.2547-2-gustavo@noronha.dev.br> Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com> Message-Id: <20220306121119.45631-2-akihiko.odaki@gmail.com> Reviewed-by: Will Cohen <wwcohen@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-03-15ui/cocoa: release mouse when user switches away from QEMU windowCarwyn Ellis1-0/+2
This resolves an issue where using command-tab to switch between QEMU and other windows on the host can leave the mouse pointer visible. By releasing the mouse when the user switches away, the user must left click on the QEMU window when switching back in order to hide the pointer and return control to the guest. This appraoch ensures that the calls to NSCursor hide and unhide are always balanced and thus work correctly when invoked. Signed-off-by: Carwyn Ellis <carwynellis@gmail.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-03-15ui/cocoa: add option to disable left-command forwarding to guestCarwyn Ellis3-1/+37
When switching between guest and host on a Mac using command-tab the command key is sent to the guest which can trigger functionality in the guest OS. Specifying left-command-key=off disables forwarding this key to the guest. Defaults to enabled. Also updated the cocoa display documentation to reference the new left-command-key option along with the existing show-cursor option. Signed-off-by: Carwyn Ellis <carwynellis@gmail.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@gmail.com> [PMD: Set QAPI structure @since tag to 7.0] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-03-15ui/cocoa: Constify qkeycode translation arraysPhilippe Mathieu-Daudé1-2/+2
Reported-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@gmail.com> Tested-by: Akihiko Odaki <akihiko.odaki@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-03-15configure: Pass filtered QEMU_OBJCFLAGS to mesonPhilippe Mathieu-Daudé2-1/+28
Filter unsupported Objective-C options, to avoid 'unknown-warning-option' warnings when using Clang: [34/373] Compiling Objective-C object libcommon.fa.p/audio_coreaudio.m.o warning: unknown warning option '-Wold-style-declaration'; did you mean '-Wout-of-line-declaration'? [-Wunknown-warning-option] warning: unknown warning option '-Wimplicit-fallthrough=2'; did you mean '-Wimplicit-fallthrough'? [-Wunknown-warning-option] 2 warnings generated. Acked-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@gmail.com> Tested-by: Akihiko Odaki <akihiko.odaki@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-03-15meson: Log QEMU_CXXFLAGS content in summaryPhilippe Mathieu-Daudé1-0/+1
Reviewed-by: Akihiko Odaki <akihiko.odaki@gmail.com> Tested-by: Akihiko Odaki <akihiko.odaki@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-03-15meson: Resolve the entitlement.sh script once for goodPhilippe Mathieu-Daudé1-1/+4
Commit 235b523dba ("meson: Use find_program() to resolve the entitlement.sh script") didn't correctly fixed the issue, as the script is still resolved for each target. Move the check earlier, before processing each target. Reviewed-by: Akihiko Odaki <akihiko.odaki@gmail.com> Tested-by: Akihiko Odaki <akihiko.odaki@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>