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2022-05-28qga: replace qemu_open_old() with qga_open_cloexec()Marc-André Lureau2-8/+13
qemu_open_old() uses qemu_open_internal() which handles special "/dev/fdset/" path for monitor fd sets, set CLOEXEC, and uses Error reporting (and some O_DIRECT special error casing). The monitor fdset handling is unnecessary for qga, use qga_open_cloexec() instead. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com> Message-Id: <20220525144140.591926-9-marcandre.lureau@redhat.com>
2022-05-28qga: throw an Error in ga_channel_open()Marc-André Lureau1-25/+17
Allow for a single point of error reporting, and further refactoring. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20220525144140.591926-8-marcandre.lureau@redhat.com>
2022-05-28qga: use qga_open_cloexec() for safe_open_or_create()Marc-André Lureau1-4/+3
The function takes care of setting CLOEXEC. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20220525144140.591926-7-marcandre.lureau@redhat.com>
2022-05-28qga: add qga_open_cloexec() helperMarc-André Lureau3-0/+42
QGA calls qemu_open_old() in various places. Calling qemu_open() instead isn't a great alternative, as it has special "/dev/fdset" handling and depends on QEMU internal monitor data structures. Instead, provide a simple helper for QGA needs, with Error* support. The following patches will make use of it. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20220525144140.591926-6-marcandre.lureau@redhat.com>
2022-05-28qga: flatten safe_open_or_create()Marc-André Lureau1-60/+60
There is a bit too much nesting in the function, this can be simplified a bit to improve readability. This also helps with the following error handling changes. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20220525144140.591926-5-marcandre.lureau@redhat.com>
2022-05-28tests: make libqmp buildable for win32Marc-André Lureau2-5/+31
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220525144140.591926-4-marcandre.lureau@redhat.com>
2022-05-28util/win32: simplify qemu_get_local_state_dir()Marc-André Lureau1-13/+4
SHGetFolderPath() is a deprecated API: https://docs.microsoft.com/en-us/windows/win32/api/shlobj_core/nf-shlobj_core-shgetfolderpatha It is a wrapper for SHGetKnownFolderPath() and CSIDL_COMMON_PATH is mapped to FOLDERID_ProgramData: https://docs.microsoft.com/en-us/windows/win32/shell/csidl g_get_system_data_dirs() is a suitable replacement, as it will have FOLDERID_ProgramData in the returned list. However, it follows the XDG Base Directory Specification, if `XDG_DATA_DIRS` is defined, it will be returned instead. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Stefan Weil <sw@weilnetz.de> Message-Id: <20220525144140.591926-3-marcandre.lureau@redhat.com>
2022-05-28include: move qemu_*_exec_dir() to cutilsMarc-André Lureau8-128/+129
The function is required by get_relocated_path() (already in cutils), and used by qemu-ga and may be generally useful. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20220525144140.591926-2-marcandre.lureau@redhat.com>
2022-05-26tests/crypto: Add test suite for RSA keysLei He1-3/+282
As Daniel suggested, Add tests suite for rsakey, as a way to prove that we can handle DER errors correctly. Signed-off-by: lei he <helei.sig11@bytedance.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2022-05-26test/crypto: Add test suite for crypto akcipherLei He6-7/+1394
Add unit test and benchmark test for crypto akcipher. Signed-off-by: lei he <helei.sig11@bytedance.com> Signed-off-by: zhenwei pi <pizhenwei@bytedance.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2022-05-26crypto: Implement RSA algorithm by gcryptLei He2-1/+598
Added gcryt implementation of RSA algorithm, RSA algorithm implemented by gcrypt has a higher priority than nettle because it supports raw padding. Signed-off-by: lei he <helei.sig11@bytedance.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2022-05-26crypto: Implement RSA algorithm by hogweedLei He8-0/+964
Implement RSA algorithm by hogweed from nettle. Thus QEMU supports a 'real' RSA backend to handle request from guest side. It's important to test RSA offload case without OS & hardware requirement. Signed-off-by: lei he <helei.sig11@bytedance.com> Signed-off-by: zhenwei pi <pizhenwei@bytedance.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2022-05-26crypto: add ASN.1 DER decoderLei He5-0/+562
Add an ANS.1 DER decoder which is used to parse asymmetric cipher keys Signed-off-by: zhenwei pi <pizhenwei@bytedance.com> Signed-off-by: lei he <helei.sig11@bytedance.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2022-05-26crypto: Introduce akcipher crypto classzhenwei pi4-0/+316
Introduce new akcipher crypto class 'QCryptoAkCIpher', which supports basic asymmetric operations: encrypt, decrypt, sign and verify. Suggested by Daniel P. Berrangé, also add autoptr cleanup for the new class. Thanks to Daniel! Co-developed-by: lei he <helei.sig11@bytedance.com> Signed-off-by: lei he <helei.sig11@bytedance.com> Signed-off-by: zhenwei pi <pizhenwei@bytedance.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2022-05-26qapi: crypto-akcipher: Introduce akcipher types to qapiLei He1-0/+64
Introduce akcipher types, also include RSA related types. Signed-off-by: Lei He <helei.sig11@bytedance.com> Signed-off-by: zhenwei pi <pizhenwei@bytedance.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2022-05-25i386: docs: Convert hyperv.txt to rSTVitaly Kuznetsov3-303/+289
rSTify docs/hyperv.txt and link it from docs/system/target-i386.rst. Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Message-Id: <20220525115949.1294004-7-vkuznets@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-05-25i386: Hyper-V Direct TLB flush hypercallVitaly Kuznetsov5-0/+23
Hyper-V TLFS allows for L0 and L1 hypervisors to collaborate on L2's TLB flush hypercalls handling. With the correct setup, L2's TLB flush hypercalls can be handled by L0 directly, without the need to exit to L1. Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Message-Id: <20220525115949.1294004-6-vkuznets@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-05-25i386: Hyper-V Support extended GVA ranges for TLB flush hypercallsVitaly Kuznetsov5-0/+19
KVM kind of supported "extended GVA ranges" (up to 4095 additional GFNs per hypercall) since the implementation of Hyper-V PV TLB flush feature (Linux-4.18) as regardless of the request, full TLB flush was always performed. "Extended GVA ranges for TLB flush hypercalls" feature bit wasn't exposed then. Now, as KVM gains support for fine-grained TLB flush handling, exposing this feature starts making sense. Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Message-Id: <20220525115949.1294004-5-vkuznets@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-05-25i386: Hyper-V XMM fast hypercall input featureVitaly Kuznetsov5-1/+17
Hyper-V specification allows to pass parameters for certain hypercalls using XMM registers ("XMM Fast Hypercall Input"). When the feature is in use, it allows for faster hypercalls processing as KVM can avoid reading guest's memory. KVM supports the feature since v5.14. Rename HV_HYPERCALL_{PARAMS_XMM_AVAILABLE -> XMM_INPUT_AVAILABLE} to comply with KVM. Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Message-Id: <20220525115949.1294004-4-vkuznets@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-05-25i386: Hyper-V Enlightened MSR bitmap featureVitaly Kuznetsov5-0/+24
The newly introduced enlightenment allow L0 (KVM) and L1 (Hyper-V) hypervisors to collaborate to avoid unnecessary updates to L2 MSR-Bitmap upon vmexits. Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Message-Id: <20220525115949.1294004-3-vkuznets@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-05-25i386: Use hv_build_cpuid_leaf() for HV_CPUID_NESTED_FEATURESVitaly Kuznetsov2-11/+15
Previously, HV_CPUID_NESTED_FEATURES.EAX CPUID leaf was handled differently as it was only used to encode the supported eVMCS version range. In fact, there are also feature (e.g. Enlightened MSR-Bitmap) bits there. In preparation to adding these features, move HV_CPUID_NESTED_FEATURES leaf handling to hv_build_cpuid_leaf() and drop now-unneeded 'hyperv_nested'. No functional change intended. Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Message-Id: <20220525115949.1294004-2-vkuznets@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-05-25ide_ioport_read: Return lower octet of data register instead of 0xFFLev Kujawski2-2/+8
Prior to this patch, the pre-GRUB Solaris x86 bootloader would fail to load on QEMU with the following screen output: SunOS Secondary Boot version 3.00 prom_panic: Could not mount filesystem. Entering boot debugger: [136419]: _ This occurs because the bootloader issues an ATA IDENTIFY DEVICE command, and then reads the resulting 256 words of parameter information using inb rather than the correct inw. As the previous behavior of QEMU was to return 0xFF and not advance the drive's sector buffer, DRQ would never be cleared and the bootloader would be blocked from selecting a secondary ATA device, such as an optical drive. Resolves: * [Bug 1639394] Unable to boot Solaris 8/9 x86 under Fedora 24 Signed-off-by: Lev Kujawski <lkujaw@member.fsf.org> Message-Id: <20220520235200.1138450-1-lkujaw@member.fsf.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-05-25target/i386/kvm: Fix disabling MPX on "-cpu host" with MPX-capable hostMaciej S. Szmigiero1-0/+8
Since KVM commit 5f76f6f5ff96 ("KVM: nVMX: Do not expose MPX VMX controls when guest MPX disabled") it is not possible to disable MPX on a "-cpu host" just by adding "-mpx" there if the host CPU does indeed support MPX. QEMU will fail to set MSR_IA32_VMX_TRUE_{EXIT,ENTRY}_CTLS MSRs in this case and so trigger an assertion failure. Instead, besides "-mpx" one has to explicitly add also "-vmx-exit-clear-bndcfgs" and "-vmx-entry-load-bndcfgs" to QEMU command line to make it work, which is a bit convoluted. Make the MPX-related bits in FEAT_VMX_{EXIT,ENTRY}_CTLS dependent on MPX being actually enabled so such workarounds are no longer necessary. Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com> Message-Id: <51aa2125c76363204cc23c27165e778097c33f0b.1653323077.git.maciej.szmigiero@oracle.com> Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-05-25hw/audio/ac97: Remove unneeded local variablesBALATON Zoltan1-53/+49
Several functions have a local variable that is just a copy of one of the function parameters. This is unneeded complication so just get rid of these. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <d959aa0b267eb139a994e41ca0b7ba87d9cef7a9.1650706617.git.balaton@eik.bme.hu> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-05-25hw/audio/ac97: Remove unimplemented reset functionsBALATON Zoltan1-16/+1
The warm_reset() and cold_reset() functions are not implemented and do nothing so no point in calling them or keep around as dead code. Therefore remove them for now. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Víctor Colombo <victor.colombo@eldorado.org.br> Message-Id: <cc6e99fd498a9ae358ebce787fc04ab6e8201879.1650706617.git.balaton@eik.bme.hu> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-05-25hw/audio/ac97: Coding style fixes to avoid checkpatch errorsBALATON Zoltan1-373/+360
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Víctor Colombo <victor.colombo@eldorado.org.br> Message-Id: <62862a057e9c9ec0bb45248b2b9a3a1babb346a6.1650706617.git.balaton@eik.bme.hu> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-05-25contrib/elf2dmp: add ELF dump header checkingViktor Prutyanov1-0/+53
Add ELF header checking to prevent processing input file which is not QEMU x86_64 guest memory dump or even not ELF. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1013 Signed-off-by: Viktor Prutyanov <viktor.prutyanov@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220520084339.171684-1-viktor.prutyanov@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-05-25thread-pool: remove stopping variablePaolo Bonzini1-3/+2
Just setting the max threads to 0 is enough to stop all workers. Message-Id: <20220514065012.1149539-4-pbonzini@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Nicolas Saenz Julienne <nsaenzju@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-05-25thread-pool: replace semaphore with condition variablePaolo Bonzini1-40/+28
Since commit f9fc8932b1 ("thread-posix: remove the posix semaphore support", 2022-04-06) QemuSemaphore has its own mutex and condition variable; this adds unnecessary overhead on I/O with small block sizes. Check the QTAILQ directly instead of adding the indirection of a semaphore's count. Using a semaphore has not been necessary since qemu_cond_timedwait was introduced; the new code has to be careful about spurious wakeups but it is simpler, for example thread_pool_cancel does not have to worry about synchronizing the semaphore count with the number of elements of pool->request_list. Note that the return value of qemu_cond_timedwait (0 for timeout, 1 for signal or spurious wakeup) is different from that of qemu_sem_timedwait (-1 for timeout, 0 for success). Reported-by: Lukáš Doktor <ldoktor@redhat.com> Suggested-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Nicolas Saenz Julienne <nsaenzju@redhat.com> Message-Id: <20220514065012.1149539-3-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-05-25thread-pool: optimize scheduling of completion bottom halfPaolo Bonzini1-2/+1
The completion bottom half was scheduled within the pool->lock critical section. That actually results in worse performance, because the worker thread can run its own small critical section and go to sleep before the bottom half starts running. Note that this simple change does not produce an improvement without changing the thread pool QemuSemaphore to a condition variable. Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Nicolas Saenz Julienne <nsaenzju@redhat.com> Message-Id: <20220514065012.1149539-2-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-05-25hw/arm/aspeed: Add i2c devices for AST2600 EVBHoward Chiu1-2/+9
Add EEPROM and LM75 temperature sensor according to hardware schematic Signed-off-by: Howard Chiu <howard_chiu@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-25docs: Correct the default thread-pool-sizeLiu Yiding1-1/+1
Refer to 26ec190964 virtiofsd: Do not use a thread pool by default Signed-off-by: Liu Yiding <liuyd.fnst@fujitsu.com> Acked-by: Vivek Goyal <vgoyal@redhat.com> Message-id: 20220413042054.1484640-1-liuyd.fnst@fujitsu.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-05-25qga-win32: Add support for NVME bus typeKonstantin Kostiuk1-0/+5
Bus type spaces (Indicates a storage spaces bus) is not supported, so return it as unknown. Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20220524154344.869638-2-kkostiuk@redhat.com> Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com>
2022-05-25tests: Bump Fedora image version for cross-compilationKonstantin Kostiuk2-2/+2
There are 2 reason for the bump: - Fedora 33 is not supported anymore - Some changes in the guest agent required updates of mingw-headers Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220525085953.940116-2-kkostiuk@redhat.com> Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com>
2022-05-25trivial: qga: Log version on startKonstantin Kostiuk1-0/+2
Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20220523191644.823726-2-kkostiuk@redhat.com> Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com>
2022-05-25qga: add guest-get-diskstats command for Linux guestsluzhipeng3-0/+215
Add a new 'guest-get-diskstats' command for report disk io statistics for Linux guests. This can be useful for getting io flow or handling IO fault, no need to enter guests. Signed-off-by: luzhipeng <luzhipeng@cestc.cn> Message-Id: <20220520021935.676-1-luzhipeng@cestc.cn> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com> Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com>
2022-05-25hw/gpio: replace HWADDR_PRIx with PRIx64Jamin Lin2-5/+5
1. replace HWADDR_PRIx with PRIx64 2. fix indent issue Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220525053444.27228-5-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-25hw/gpio support GPIO index mode for write operation.Jamin Lin2-0/+182
It did not support GPIO index mode for read operation. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220525053444.27228-4-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-25hw/gpio: Add ASPEED GPIO model for AST1030Jamin Lin2-0/+38
AST1030 integrates one set of Parallel GPIO Controller with maximum 151 control pins, which are 21 groups (A~U, exclude pin: M6 M7 Q5 Q6 Q7 R0 R1 R4 R5 R6 R7 S0 S3 S4 S5 S6 S7 ) and the group T and U are input only. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220525053444.27228-3-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-25hw/gpio Add GPIO read/write trace event.Jamin Lin2-15/+43
Add GPIO read/write trace event for aspeed model. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220525053444.27228-2-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-25hw: aspeed: Init all UART's with serial devicesPeter Delevoryas1-0/+9
Background: AspeedMachineClass.uart_default specifies the serial console UART, which usually corresponds to the "stdout-path" in the device tree. The default value is UART5, since most boards use UART5 for this: amc->uart_default = ASPEED_DEV_UART5; Users can override AspeedMachineClass.uart_default in their board's machine class init to specify something besides UART5. For example, for fuji-bmc: amc->uart_default = ASPEED_DEV_UART1; We only connect this one UART, of the 5 UART's on the AST2400 and AST2500 and the 13 UART's on the AST2600 and AST1030, to a serial device that QEMU users can use. None of the other UART's are initialized, and the only way to override this attribute is by creating a specialized board definition, requiring QEMU source code changes and rebuilding. The result of this is that if you want to get serial console output on a board that uses UART3, you need to add a board definition. This was encountered by Zev in OpenBMC. [1] Changes: This commit initializes all of the UART's present on each Aspeed chip with serial devices and allows the QEMU user to connect as many or few as they like to serial devices. For example, you can still run QEMU and just connect stdout to the machine's default UART, without specifying any additional serial devices: qemu-system-arm -machine fuji-bmc \ -drive file=fuji.mtd,format=raw,if=mtd \ -nographic However, if you don't want to add a special machine definition, you can now manually configure UART1 to connect to stdout and get serial console output, even if the machine's default is UART5: qemu-system-arm -machine ast2600-evb \ -drive file=fuji.mtd,format=raw,if=mtd \ -serial null -serial mon:stdio -display none In the example above, the first "-serial null" argument is connected to UART5, and "-serial mon:stdio" is connected to UART1. Another example: you can get serial console output from Wedge100, which uses UART3, by reusing the palmetto AST2400 machine and rewiring the serial device arguments: qemu-system-arm -machine palmetto-bmc \ -drive file=wedge100.mtd,format=raw,if=mtd \ -serial null -serial null -serial null \ -serial mon:stdio -display none There is a slight change in behavior introduced with this change: now, each UART's memory-mapped IO region will have a serial device model connected to it. Previously, all reads and writes to those regions would be ineffective and return zero values, but now some values will be nonzero, even when the user doesn't connect a serial device backend (like a socket, file, etc). For example, the line status register might indicate that the transmit buffer is empty now, whereas previously it might have always indicated it was full. [1] https://lore.kernel.org/openbmc/YnzGnWjkYdMUUNyM@hatter.bewilderbeest.net/ [2] https://github.com/facebook/openbmc/releases/download/v2021.49.0/fuji.mtd [3] https://github.com/facebook/openbmc/releases/download/v2021.49.0/wedge100.mtd Signed-off-by: Peter Delevoryas <pdel@fb.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220516062328.298336-6-pdel@fb.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-25hw: aspeed: Introduce common UART init functionPeter Delevoryas4-14/+17
Signed-off-by: Peter Delevoryas <pdel@fb.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220516062328.298336-5-pdel@fb.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-25hw: aspeed: Ensure AST1030 respects uart-defaultPeter Delevoryas1-3/+3
The AST1030 machine initialization was not respecting the Aspeed SoC property "uart-default", which specifies which UART should be connected to the first serial device, it was just always connecting UART5. This doesn't change any behavior, because the default value for "uart-default" is UART5, but it makes it possible to override this in new machine definitions using the AST1030. Signed-off-by: Peter Delevoryas <pdel@fb.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220516062328.298336-4-pdel@fb.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-25hw: aspeed: Add uarts_num SoC attributePeter Delevoryas4-0/+5
AST2400 and AST2500 have 5 UART's, while the AST2600 and AST1030 have 13. Signed-off-by: Peter Delevoryas <pdel@fb.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220516062328.298336-3-pdel@fb.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-25hw: aspeed: Add missing UART'sPeter Delevoryas4-0/+57
This adds the missing UART memory and IRQ mappings for the AST2400, AST2500, AST2600, and AST1030. This also includes the new UART interfaces added in the AST2600 and AST1030 from UART6 to UART13. The addresses and interrupt numbers for these two later chips are identical. Signed-off-by: Peter Delevoryas <pdel@fb.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220516062328.298336-2-pdel@fb.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-25aspeed: Introduce a get_irq AspeedSoCClass methodCédric Le Goater4-7/+19
and make routine aspeed_soc_get_irq() common to all SoCs. This will be useful to share code. Cc: Jamin Lin <jamin_lin@aspeedtech.com> Cc: Peter Delevoryas <pdel@fb.com> Reviewed-by: Peter Delevoryas <pdel@fb.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220516055620.2380197-1-clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-25hw: m25p80: allow write_enable latch get/setIris Chen5-32/+98
The write_enable latch property is not currently exposed. This commit makes it a modifiable property. Signed-off-by: Iris Chen <irischenlj@fb.com> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> Message-Id: <20220513055022.951759-1-irischenlj@fb.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-25docs: aspeed: Add fby35 boardPeter Delevoryas1-0/+1
Add fby35 to the list of Aspeed boards. Signed-off-by: Peter Delevoryas <pdel@fb.com> Message-Id: <20220506193354.990532-2-pdel@fb.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-25hw/arm/aspeed: Add fby35 machine typePeter Delevoryas1-0/+63
Add the 'fby35-bmc' machine type based on the kernel DTS[1] and userspace i2c setup scripts[2]. Undefined values are inherited from the AST2600-EVB. Reference images can be found in Facebook OpenBMC Github Release assets as "fby35.mtd". [3] You can boot the reference images as follows (fby35 uses dual-flash): qemu-system-arm -machine fby35-bmc \ -drive file=fby35.mtd,format=raw,if=mtd \ -drive file=fby35.mtd,format=raw,if=mtd \ -nographic [1] https://github.com/facebook/openbmc-linux/blob/412d5053258007117e94b1e36015aefc1301474b/arch/arm/boot/dts/aspeed-bmc-facebook-fby35.dts [2] https://github.com/facebook/openbmc/blob/e2294ff5d31dd65c248fe396a385286d6d5c463d/meta-facebook/meta-fby35/recipes-fby35/plat-utils/files/setup-dev.sh [3] https://github.com/facebook/openbmc/releases Signed-off-by: Peter Delevoryas <pdel@fb.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220503225925.1798324-2-pdel@fb.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-25docs: add minibmc section in aspeed documentJamin Lin1-0/+61
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220506031521.13254-2-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>