| Commit message (Collapse) | Author | Files | Lines |
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The RVV specification does not require that the core needs to support
the privileged specification v1.12.0 to support RVV, and there is no
dependency from ISA level.
This commit removes the restriction from both RVV CSRs and extension CPU
ISA string.
Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230208063209.27279-1-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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The only remaining caller is riscv_load_kernel_and_initrd() which
belongs to the same file.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230206140022.2748401-4-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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The microchip_icicle_kit, sifive_u, spike and virt boards are now doing
the same steps when '-kernel' is used:
- execute load_kernel()
- load init_rd()
- write kernel_cmdline
Let's fold everything inside riscv_load_kernel() to avoid code
repetition. To not change the behavior of boards that aren't calling
riscv_load_init(), add an 'load_initrd' flag to riscv_load_kernel() and
allow these boards to opt out from initrd loading.
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230206140022.2748401-3-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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Next patch will move all calls to riscv_load_initrd() to
riscv_load_kernel(). Machines that want to load initrd will be able to
do via an extra flag to riscv_load_kernel().
This change will expose a sign-extend behavior that is happening in
load_elf_ram_sym() when running 32 bit guests [1]. This is currently
obscured by the fact that riscv_load_initrd() is using the return of
riscv_load_kernel(), defined as target_ulong, and this return type will
crop the higher 32 bits that would be padded with 1s by the sign
extension when running in 32 bit targets. The changes to be done will
force riscv_load_initrd() to use an uint64_t instead, exposing it to the
padding when dealing with 32 bit CPUs.
There is a discussion about whether load_elf_ram_sym() should or should
not sign extend the value returned by 'lowaddr'. What we can do is to
prevent the behavior change that the next patch will end up doing.
riscv_load_initrd() wasn't dealing with 64 bit kernel entries when
running 32 bit CPUs, and we want to keep it that way.
One way of doing it is to use target_ulong in 'kernel_entry' in
riscv_load_kernel() and rely on the fact that this var will not be sign
extended for 32 bit targets. Another way is to explictly clear the
higher 32 bits when running 32 bit CPUs for all possibilities of
kernel_entry.
We opted for the later. This will allow us to be clear about the design
choices made in the function, while also allowing us to add a small
comment about what load_elf_ram_sym() is doing. With this change, the
consolation patch can do its job without worrying about unintended
behavioral changes.
[1] https://lists.gnu.org/archive/html/qemu-devel/2023-01/msg02281.html
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230206140022.2748401-2-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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The netdev-socket test intermittently fails on our s390x CI runner:
633/659 ERROR:../tests/qtest/netdev-socket.c:197:test_stream_unix:
assertion failed (resp == expect): ("st0: index=0,type=stream,connection error\r\n" == "st0: index=0,type=stream,unix:/tmp/netdev-socket.GZUG01/stream_unix\r\n")
ERROR
633/659 qemu:qtest+qtest-xtensa / qtest-xtensa/netdev-socket
ERROR 5.47s killed by signal 6 SIGABRT
This may just be because when the machine is under heavy load
running the CI tests it hits the timeout before the QEMU
under test has started to the point of being able to respond
to HMP queries.
Bump the timeout to 60 seconds to see if the intermittent
goes away.
Acked-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20230207165119.1479132-1-peter.maydell@linaro.org
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this exercises the error reported in
https://gitlab.com/qemu-project/qemu/-/issues/652.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <20230203132132.511254-1-kbastian@mail.uni-paderborn.de>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Eitan Eliahu <eitan_eliahu@hotmail.com>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/652
Message-Id: <20230112142258.514079-1-anton.kochkov@proton.me>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <20230202120432.1268-11-kbastian@mail.uni-paderborn.de>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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we were sign extending the result of the load, while the instruction
clearly states that the result should be unsigned.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <20230202120432.1268-10-kbastian@mail.uni-paderborn.de>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <20230202120432.1268-9-kbastian@mail.uni-paderborn.de>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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if cpu_gpr_d[r3] == 0 then we were shifting the lower register to the
right by 32 which is undefined behaviour. In this case the TriCore would
do nothing an just return the higher register cpu_reg_d[r1]. We fixed
that by detecting whether cpu_gpr_d[r3] was zero and cleared the lower
register.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <20230202120432.1268-8-kbastian@mail.uni-paderborn.de>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <20230202120432.1268-7-kbastian@mail.uni-paderborn.de>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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if we used const16 == 0 we would crash qemu with the error:
../tcg/tcg-op.c:196: tcg_gen_shri_i32: Assertion `arg2 >= 0 && arg2 < 32' failed
This whole instruction can be handled by 'tcg_gen_extract2_tl' which
takes care of this special case as well.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <20230202120432.1268-6-kbastian@mail.uni-paderborn.de>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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DREG_RS2 and DREG_CALC_RESULT were mapped to the same register which
would not trigger https://gitlab.com/qemu-project/qemu/-/issues/653. So
let's make each register unique.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <20230202120432.1268-5-kbastian@mail.uni-paderborn.de>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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we were mixing up the "c" and "d" registers. We used "d" as a
destination register und "c" as the source. According to the TriCore ISA
manual 1.6 vol 2 it is the other way round.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/653
Message-Id: <20230202120432.1268-4-kbastian@mail.uni-paderborn.de>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <20230202120432.1268-3-kbastian@mail.uni-paderborn.de>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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we were mixing up the "c" and "d" registers. We used "d" as a
destination register und "c" as the source. According to the TriCore ISA
manual 1.6 vol 2 it is the other way round.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/653
Message-Id: <20230202120432.1268-2-kbastian@mail.uni-paderborn.de>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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Tracked down with the help of scripts/clean-includes.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20230202133830.2152150-21-armbru@redhat.com>
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This commit was created with scripts/clean-includes.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20230202133830.2152150-19-armbru@redhat.com>
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This commit was created with scripts/clean-includes.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20230202133830.2152150-18-armbru@redhat.com>
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This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, including headers qemu/osdep.h includes is redundant.
Drop these, too.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20230202133830.2152150-17-armbru@redhat.com>
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This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, including headers qemu/osdep.h includes is redundant.
Drop these, too.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-Id: <20230202133830.2152150-16-armbru@redhat.com>
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This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, including headers qemu/osdep.h includes is redundant.
Drop these, too.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20230202133830.2152150-15-armbru@redhat.com>
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This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, including headers qemu/osdep.h includes is redundant.
Drop these, too.
Changes to standalone programs dropped, because these intentionally
don't use qemu/osdep.h:
target/hexagon/gen_dectree_import.c
target/hexagon/gen_semantics.c
target/hexagon/idef-parser/idef-parser.h
target/hexagon/idef-parser/parser-helpers.c
target/hexagon/idef-parser/parser-helpers.h
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20230202133830.2152150-14-armbru@redhat.com>
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This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, including headers qemu/osdep.h includes is redundant.
Drop these, too.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20230202133830.2152150-13-armbru@redhat.com>
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This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, including headers qemu/osdep.h includes is redundant.
Drop these, too.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20230202133830.2152150-12-armbru@redhat.com>
[Straightforward conflict with commit d5890ea0722 resolved]
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This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, including headers qemu/osdep.h includes is redundant.
Drop these, too.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20230202133830.2152150-11-armbru@redhat.com>
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This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, including headers qemu/osdep.h includes is redundant.
Drop these, too.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20230202133830.2152150-10-armbru@redhat.com>
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This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, including headers qemu/osdep.h includes is redundant.
Drop these, too.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20230202133830.2152150-9-armbru@redhat.com>
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|
This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, including headers qemu/osdep.h includes is redundant.
Drop these, too.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20230202133830.2152150-8-armbru@redhat.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, including headers qemu/osdep.h includes is redundant.
Drop these, too.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20230202133830.2152150-7-armbru@redhat.com>
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This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, including headers qemu/osdep.h includes is redundant.
Drop these, too.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20230202133830.2152150-6-armbru@redhat.com>
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The script drops #include "qemu/osdep.h" from headers. Mention it in
the commit message it uses for --git.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20230202133830.2152150-5-armbru@redhat.com>
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When a symbolic link points to a file that needs cleaning, the script
replaces the link with a cleaned regular file. Not wanted; skip them.
We have a few symbolic links under subprojects/libvduse/ and
subprojects/libvhost-user/.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-Id: <20230202133830.2152150-4-armbru@redhat.com>
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When running with --check-dup-head, the script always claims it "Found
duplicate header file includes." Fix to do it only when it actually
found some.
Fixes: d66253e46ae2 ("scripts/clean-includes: added duplicate #include check")
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-Id: <20230202133830.2152150-3-armbru@redhat.com>
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When clean-includes claims to skip or ignore a file, only the part
that sanitizes use of qemu/osdep.h skips the file. The part that
looks for duplicate #include does not, and neither does committing to
Git.
The latter can get unrelated stuff included in the commit, but only if
you run clean-includes in a dirty tree, which is unwise. Messed up
when we added skipping in commit fd3e39a40c "scripts/clean-includes:
Enhance to handle header files".
The former can cause bogus reports for --check-dup-head. Added in
commit d66253e46a "scripts/clean-includes: added duplicate #include
check", duplicating the prior mistake.
Fix the script to fully skip files.
Fixes: fd3e39a40ca2 ("scripts/clean-includes: Enhance to handle header files")
Fixes: d66253e46ae2 ("scripts/clean-includes: added duplicate #include check")
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-Id: <20230202133830.2152150-2-armbru@redhat.com>
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The model includes aspeed_scu.h but doesn't appear to require it.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230124062022.298230-1-joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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Add a very quick test that runs some commands in a Zephyr shell:
$ tests/venv/bin/avocado --show=app,console run -t os:zephyr tests/avocado
(2/2) tests/avocado/machine_aspeed.py:AST1030Machine.test_ast1030_zephyros_1_07:
console: *** Booting Zephyr OS build v00.01.07 ***
console: ast1030_evb demo
console: SOC: AST1030-A1
console: uart:~$ kernel stacks
console: 0x36910 wdt_background (real size 1024): unused 988 usage 36 / 1024 (3 %)
console: 0x36ad8 shell_uart (real size 4096): unused 3084 usage 1012 / 4096 (24 %)
console: 0x2edb8 ADC0 (real size 400): unused 260 usage 140 / 400 (35 %)
console: 0x2f0f0 ADC1 (real size 400): unused 260 usage 140 / 400 (35 %)
console: 0x3b098 sysworkq (real size 1024): unused 860 usage 164 / 1024 (16 %)
console: 0x36cc0 usbdworkq (real size 1024): unused 860 usage 164 / 1024 (16 %)
console: 0x36bd8 usbworkq (real size 1024): unused 860 usage 164 / 1024 (16 %)
console: 0x36a10 logging (real size 768): unused 548 usage 220 / 768 (28 %)
console: 0x36ef8 idle 00 (real size 320): unused 268 usage 52 / 320 (16 %)
console: 0x47800 IRQ 00 (real size 2048): unused 1504 usage 544 / 2048 (26 %)
console: uart:~$ otp info scu
console: SCU BIT reg_protect Description
console: ____________________________________________________________________
console: 0x500 0x0 0x0 Disable ARM CM4 CPU boot (TXD5)
console: 0x500 0x1 0x0 /Reserved
console: 0x500 0x2 0x0 \ "
console: 0x500 0x3 0x0 Address offset of single chip ABR mode
console: 0x500 0x4 0x0 /Reserved
console: 0x500 0x5 0x0 | "
console: 0x500 0x6 0x0 | "
console: 0x500 0x7 0x0 | "
console: 0x500 0x8 0x0 | "
console: 0x500 0x9 0x0 | "
console: 0x500 0xA 0x0 | "
console: 0x500 0xB 0x0 | "
console: 0x500 0xC 0x0 | "
console: 0x500 0xD 0x0 | "
console: 0x500 0xE 0x0 | "
console: 0x500 0xF 0x0 | "
console: 0x500 0x10 0x0 \ "
console: 0x500 0x11 0x0 Disabl3 ARM JTAG debug
console: 0x500 0x12 0x0 /Reserved
console: 0x500 0x13 0x0 | "
console: 0x500 0x14 0x0 | "
console: 0x500 0x15 0x0 | "
console: 0x500 0x16 0x0 | "
console: 0x500 0x17 0x0 | "
console: 0x500 0x18 0x0 | "
console: 0x500 0x19 0x0 | "
console: 0x500 0x1A 0x0 | "
console: 0x500 0x1B 0x0 | "
console: 0x500 0x1C 0x0 | "
console: 0x500 0x1D 0x0 | "
console: 0x500 0x1E 0x0 | "
console: 0x500 0x1F 0x0 \ "
console: 0x510 0x0 0x0 /Reserved
console: 0x510 0x1 0x0 | "
console: 0x510 0x2 0x0 | "
console: 0x510 0x3 0x0 \ "
console: 0x510 0x4 0x0 Disable debug interfaces
console: 0x510 0x5 0x0 /Reserved
console: 0x510 0x6 0x0 | "
console: 0x510 0x7 0x0 \ "
console: 0x510 0x8 0x0 Enable boot from Uart5 by Pin Strap
console: 0x510 0x9 0x0 /Reserved
console: 0x510 0xA 0x0 \ "
console: 0x510 0xB 0x0 Enable boot SPI ABR
console: 0x510 0xC 0x0 Boot SPI ABR Mode
console: 0x510 0xD 0x0 /Boot SPI flash size
console: 0x510 0xE 0x0 | "
console: 0x510 0xF 0x0 \ "
console: 0x510 0x10 0x0 /Reserved
console: 0x510 0x11 0x0 | "
console: 0x510 0x12 0x0 | "
console: 0x510 0x13 0x0 | "
console: 0x510 0x14 0x0 | "
console: 0x510 0x15 0x0 \ "
console: 0x510 0x16 0x0 Enable boot SPI auxiliary control pins
console: 0x510 0x19 0x0 /Reserved
console: 0x510 0x1A 0x0 | "
console: 0x510 0x1B 0x0 | "
console: 0x510 0x1C 0x0 | "
console: 0x510 0x1D 0x0 | "
console: 0x510 0x1E 0x0 | "
console: 0x510 0x1F 0x0 \ "
console: 0x510 0x1E 0x0 Enable dedicate GPIO strap pins
console: 0x510 0x1F 0x0 Enable Secure Boot by Pin Strap
console: uart:~$ hwinfo devid
console: Length: 8
console: ID: 0x0000018000000180
console: uart:~$ crypto aes256_cbc_vault
console: aes256_cbc vault key 1
console: Was waiting for:
console: 6b c1 be e2 2e 40 9f 96 e9 3d 7e 11 73 93 17 2a
console: ae 2d 8a 57 1e 03 ac 9c 9e b7 6f ac 45 af 8e 51
console: 30 c8 1c 46 a3 5c e4 11 e5 fb c1 19 1a 0a 52 ef
console: f6 9f 24 45 df 4f 9b 17 ad 2b 41 7b e6 6c 37 10
console: But got:
console: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
console: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
console: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
console: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
console: uart:~$ random get
console: 0x862460d
console: uart:~$ i2c scan I2C_0
console: 0 1 2 3 4 5 6 7 8 9 a b c d e f
console: 00: -- -- -- -- -- -- -- -- -- -- -- --
console: 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
console: 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
console: 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
console: 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
console: 50: 50 -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
console: 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
console: 70: -- -- -- -- -- -- -- --
console: 1 devices found on I2C_0
console: uart:~$ kernel uptime
console: Uptime: 9897 ms
console: uart:~$ kernel reboot warm
console: *** Booting Zephyr OS build v00.01.07 ***
PASS (1.08 s)
Ref: https://github.com/AspeedTech-BMC/zephyr/releases/download/v00.01.07/Aspeed_Zephy_SDK_User_Guide_v00.01.07.pdf
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Delevoryas <peter@pjd.dev>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
|
|
This SoC uses a Cortex-M4F. QEMU only implements a M4,
which is good enough. Add a TODO note in case the M4F
is added.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Delevoryas <peter@pjd.dev>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
|
|
Since I don't have access to the datasheet, the relevant
values were found in:
https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/dts/arm/aspeed/ast10x0.dtsi
Before on Zephyr:
uart:~$ hash test
sha256_test
tv[0]:hash_final error
sha384_test
tv[0]:hash_final error
sha512_test
tv[0]:hash_final error
[00:00:06.278,000] <err> hace_global: HACE poll timeout
[00:00:09.324,000] <err> hace_global: HACE poll timeout
[00:00:12.261,000] <err> hace_global: HACE poll timeout
uart:~$ crypto aes256_cbc_vault
aes256_cbc vault key 1
[00:00:06.699,000] <inf> hace_global: aspeed_crypto_session_setup
[00:00:06.699,000] <inf> hace_global: data->cmd: 1c2098
[00:00:06.699,000] <inf> hace_global: crypto_data_src: 93340
[00:00:06.699,000] <inf> hace_global: crypto_data_dst: 93348
[00:00:06.699,000] <inf> hace_global: crypto_ctx_base: 93300
[00:00:06.699,000] <inf> hace_global: crypto_data_len: 80000040
[00:00:06.699,000] <inf> hace_global: crypto_cmd_reg: 11c2098
[00:00:09.743,000] <inf> hace_global: HACE_STS: 0
[00:00:09.743,000] <err> hace_global: HACE poll timeout
[00:00:09.743,000] <err> crypto: CBC mode ENCRYPT - Failed
[00:00:09.743,000] <inf> hace_global: aspeed_crypto_session_free
uart:~$
After:
uart:~$ hash test
sha256_test
tv[0]:PASS
tv[1]:PASS
tv[2]:PASS
tv[3]:PASS
tv[4]:PASS
sha384_test
tv[0]:PASS
tv[1]:PASS
tv[2]:PASS
tv[3]:PASS
tv[4]:PASS
tv[5]:PASS
sha512_test
tv[0]:PASS
tv[1]:PASS
tv[2]:PASS
tv[3]:PASS
tv[4]:PASS
tv[5]:PASS
uart:~$ crypto aes256_cbc_vault
aes256_cbc vault key 1
Was waiting for:
6b c1 be e2 2e 40 9f 96 e9 3d 7e 11 73 93 17 2a
ae 2d 8a 57 1e 03 ac 9c 9e b7 6f ac 45 af 8e 51
30 c8 1c 46 a3 5c e4 11 e5 fb c1 19 1a 0a 52 ef
f6 9f 24 45 df 4f 9b 17 ad 2b 41 7b e6 6c 37 10
But got:
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[00:00:05.771,000] <inf> hace_global: aspeed_crypto_session_setup
[00:00:05.772,000] <inf> hace_global: data->cmd: 1c2098
[00:00:05.772,000] <inf> hace_global: crypto_data_src: 93340
[00:00:05.772,000] <inf> hace_global: crypto_data_dst: 93348
[00:00:05.772,000] <inf> hace_global: crypto_ctx_base: 93300
[00:00:05.772,000] <inf> hace_global: crypto_data_len: 80000040
[00:00:05.772,000] <inf> hace_global: crypto_cmd_reg: 11c2098
[00:00:05.772,000] <inf> hace_global: HACE_STS: 1000
[00:00:05.772,000] <inf> crypto: Output length (encryption): 80
[00:00:05.772,000] <inf> hace_global: aspeed_crypto_session_free
[00:00:05.772,000] <inf> hace_global: aspeed_crypto_session_setup
[00:00:05.772,000] <inf> hace_global: data->cmd: 1c2018
[00:00:05.772,000] <inf> hace_global: crypto_data_src: 93340
[00:00:05.772,000] <inf> hace_global: crypto_data_dst: 93348
[00:00:05.772,000] <inf> hace_global: crypto_ctx_base: 93300
[00:00:05.772,000] <inf> hace_global: crypto_data_len: 80000040
[00:00:05.772,000] <inf> hace_global: crypto_cmd_reg: 11c2018
[00:00:05.772,000] <inf> hace_global: HACE_STS: 1000
[00:00:05.772,000] <inf> crypto: Output length (decryption): 64
[00:00:05.772,000] <err> crypto: CBC mode DECRYPT - Mismatch between plaintext and decrypted cipher text
[00:00:05.774,000] <inf> hace_global: aspeed_crypto_session_free
uart:~$
Reviewed-by: Peter Delevoryas <peter@pjd.dev>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
|
|
Some SRAM appears to be used by the Secure Boot unit and
crypto accelerators. Name it 'secure sram'.
Note, the SRAM base address was already present but unused
(the 'SBC' index is used for the MMIO peripheral).
Interestingly using CFLAGS=-Winitializer-overrides reports:
../hw/arm/aspeed_ast10x0.c:32:30: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
[ASPEED_DEV_SBC] = 0x7E6F2000,
^~~~~~~~~~
../hw/arm/aspeed_ast10x0.c:24:30: note: previous initialization is here
[ASPEED_DEV_SBC] = 0x79000000,
^~~~~~~~~~
This fixes with Zephyr:
uart:~$ rsa test
rsa test vector[0]:
[00:00:26.156,000] <err> os: ***** BUS FAULT *****
[00:00:26.157,000] <err> os: Precise data bus error
[00:00:26.157,000] <err> os: BFAR Address: 0x79000000
[00:00:26.158,000] <err> os: r0/a1: 0x79000000 r1/a2: 0x00000000 r2/a3: 0x00001800
[00:00:26.158,000] <err> os: r3/a4: 0x79001800 r12/ip: 0x00000800 r14/lr: 0x0001098d
[00:00:26.158,000] <err> os: xpsr: 0x81000000
[00:00:26.158,000] <err> os: Faulting instruction address (r15/pc): 0x0001e1bc
[00:00:26.158,000] <err> os: >>> ZEPHYR FATAL ERROR 0: CPU exception on CPU 0
[00:00:26.158,000] <err> os: Current thread: 0x38248 (shell_uart)
[00:00:26.165,000] <err> os: Halting system
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Delevoryas <peter@pjd.dev>
[ clg: Fixed size of Secure Boot Controller Memory ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
|
|
Since I don't have access to the datasheet, the relevant
values were found in:
https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/dts/arm/aspeed/ast10x0.dtsi
Reviewed-by: Peter Delevoryas <peter@pjd.dev>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
|
|
Based on booting Zephyr demo from [1] running QEMU with
'-d unimp' and checking missing devices in [2].
[1] https://github.com/AspeedTech-BMC/zephyr/releases/tag/v00.01.07
[2] https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/dts/arm/aspeed/ast10x0.dtsi
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Delevoryas <peter@pjd.dev>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
|
|
address_space_map() can fail:
uart:~$ hash test
sha256_test
tv[0]:
Segmentation fault: 11
Thread 3 "qemu-system-arm" received signal SIGSEGV, Segmentation fault.
gen_acc_mode_iov (req_len=0x7ffff18b7778, id=<optimized out>, iov=0x7ffff18b7780, s=0x555556ce0bd0)
at ../hw/misc/aspeed_hace.c:171
171 if (has_padding(s, &iov[id], *req_len, &total_msg_len, &pad_offset)) {
(gdb) bt
#0 gen_acc_mode_iov (req_len=0x7ffff18b7778, id=<optimized out>, iov=0x7ffff18b7780, s=0x555556ce0bd0)
at ../hw/misc/aspeed_hace.c:171
#1 do_hash_operation (s=s@entry=0x555556ce0bd0, algo=3, sg_mode=sg_mode@entry=true, acc_mode=acc_mode@entry=true)
at ../hw/misc/aspeed_hace.c:224
#2 0x00005555559bdbb8 in aspeed_hace_write (opaque=<optimized out>, addr=12, data=262488, size=<optimized out>)
at ../hw/misc/aspeed_hace.c:358
This change doesn't fix much, but at least the guest
can't crash QEMU anymore. Instead it is still usable:
uart:~$ hash test
sha256_test
tv[0]:hash_final error
sha384_test
tv[0]:hash_final error
sha512_test
tv[0]:hash_final error
[00:00:06.278,000] <err> hace_global: HACE poll timeout
[00:00:09.324,000] <err> hace_global: HACE poll timeout
[00:00:12.261,000] <err> hace_global: HACE poll timeout
uart:~$
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Delevoryas <peter@pjd.dev>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
|
|
Add more Aspeed watchdog registers from [*].
Since guests can righteously access them, log the access at
'unimplemented' level instead of 'guest-errors'.
[*] https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/drivers/watchdog/wdt_aspeed.c#L31
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Delevoryas <peter@pjd.dev>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
|
|
When booting the Zephyr demo in [1] we get:
aspeed.io: unimplemented device write (size 4, offset 0x185128, value 0x030f1ff1) <--
aspeed.io: unimplemented device write (size 4, offset 0x18512c, value 0x03fffff1)
This corresponds to this Zephyr code [2]:
static int aspeed_wdt_init(const struct device *dev)
{
const struct aspeed_wdt_config *config = dev->config;
struct aspeed_wdt_data *const data = dev->data;
uint32_t reg_val;
/* disable WDT by default */
reg_val = sys_read32(config->ctrl_base + WDT_CTRL_REG);
reg_val &= ~WDT_CTRL_ENABLE;
sys_write32(reg_val, config->ctrl_base + WDT_CTRL_REG);
sys_write32(data->rst_mask1,
config->ctrl_base + WDT_SW_RESET_MASK1_REG); <------
sys_write32(data->rst_mask2,
config->ctrl_base + WDT_SW_RESET_MASK2_REG);
return 0;
}
The register definitions are [3]:
#define WDT_RELOAD_VAL_REG 0x0004
#define WDT_RESTART_REG 0x0008
#define WDT_CTRL_REG 0x000C
#define WDT_TIMEOUT_STATUS_REG 0x0010
#define WDT_TIMEOUT_STATUS_CLR_REG 0x0014
#define WDT_RESET_MASK1_REG 0x001C
#define WDT_RESET_MASK2_REG 0x0020
#define WDT_SW_RESET_MASK1_REG 0x0028 <------
#define WDT_SW_RESET_MASK2_REG 0x002C
#define WDT_SW_RESET_CTRL_REG 0x0024
Currently QEMU only cover a MMIO region of size 0x20:
#define ASPEED_WDT_REGS_MAX (0x20 / 4)
Change to map the whole 'iosize' which might be bigger, covering
the other registers. The MemoryRegionOps read/write handlers will
report the accesses as out-of-bounds guest-errors, but the next
commit will report them as unimplemented.
[1] https://github.com/AspeedTech-BMC/zephyr/releases/tag/v00.01.07
[2] https://github.com/AspeedTech-BMC/zephyr/commit/2e99f10ac27b
[3] https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/drivers/watchdog/wdt_aspeed.c#L31
Reviewed-by: Peter Delevoryas <peter@pjd.dev>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
|
|
Avoid confusing two different things:
- the WDT I/O region size ('iosize')
- at which offset the SoC map the WDT ('offset')
While it is often the same, we can map smaller region sizes
at larger offsets.
Here we are interested in the I/O region size, so rename as
'iosize'.
Reviewed-by: Peter Delevoryas <peter@pjd.dev>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
[ clg: Introduced temporary wdt_offset variable ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
|
|
EEPROM's are a form of non-volatile memory. After power-cycling an EEPROM,
I would expect the I2C state machine to be reset to default values, but I
wouldn't really expect the memory to change at all.
The current implementation of the at24c EEPROM resets its internal memory on
reset. This matches the specification in docs/devel/reset.rst:
Cold reset is supported by every resettable object. In QEMU, it means we reset
to the initial state corresponding to the start of QEMU; this might differ
from what is a real hardware cold reset. It differs from other resets (like
warm or bus resets) which may keep certain parts untouched.
But differs from my intuition. For example, if someone writes some information
to an EEPROM, then AC power cycles their board, they would expect the EEPROM to
retain that information. It's very useful to be able to test things like this
in QEMU as well, to verify software instrumentation like determining the cause
of a reboot.
Fixes: 5d8424dbd3e8 ("nvram: add AT24Cx i2c eeprom")
Signed-off-by: Peter Delevoryas <peter@pjd.dev>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Corey Minyard <cminyard@mvista.com>
Link: https://lore.kernel.org/r/20230128060543.95582-6-peter@pjd.dev
Signed-off-by: Cédric Le Goater <clg@kaod.org>
|
|
- Create aspeed_eeprom.c and aspeed_eeprom.h
- Include aspeed_eeprom.c in CONFIG_ASPEED meson source files
- Include aspeed_eeprom.h in aspeed.c
- Add fby35_bmc_fruid data
- Use new at24c_eeprom_init_rom helper to initialize BMC FRUID EEPROM with data
from aspeed_eeprom.c
wget https://github.com/facebook/openbmc/releases/download/openbmc-e2294ff5d31d/fby35.mtd
qemu-system-aarch64 -machine fby35-bmc -nographic -mtdblock fby35.mtd
...
user: root
pass: 0penBmc
...
root@bmc-oob:~# fruid-util bb
FRU Information : Baseboard
--------------- : ------------------
Chassis Type : Rack Mount Chassis
Chassis Part Number : N/A
Chassis Serial Number : N/A
Board Mfg Date : Fri Jan 7 10:30:00 2022
Board Mfg : XXXXXX
Board Product : Management Board wBMC
Board Serial : XXXXXXXXXXXXX
Board Part Number : XXXXXXXXXXXXXX
Board FRU ID : 1.0
Board Custom Data 1 : XXXXXXXXX
Board Custom Data 2 : XXXXXXXXXXXXXXXXXX
Product Manufacturer : XXXXXX
Product Name : Yosemite V3.5 EVT2
Product Part Number : XXXXXXXXXXXXXX
Product Version : EVT2
Product Serial : XXXXXXXXXXXXX
Product Asset Tag : XXXXXXX
Product FRU ID : 1.0
Product Custom Data 1 : XXXXXXXXX
Product Custom Data 2 : N/A
root@bmc-oob:~# fruid-util bmc
FRU Information : BMC
--------------- : ------------------
Board Mfg Date : Mon Jan 10 21:42:00 2022
Board Mfg : XXXXXX
Board Product : BMC Storage Module
Board Serial : XXXXXXXXXXXXX
Board Part Number : XXXXXXXXXXXXXX
Board FRU ID : 1.0
Board Custom Data 1 : XXXXXXXXX
Board Custom Data 2 : XXXXXXXXXXXXXXXXXX
Product Manufacturer : XXXXXX
Product Name : Yosemite V3.5 EVT2
Product Part Number : XXXXXXXXXXXXXX
Product Version : EVT2
Product Serial : XXXXXXXXXXXXX
Product Asset Tag : XXXXXXX
Product FRU ID : 1.0
Product Custom Data 1 : XXXXXXXXX
Product Custom Data 2 : Config A
root@bmc-oob:~# fruid-util nic
FRU Information : NIC
--------------- : ------------------
Board Mfg Date : Tue Nov 2 08:51:00 2021
Board Mfg : XXXXXXXX
Board Product : Mellanox ConnectX-6 DX OCP3.0
Board Serial : XXXXXXXXXXXXXXXXXXXXXXXX
Board Part Number : XXXXXXXXXXXXXXXXXXXXX
Board FRU ID : FRU Ver 0.02
Product Manufacturer : XXXXXXXX
Product Name : Mellanox ConnectX-6 DX OCP3.0
Product Part Number : XXXXXXXXXXXXXXXXXXXXX
Product Version : A9
Product Serial : XXXXXXXXXXXXXXXXXXXXXXXX
Product Custom Data 3 : ConnectX-6 DX
Signed-off-by: Peter Delevoryas <peter@pjd.dev>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Corey Minyard <cminyard@mvista.com>
Link: https://lore.kernel.org/r/20230128060543.95582-5-peter@pjd.dev
Signed-off-by: Cédric Le Goater <clg@kaod.org>
|
|
Allows users to specify binary data to initialize an EEPROM, allowing users to
emulate data programmed at manufacturing time.
- Added init_rom and init_rom_size attributes to TYPE_AT24C_EE
- Added at24c_eeprom_init_rom helper function to initialize attributes
- If -drive property is provided, it overrides init_rom data
Signed-off-by: Peter Delevoryas <peter@pjd.dev>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Corey Minyard <cminyard@mvista.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Tested-by: Ninad Palsule <ninadpalsule@us.ibm.com>
Link: https://lore.kernel.org/r/20230128060543.95582-4-peter@pjd.dev
Signed-off-by: Cédric Le Goater <clg@kaod.org>
|