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2024-10-13target/arm: Implement TCGCPUOps.tlb_fill_alignRichard Henderson4-34/+23
Fill in the tlb_fill_align hook. Handle alignment not due to memory type, since that's no longer handled by generic code. Pass memop to get_phys_addr. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13target/arm: Move device detection earlier in get_phys_addr_lpaeRichard Henderson1-24/+25
Determine cache attributes, and thence Device vs Normal memory, earlier in the function. We have an existing regime_is_stage2 if block into which this can be slotted. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13target/arm: Pass MemOp to get_phys_addr_lpaeRichard Henderson1-2/+4
Pass the value through from get_phys_addr_nogpc. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13target/arm: Pass MemOp through get_phys_addr_twostageRichard Henderson1-4/+6
Pass memop through get_phys_addr_twostage with its recursion with get_phys_addr_nogpc. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13target/arm: Pass MemOp to get_phys_addr_nogpcRichard Henderson1-6/+8
Zero is the safe do-nothing value for callers to use. Pass the value through from get_phys_addr_gpc and get_phys_addr_with_space_nogpc. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13target/arm: Pass MemOp to get_phys_addr_gpcRichard Henderson1-5/+6
Zero is the safe do-nothing value for callers to use. Pass the value through from get_phys_addr. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13target/arm: Pass MemOp to get_phys_addr_with_space_nogpcRichard Henderson3-6/+8
Zero is the safe do-nothing value for callers to use. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13target/arm: Pass MemOp to get_phys_addrRichard Henderson4-7/+8
Zero is the safe do-nothing value for callers to use. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13target/hppa: Implement TCGCPUOps.tlb_fill_alignRichard Henderson3-13/+16
Convert hppa_cpu_tlb_fill to hppa_cpu_tlb_fill_align so that we can recognize alignment exceptions in the correct priority order. Resolves: https://bugzilla.kernel.org/show_bug.cgi?id=219339 Tested-by: Helge Deller <deller@gmx.de> Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13target/hppa: Handle alignment faults in hppa_get_physical_addressRichard Henderson1-1/+6
In Chapter 5, Interruptions, the group 3 exceptions lists "Unaligned data reference trap" has higher priority than "Data memory break trap". Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13target/hppa: Fix priority of T, D, and B page faultsRichard Henderson1-3/+5
Drop the 'else' so that ret is overridden with the highest priority fault. Fixes: d8bc1381250 ("target/hppa: Implement PSW_X") Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13target/hppa: Perform access rights before protection id checkRichard Henderson1-6/+6
In Chapter 5, Interruptions, the group 3 exceptions lists "Data memory access rights trap" in priority order ahead of "Data memory protection ID trap". Swap these checks in hppa_get_physical_address. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13target/hppa: Add MemOp argument to hppa_get_physical_addressRichard Henderson4-7/+8
Just add the argument, unused at this point. Zero is the safe do-nothing value for all callers. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13accel/tcg: Use the alignment test in tlb_fill_alignRichard Henderson1-43/+45
When we have a tlb miss, defer the alignment check to the new tlb_fill_align hook. Move the existing alignment check so that we only perform it with a tlb hit. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13accel/tcg: Add TCGCPUOps.tlb_fill_alignRichard Henderson4-25/+67
Add a new callback to handle softmmu paging. Return the page details directly, instead of passing them indirectly to tlb_set_page. Handle alignment simultaneously with paging so that faults are handled with target-specific priority. Route all calls of the two hooks through a tlb_fill_align function local to cputlb.c. As yet no targets implement the new hook. As yet cputlb.c does not use the new alignment check. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13include/exec/memop: Introduce memop_atomicity_bitsRichard Henderson2-14/+26
Split out of mmu_lookup. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13include/exec/memop: Rename get_alignment_bitsRichard Henderson9-16/+16
Rename to use "memop_" prefix, like other functions that operate on MemOp. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13include/exec/memop: Move get_alignment_bits from tcg.hRichard Henderson2-23/+23
This function is specific to MemOp, not TCG in general. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13accel/tcg: Assert noreturn from write-only page for atomicsRichard Henderson1-3/+2
There should be no "just in case"; the page is already in the tlb, and known to be not readable. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13linux-user/vm86: Fix compilation with ClangThomas Huth1-65/+0
Since commit 95b9c27c81 ("linux-user: Remove unused handle_vm86_fault") a bunch of other "static inline" function are now unused, too. Clang warns about such unused "static inline" functions in .c files, so the build currently breaks when compiling with "--enable-werror". Remove the unused functions to get it going again. Fixes: 95b9c27c81 ("linux-user: Remove unused handle_vm86_fault") Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Dr. David Alan Gilbert <dave@treblig.org> Message-ID: <20241011161845.417342-1-thuth@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13tests/tcg: Run test-proc-mappings.py on i386Ilya Leoshkevich1-11/+6
Now that orig_ax is exposed and GDB is happy, don't skip test-proc-mappings.py on i386. In fact, it's broken only on m68k now, so skip only this architecture. Acked-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-ID: <20240912093012.402366-6-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13target/i386/gdbstub: Expose orig_axIlya Leoshkevich7-2/+77
Copy XML files describing orig_ax from GDB and glue them with CPUX86State.orig_ax. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-ID: <20240912093012.402366-5-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13target/i386/gdbstub: Factor out gdb_get_reg() and gdb_write_reg()Ilya Leoshkevich1-21/+30
i386 gdbstub handles both i386 and x86_64. Factor out two functions for reading and writing registers without knowing their bitness. While at it, simplify the TARGET_LONG_BITS == 32 case. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-ID: <20240912093012.402366-4-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13linux-user/i386: Emulate orig_axIlya Leoshkevich3-2/+9
The kernel uses orig_rax/orig_eax to store the syscall number before a syscall. One can see this value in core dumps and ptrace. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-ID: <20240912093012.402366-3-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13include/exec: Introduce env_cpu_const()Ilya Leoshkevich2-2/+13
It's the same as env_cpu(), but for const objects. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-ID: <20240912093012.402366-2-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-13tcg: remove singlestep_enabled from DisasContextBasePaolo Bonzini3-5/+3
It is used in a couple of places only, both within the same target. Those can use the cflags just as well, so remove the separate field. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-ID: <20241010083641.1785069-1-pbonzini@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-11docs: use consistent markup for footnotesPaolo Bonzini6-11/+11
Unfortunately, the definition of the footnote syntax requires the author to use the awkward escaped space "\ " in the really common case of "footnote marker at end of word or sentence"; and in fact the rST documentation's examples of footnote syntax contain only artificial examples that do *not* use the syntax. This resulted in ugly rendering of footnotes throughout QEMU's documentation. Ensure the space is escaped whenever the footnote must attach to the preceding word, and also use a named reference for clarity. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-10-11docs: avoid footnotes consisting of just URLsPaolo Bonzini2-26/+25
Replace the footnotes with inline links whenever the footnote text consists of nothing but the URL. While at it, make the link texts consistent in the surrounding areas, for example avoiding usage of "here" for the link's text. In the case of acpi-bits.rst this fixes a build failure with Sphinx 8.1.0, because the FOSDEM link was duplicated in the paragraph and the new version is a lot stricter about unreferenced footnotes. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-10-11docs: fix invalid footnote syntaxPaolo Bonzini2-3/+3
All footnotes must come after a separator in reStructuredText. Fix the two files in which this does not happen. This mistake causes the link to be rendered literally: ...from the venv itself[#distlib]_. If no... and is caught by Sphinx 8.1.0 as an unreferenced footnote. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-10-11gitlab-ci: add Rust-enabled CI jobPaolo Bonzini2-0/+19
Add a job using --enable-rust, to ensure that the toolchain is installed correctly by the Dockerfile and that QEMU builds with Rust enabled on at least one platform. Suggested-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Acked-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-10-11dockerfiles: add a Dockerfile using a nightly Rust toolchainPaolo Bonzini2-0/+199
This will be useful in order to test QEMU's Rust code with nightly clippy. It can also be used to check that the code builds, until the minimum supported Rust version is lowered enough to allow enabling Rust in other Dockerfiles too. Use a separate container, instead of the Fedora one, to avoid that CI breaks for everyone if for some reason the rustup build turns out to be shaky. Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Acked-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-10-11meson: ensure -mcx16 is passed when detecting ATOMIC128Paolo Bonzini1-4/+5
Moving -mcx16 out of CPU_CFLAGS caused the detection of ATOMIC128 to fail, because flags have to be specified by hand in cc.compiles and cc.links invocations (why oh why??). Ensure that these tests enable all the instruction set extensions that will be used to build the emulators. Fixes: c2bf2ccb266 ("configure: move -mcx16 flag out of CPU_CFLAGS", 2024-05-24) Reported-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-10-11meson: define qemu_isa_flagsPaolo Bonzini1-9/+15
Create a separate variable for compiler flags that enable specific instruction set extensions, so that they can be used with cc.compiles/cc.links. Note that -mfpmath=sse is a code generation option but it does not enable new instructions, therefore I did not make it part of qemu_isa_flags. Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-10-11meson: fix machine option for x86_versionPierrick Bouvier1-1/+1
s/mbmi1/mbmi/ When configuring with -Dx86_version >= 3, meson step works, but compilation fails because option -mbmi1 is unknown. Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Link: https://lore.kernel.org/r/20241004223715.1275428-1-pierrick.bouvier@linaro.org Cc: qemu-stable@nongnu.org Fixes: ef7d1adfa85 ("meson: allow configuring the x86-64 baseline", 2024-06-28) Revieved-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-10-11rust: add PL011 device modelPaolo Bonzini37-12/+1906
This commit adds a re-implementation of hw/char/pl011.c in Rust. How to build: 1. Configure a QEMU build with: --enable-system --target-list=aarch64-softmmu --enable-rust 2. Launching a VM with qemu-system-aarch64 should use the Rust version of the pl011 device Co-authored-by: Junjie Mao <junjie.mao@intel.com> Co-authored-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Junjie Mao <junjie.mao@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Link: https://lore.kernel.org/r/6ec1d4fb8db2a1d7ba94c73e65d9770371b7857d.1727961605.git.manos.pitsidianakis@linaro.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-10-11rust: add utility procedural macro crateManos Pitsidianakis19-2/+304
This commit adds a helper crate library, qemu-api-macros for derive (and other procedural) macros to be used along qemu-api. It needs to be a separate library because in Rust, procedural macros, or macros that can generate arbitrary code, need to be special separate compilation units. Only one macro is introduced in this patch, #[derive(Object)]. It generates a constructor to register a QOM TypeInfo on init and it must be used on types that implement qemu_api::definitions::ObjectImpl trait. Reviewed-by: Junjie Mao <junjie.mao@hotmail.com> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Link: https://lore.kernel.org/r/dd645642406a6dc2060c6f3f17db2bc77ed67b59.1727961605.git.manos.pitsidianakis@linaro.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-10-11scripts/archive-source: find directory name for subprojectsPaolo Bonzini1-1/+22
Rust subprojects have the semantic version (followed by -rs) in the subproject name, but the full version (without -rs) is used by crates.io for the root directory of the tarball. Teach scripts/archive-source.sh to look for the root directory name in wrap files. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-10-11rust: add crate to expose bindings and interfacesManos Pitsidianakis13-0/+541
Add rust/qemu-api, which exposes rust-bindgen generated FFI bindings and provides some declaration macros for symbols visible to the rest of QEMU. Co-authored-by: Junjie Mao <junjie.mao@intel.com> Co-authored-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Junjie Mao <junjie.mao@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Link: https://lore.kernel.org/r/0fb23fbe211761b263aacec03deaf85c0cc39995.1727961605.git.manos.pitsidianakis@linaro.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-10-11meson.build: add HAVE_GLIB_WITH_ALIGNED_ALLOC flagManos Pitsidianakis1-1/+7
Rust crates, introduced from the next commit onwards, can optionally use the glib allocator API and need to know whether g_aligned_alloc etc are available. This commit adds a define in config_host_data that depends on glib version >= 2.72. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Link: https://lore.kernel.org/r/23f7b0cc9801d315f5d7835e30d775e133ec2fb9.1727961605.git.manos.pitsidianakis@linaro.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-10-11.gitattributes: add Rust diff and merge attributesManos Pitsidianakis1-0/+3
Set rust source code to diff=rust (built-in with new git versions) and merge=binary for Cargo.lock files (they should not be merged but auto-generated by cargo) Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Link: https://lore.kernel.org/r/278e3878b40ecc7c424dec1ed978eedf21469f52.1727961605.git.manos.pitsidianakis@linaro.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-10-11rust: add bindgen step as a meson dependencyManos Pitsidianakis7-0/+213
Add bindings_rs target for generating rust bindings to target-independent qemu C APIs. The bindings need be created before any rust crate that uses them is compiled. The bindings.rs file will end up in BUILDDIR/bindings.rs and have the same name as a target: ninja bindings.rs Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Link: https://lore.kernel.org/r/1be89a27719049b7203eaf2eca8bbb75b33f18d4.1727961605.git.manos.pitsidianakis@linaro.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-10-11configure, meson: detect Rust toolchainPaolo Bonzini2-4/+164
Include the correct path and arguments to rustc in the native and cross files (native compilation is needed for procedural macros). Based on the host architecture and OS, the compiler and optionally the argument to --cpu, the Rust target triple can be detected automatically for either a native or a cross compiler. In general, it is only a matter of translating the architecture and OS, and adding a machine to form the triple, but there are some special cases (e.g. detecting soft vs. hard floating point on ARM) and some inconsistencies. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Link: https://lore.kernel.org/r/207d2640b32d511e9c27478ce3192f5bb0bf3169.1727961605.git.manos.pitsidianakis@linaro.org [Leave disabled by default until CI covers the Rust code on supported distros. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-10-10tests/unit: Add a assert for test_io_channel_unix_listen_cleanupKunwu1-2/+4
Calling bind without checking return value. Add a assert for it. Signed-off-by: Kunwu <chentao@kylinos.cn> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2024-10-10crypto: drop obsolete back compat logic for old nettleDaniel P. Berrangé1-14/+3
The nettle 2.x series declared all the hash functions with 'int' for the data size. Since we dropped support for anything older than 3.4 we can assume nettle is using 'size_t' and thus avoid the back compat looping logic. Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2024-10-10crypto/hashpriv: Remove old hash API functionAlejandro Zeise1-6/+0
Remove old hash_bytesv function, as it was replaced by the 4 new functions. Signed-off-by: Alejandro Zeise <alejandro.zeise@seagate.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2024-10-10crypto/hash-afalg: Remove old hash API functionsAlejandro Zeise1-56/+4
Removes the old hash API functions in the afalg driver, and modifies the hmac function to use the new helper functions. Signed-off-by: Alejandro Zeise <alejandro.zeise@seagate.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> [ clg: - Checkpatch fixes ] Signed-off-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2024-10-10crypto/hash-nettle: Remove old hash API functionsAlejandro Zeise1-53/+0
Removes old hash implementation in the nettle hash driver. Signed-off-by: Alejandro Zeise <alejandro.zeise@seagate.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> [ clg: - Fixed spelling in commit log ] Signed-off-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2024-10-10crypto/hash-gnutls: Remove old hash API functionsAlejandro Zeise1-47/+0
Removes old hash implementation in the gnutls hash driver. Signed-off-by: Alejandro Zeise <alejandro.zeise@seagate.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> [ clg: - Fixed spelling in commit log ] Signed-off-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2024-10-10crypto/hash-gcrypt: Remove old hash API functionsAlejandro Zeise1-67/+0
Removes old hash implementation in the gcrypt hash driver. Signed-off-by: Alejandro Zeise <alejandro.zeise@seagate.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> [ clg: - Fixed spelling in commit log ] Signed-off-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2024-10-10crypto/hash-glib: Remove old hash API functionsAlejandro Zeise1-53/+0
Removes old hash implement-ion in the GLib hash driver. Signed-off-by: Alejandro Zeise <alejandro.zeise@seagate.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> [ clg: - Fixed spelling in commit log ] Signed-off-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>