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path: root/rust/qemu-api-macros/src/utils.rs (unfollow)
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2025-03-08accel/tcg: Split out getpc.hRichard Henderson2-9/+25
2025-03-08accel/tcg: Restrict GETPC_ADJ to 'tb-internal.h'Philippe Mathieu-Daudé2-9/+11
2025-03-08accel/tcg: Build tcg-accel-ops-mttcg.c onceRichard Henderson2-2/+1
2025-03-08accel/tcg: Build tcg-accel-ops-rr.c onceRichard Henderson2-2/+2
2025-03-08accel/tcg: Build tcg-accel-ops-icount.c onceRichard Henderson2-2/+2
2025-03-08accel/tcg: Build tcg-accel-ops.c onceRichard Henderson1-1/+1
2025-03-08system: Build watchpoint.c onceRichard Henderson1-1/+1
2025-03-08exec: Declare tlb_flush*() in 'exec/cputlb.h'Philippe Mathieu-Daudé34-211/+224
2025-03-08exec: Declare tlb_hit*() in 'exec/cputlb.h'Philippe Mathieu-Daudé2-23/+23
2025-03-08exec: Declare tlb_set_page() in 'exec/cputlb.h'Philippe Mathieu-Daudé15-15/+24
2025-03-08exec: Declare tlb_set_page_with_attrs() in 'exec/cputlb.h'Philippe Mathieu-Daudé4-27/+30
2025-03-08exec: Declare tlb_set_page_full() in 'exec/cputlb.h'Philippe Mathieu-Daudé3-23/+24
2025-03-08exec: Declare tlb_reset_dirty*() in 'exec/cputlb.h'Philippe Mathieu-Daudé4-3/+9
2025-03-08accel/tcg: Compile watchpoint.c onceRichard Henderson4-6/+5
2025-03-08include/exec: Split out exec/cpu-interrupt.hRichard Henderson3-65/+71
2025-03-07include/exec: Move TARGET_PAGE_{SIZE,MASK,BITS} to target_page.hRichard Henderson5-48/+51
2025-03-07accel/tcg: Restrict CPU_TLB_DYN_*_BITS definitions to accel/tcg/Philippe Mathieu-Daudé2-26/+27
2025-03-07linux-user/main: Allow setting tb-sizeIlya Leoshkevich1-0/+12
2025-03-06include: Poison TARGET_PHYS_ADDR_SPACE_BITS definitionPhilippe Mathieu-Daudé1-0/+1
2025-03-06system: Open-code qemu_init_arch_modules() using target_name()Philippe Mathieu-Daudé3-12/+6
2025-03-06target/i386: Mark WHPX APIC region as little-endianPhilippe Mathieu-Daudé1-1/+1
2025-03-06target/alpha: Do not mix exception flags and FPCR bitsPhilippe Mathieu-Daudé1-8/+7
2025-03-06target/riscv: Convert misa_mxl_max using GLib macrosPhilippe Mathieu-Daudé1-5/+5
2025-03-06target/riscv: Declare RISCVCPUClass::misa_mxl_max as RISCVMXLPhilippe Mathieu-Daudé2-2/+2
2025-03-06target/xtensa: Finalize config in xtensa_register_core()Philippe Mathieu-Daudé2-3/+4
2025-03-06target/sparc: Constify SPARCCPUClass::cpu_defPhilippe Mathieu-Daudé1-1/+1
2025-03-06target/i386: Constify X86CPUModel usesPhilippe Mathieu-Daudé2-5/+5
2025-03-06disas: Remove target_words_bigendian() call in initialize_debug_target()Philippe Mathieu-Daudé1-6/+2
2025-03-06target/xtensa: Set disassemble_info::endian value in disas_set_info()Philippe Mathieu-Daudé1-0/+2
2025-03-06target/sh4: Set disassemble_info::endian value in disas_set_info()Philippe Mathieu-Daudé1-0/+2
2025-03-06target/riscv: Set disassemble_info::endian value in disas_set_info()Philippe Mathieu-Daudé1-0/+9
2025-03-06target/ppc: Set disassemble_info::endian value in disas_set_info()Philippe Mathieu-Daudé1-0/+2
2025-03-06target/mips: Set disassemble_info::endian value in disas_set_info()Philippe Mathieu-Daudé1-5/+5
2025-03-06target/microblaze: Set disassemble_info::endian value in disas_set_infoPhilippe Mathieu-Daudé1-0/+2
2025-03-06target/arm: Set disassemble_info::endian value in disas_set_info()Philippe Mathieu-Daudé1-7/+3
2025-03-06target: Set disassemble_info::endian value for big-endian targetsPhilippe Mathieu-Daudé5-0/+5
2025-03-06target: Set disassemble_info::endian value for little-endian targetsPhilippe Mathieu-Daudé6-0/+6
2025-03-06target/mips: Fix possible MSA int overflowDenis Rastyogin1-3/+3
2025-03-06target/tricore: Ensure not being build on user emulationPhilippe Mathieu-Daudé1-0/+4
2025-03-06target/rx: Ensure not being build on user emulationPhilippe Mathieu-Daudé3-12/+4
2025-03-06target/hexagon: Ensure not being build on system emulationPhilippe Mathieu-Daudé1-0/+4
2025-03-06target/openrisc: Call cpu_openrisc_clock_init() in cpu_realize()Philippe Mathieu-Daudé3-4/+4
2025-03-06target/i386/hvf: Variable type fixup in decoderPhil Dennis-Jordan1-2/+2
2025-03-06target/microblaze: Consider endianness while translating codePhilippe Mathieu-Daudé2-2/+10
2025-03-06target/microblaze: Introduce mo_endian() helperPhilippe Mathieu-Daudé1-4/+10
2025-03-06target/microblaze: Set MO_TE once in do_load() / do_store()Philippe Mathieu-Daudé1-16/+20
2025-03-06target/microblaze: Explode MO_TExx -> MO_TE | MO_xxPhilippe Mathieu-Daudé1-18/+18
2025-03-06hw/core/generic-loader: Do not open-code cpu_set_pc()Philippe Mathieu-Daudé1-4/+1
2025-03-06cpus: Restrict cpu_get_memory_mapping() to system emulationPhilippe Mathieu-Daudé1-2/+2
2025-03-06cpus: Have cpu_exec_initfn() per user / system emulationPhilippe Mathieu-Daudé3-9/+12