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2025-04-03hw/arm: Do not build VMapple machine by defaultPhilippe Mathieu-Daudé1-0/+1
Unfortunately as of v10.0.0-rc2 the VMapple machine is unusable: $ qemu-system-aarch64 -M vmapple [...] *** Terminating app due to uncaught exception 'NSInvalidArgumentException', reason: '-[PGIOSurfaceHostDeviceDescriptor setMapMemory:]: unrecognized selector sent to instance 0x600001ede820' *** First throw call stack: ( 0 CoreFoundation 0x000000019c759df0 __exceptionPreprocess + 176 1 libobjc.A.dylib 0x000000019c21eb60 objc_exception_throw + 88 2 CoreFoundation 0x000000019c816ce0 -[NSObject(NSObject) __retain_OA] + 0 3 CoreFoundation 0x000000019c6c7efc ___forwarding___ + 1500 4 CoreFoundation 0x000000019c6c7860 _CF_forwarding_prep_0 + 96 5 qemu-system-aarch64 0x000000010486dbd0 apple_gfx_mmio_realize + 200 6 qemu-system-aarch64 0x0000000104e6ab5c device_set_realized + 352 7 qemu-system-aarch64 0x0000000104e7250c property_set_bool + 100 8 qemu-system-aarch64 0x0000000104e7023c object_property_set + 136 9 qemu-system-aarch64 0x0000000104e74870 object_property_set_qobject + 60 10 qemu-system-aarch64 0x0000000104e70748 object_property_set_bool + 60 11 qemu-system-aarch64 0x0000000104e69bd8 qdev_realize_and_unref + 20 12 qemu-system-aarch64 0x0000000104e258e0 mach_vmapple_init + 1728 13 qemu-system-aarch64 0x000000010481b0ac machine_run_board_init + 1892 14 qemu-system-aarch64 0x0000000104a4def8 qmp_x_exit_preconfig + 260 15 qemu-system-aarch64 0x0000000104a51ba8 qemu_init + 14460 16 qemu-system-aarch64 0x0000000104f7cef8 main + 36 17 dyld 0x000000019c25eb4c start + 6000 ) libc++abi: terminating due to uncaught exception of type NSException Abort trap: 6 Disable the machine so it isn't built by default. This is tracked as https://gitlab.com/qemu-project/qemu/-/issues/2913 Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250403203241.46692-6-philmd@linaro.org>
2025-04-03tests/qtest: Skip Aarch64 VMapple machinePhilippe Mathieu-Daudé1-0/+1
First, the VMapple machine only works with the ARM 'host' CPU type, which isn't accepted for QTest: $ qemu-system-aarch64 -M vmapple -accel qtest qemu-system-aarch64: The 'host' CPU type can only be used with KVM or HVF Second, the QTest framework expects machines to be createable without specifying optional arguments, however the VMapple machine requires few of them: $ qemu-system-aarch64 -M vmapple -accel qtest qemu-system-aarch64: No firmware specified $ qemu-system-aarch64 -M vmapple -accel qtest -bios /dev/null qemu-system-aarch64: No AUX device. Please specify one as pflash drive. Restrict this machine with QTest so we can at least run check-qtest, otherwise we get: $ make check-qtest-aarch64 qemu-system-aarch64: The 'host' CPU type can only be used with KVM or HVF Broken pipe ../tests/qtest/libqtest.c:199: kill_qemu() tried to terminate QEMU process but encountered exit status 1 (expected 0) ... 7/26 qemu:qtest+qtest-aarch64 / qtest-aarch64/test-hmp ERROR 24.71s killed by signal 6 SIGABRT 2/26 qemu:qtest+qtest-aarch64 / qtest-aarch64/qom-test ERROR 71.23s killed by signal 6 SIGABRT Suggested-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250403203241.46692-5-philmd@linaro.org>
2025-04-03tests/functional: Skip aarch64_replay test on macOSPhilippe Mathieu-Daudé1-1/+3
As of v10.0.0-rc2 this test is still failing on macos: $ make check-functional-aarch64 V=1 ... ERROR:../../replay/replay-internal.c:235:replay_mutex_unlock: assertion failed: (replay_mutex_locked()) Bail out! ERROR:../../replay/replay-internal.c:235:replay_mutex_unlock: assertion failed: (replay_mutex_locked()) This is tracked as https://gitlab.com/qemu-project/qemu/-/issues/2907 Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250403203241.46692-4-philmd@linaro.org>
2025-04-03tests/functional: Add a decorator for skipping tests on particular OSPhilippe Mathieu-Daudé2-2/+15
Since tests might be failing on some operating systems, introduce the skipIfOperatingSystem() decorator. Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250403203241.46692-3-philmd@linaro.org>
2025-04-03tests/functional/test_aarch64_rme_virt: fix sporadic failurePierrick Bouvier1-1/+3
This test was randomly failing on our CI, and on dev machines, especially with QEMU debug builds. >From the information collected, it's related to an implementation choice in edk2 QEMU virt support. The workaround is to disable KASLR, to avoid accessing protected memory. Note: this is *not* needed for the similar test_aarch64_rme_sbsaref. More information is available on the associated GitLab issue. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2823 Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250328183816.2687925-1-pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250403203241.46692-2-philmd@linaro.org>
2025-04-03tcg: Allocate TEMP_VAL_MEM frame in temp_load()Philippe Mathieu-Daudé1-0/+3
Be sure to allocate the temp frame if it wasn't. In the resolved issues, incomplete dead code elimination left a load at the top of an unreachable loop. We simply need to allocate the stack slot to avoid crashing. Fixes: c896fe29d6c ("TCG code generator") Reported-by: Michael Tokarev <mjt@tls.msk.ru> Reported-by: Helge Konetzka <hk@zapateado.de> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2891 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2899 Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250401144332.41615-1-philmd@linaro.org>
2025-04-03Revert "iotests: Stop NBD server in test 162 before starting the next one"Thomas Huth1-1/+0
This reverts commit e2668ba1ed44ad56f2f1653ff5f53b277d534fac. This commit made test 162 fail occasionally with: 162 fail [13:06:40] [13:06:40] 0.2s (last: 0.2s) output mismatch --- tests/qemu-iotests/162.out +++ tests/qemu-iotests/scratch/qcow2-file-162/162.out.bad @@ -3,6 +3,7 @@ === NBD === qemu-img: Could not open 'json:{"driver": "nbd", "host": -1}': address resolution failed for -1:10809: Name or service not known image: nbd://localhost:PORT +./common.rc: line 371: kill: (891116) - No such process image: nbd+unix://?socket=42 The nbd server should normally terminate automatically, so trying to kill it here now seems to cause a race that will cause a test failure when the server terminated before the kill command has been executed. The "Stop NBD server" patch has originally been written to solve another problem with a hanging nbd server, but since that problem has been properly solved by commit 3e1683485656, we now don't need the "_stop_nbd_server" here anymore. Reviewed-by: Hanna Czenczek <hreitz@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Message-ID: <20250326143533.932899-1-thuth@redhat.com> Signed-off-by: Eric Blake <eblake@redhat.com>
2025-04-02hw/i386/amd_iommu: Assign pci-id 0x1419 for the AMD IOMMU deviceSuravee Suthikulpanit1-0/+1
Currently, the QEMU-emulated AMD IOMMU device use PCI vendor id 0x1022 (AMD) with device id zero (undefined). Eventhough this does not cause any functional issue for AMD IOMMU driver since it normally uses information in the ACPI IVRS table to probe and initialize the device per recommendation in the AMD IOMMU specification, the device id zero causes the Windows Device Manager utility to show the device as an unknown device. Since Windows only recognizes AMD IOMMU device with device id 0x1419 as listed in the machine.inf file, modify the QEMU AMD IOMMU model to use the id 0x1419 to avoid the issue. This advertise the IOMMU as the AMD IOMMU device for Family 15h (Models 10h-1fh). Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Message-Id: <20250325021140.5676-1-suravee.suthikulpanit@amd.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Yan Vugenfirer <yvugenfi@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-04-02virtio-net: Fix num_buffers for version 1Akihiko Odaki1-0/+2
The specification says the device MUST set num_buffers to 1 if VIRTIO_NET_F_MRG_RXBUF has not been negotiated. Fixes: df91055db5c9 ("virtio-net: enable virtio 1.0") Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20250108-buffers-v1-1-a0c85ff31aeb@daynix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Tested-by: Lei Yang <leiyang@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-04-01Update version for v10.0.0-rc2 releaseStefan Hajnoczi1-1/+1
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-04-01hw/misc/aspeed_scu: Correct minimum access size for AST2500 / AST2600Joel Stanley1-2/+2
Guest code was performing a byte load to the SCU MMIO region, leading to the guest code crashing (it should be using proper accessors, but that is not Qemu's bug). Hardware and the documentation[1] both agree that byte loads are okay, so change all of the aspeed SCU devices to accept a minimum access size of 1. [1] See the 'ARM Address Space Mapping' table in the ASPEED docs. This is section 6.1 in the ast2400 and ast2700, and 7.1 in the ast2500 and ast2600 datasheets. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2636 Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Troy Lee <leetroy@gmail.com> Message-ID: <20241118021820.4928-1-joel@jms.id.au> [PMD: Rebased, only including SCU changes] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Link: https://lore.kernel.org/qemu-devel/20250331230444.88295-3-philmd@linaro.org Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-04-01hw/misc/aspeed_scu: Set MemoryRegionOps::impl::access_size to 32-bitPhilippe Mathieu-Daudé1-0/+12
All MemoryRegionOps::read/write() handlers switch over a 32-bit aligned value, because converted using TO_REG(), which is defined as: #define TO_REG(offset) ((offset) >> 2) So all implementations are 32-bit. Set min/max access_size accordingly. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Link: https://lore.kernel.org/qemu-devel/20250331230444.88295-2-philmd@linaro.org Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-03-31target/mips: Simplify and fix update_pagemaskRichard Henderson3-7/+7
When update_pagemask was split from helper_mtc0_pagemask, we failed to actually write to the new parameter but continue to write to env->CP0_PageMask. Thus the use within page_table_walk_refill modifies cpu state and not the local variable as expected. Simplify by renaming to compute_pagemask and returning the value directly. No need for either env or pointer return. Fixes: 074cfcb4dae ("target/mips: Implement hardware page table walker for MIPS32") Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250328175526.368121-4-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Cc: qemu-stable@nongnu.org
2025-03-31target/mips: Require even maskbits in update_pagemaskRichard Henderson1-15/+8
The number of bits set in PageMask must be even. Fixes: d40b55bc1b86 ("target/mips: Fix PageMask with variable page size") Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250328175526.368121-3-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Cc: qemu-stable@nongnu.org
2025-03-31target/mips: Revert TARGET_PAGE_BITS_VARYRichard Henderson5-14/+2
Revert ee3863b9d41 and a08d60bc6c2b. The logic behind changing the system page size because of what the Loongson kernel "prefers" is flawed. In the Loongson-2E manual, section 5.5, it is clear that the cpu supports a 4k page size (along with many others). Similarly for the Loongson-3 series CPUs, the 4k page size is mentioned in the section 7.7 (PageMask Register). Therefore we must continue to support a 4k page size. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250328175526.368121-2-richard.henderson@linaro.org> [PMD: Mention Loongson-3 series CPUs] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-03-31target/sparc: Log unimplemented ASI load/store accessesPhilippe Mathieu-Daudé1-0/+6
When the cache-controller feature is not implemented, log potential ASI access as unimplemented. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Clément Chigot <chigot@adacore.com> Message-Id: <20250325123927.74939-4-philmd@linaro.org>
2025-03-31target/avr: Fix buffer read in avr_print_insnRichard Henderson1-7/+14
Do not unconditionally attempt to read 4 bytes, as there may only be 2 bytes remaining in the translator cache. Cc: qemu-stable@nongnu.org Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20250325224403.4011975-2-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-03-31target/hppa: Remove duplicated CPU_RESOLVING_TYPE definitionPhilippe Mathieu-Daudé1-2/+0
The CPU_RESOLVING_TYPE definition was added in commit 0dacec874fa ("cpu: add CPU_RESOLVING_TYPE macro"), but then added again in commit d3ae32d4d20. Remove the duplication. Fixes: d3ae32d4d20 ("target/hppa: Implement cpu_list") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250321184200.4329-1-philmd@linaro.org>
2025-03-31hw/pci-host/designware: Fix ATU_UPPER_TARGET register accessPhilippe Mathieu-Daudé1-1/+1
Fix copy/paste error writing to the ATU_UPPER_TARGET register, we want to update the upper 32 bits. Cc: qemu-stable@nongnu.org Reported-by: Joey <jeundery@gmail.com> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2861 Fixes: d64e5eabc4c ("pci: Add support for Designware IP block") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org> Message-Id: <20250331152041.74533-2-philmd@linaro.org>
2025-03-31hw/ufs: free irq on exitZheng Huang1-0/+3
Fix a memory leak bug in ufs_init_pci() due to u->irq not being freed in ufs_exit(). Signed-off-by: Zheng Huang <hz1624917200@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <43ceb427-87aa-44ee-9007-dbaecc499bba@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-03-31hw/char/bcm2835_aux: Fix incorrect interrupt ID when RX disabledChung-Yi Chen1-1/+1
Fix a misconfiguration issue in the read implementation of the AUX_MU_IIR_REG register. This issue can lead to a transmit interrupt being incorrectly interpreted as a receive interrupt when the receive interrupt is disabled and the receive FIFO holds valid bytes. The AUX_MU_IIR_REG register (interrupt ID bits [2:1]) indicates the status of mini UART interrupts: - 00: No interrupts - 01: Transmit FIFO is empty - 10: Receive FIFO is not empty - 11: <Not possible> When the transmit interrupt is enabled and the receive interrupt is disabled, the original code incorrectly sets the interrupt ID bits. Specifically: 1. Transmit FIFO empty, receive FIFO empty - Expected 0b01, returned 0b01 (correct) 2. Transmit FIFO empty, receive FIFO not empty - Expected 0b01, returned 0b10 (incorrect) In the second case, the code sets the interrupt ID to 0b10 (receive FIFO is not empty) even if the receive interrupt is disabled. To fix this, the patch adds additional condition for setting the interrupt ID bits to also check if the receive interrupt is enabled. Reference: BCM2835 ARM Peripherals, page 13. Available on https://datasheets.raspberrypi.com/bcm2835/bcm2835-peripherals.pdf Fixes: 97398d900ca ("bcm2835_aux: add emulation of BCM2835 AUX (aka UART1) block") Signed-off-by: Chung-Yi Chen <yeechen0207@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250328123725.94176-1-yeechen0207@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-03-31hw/sd/sdhci: free irq on exitZheng Huang1-0/+2
Fix a memory leak bug in sdhci_pci_realize() due to s->irq not being freed in sdhci_pci_exit(). Signed-off-by: Zheng Huang <hz1624917200@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <09ddf42b-a6db-42d5-954b-148d09d8d6cc@gmail.com> [PMD: Moved qemu_free_irq() call before sdhci_common_unrealize()] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-03-31hw/scsi/lsi53c895a: fix memory leak in lsi_scsi_realize()Zheng Huang1-1/+1
Address a memory leak bug in the usages of timer_del(). The issue arises from the incorrect use of the ambiguous timer API timer_del(), which does not free the timer object. The LeakSanitizer report this issue during fuzzing. The correct API timer_free() freed the timer object instead. ================================================================= ==2586273==ERROR: LeakSanitizer: detected memory leaks Direct leak of 48 byte(s) in 1 object(s) allocated from: #0 0x55f2afd89879 in calloc /llvm-project/compiler-rt/lib/asan/asan_malloc_linux.cpp:75:3 #1 0x7f443b93ac50 in g_malloc0 (/lib/x86_64-linux-gnu/libglib-2.0.so.0+0x5ec50) #2 0x55f2b053962e in timer_new include/qemu/timer.h:542:12 #3 0x55f2b0514771 in timer_new_us include/qemu/timer.h:582:12 #4 0x55f2b0514288 in lsi_scsi_realize hw/scsi/lsi53c895a.c:2350:24 #5 0x55f2b0452d26 in pci_qdev_realize hw/pci/pci.c:2174:9 Signed-off-by: Zheng Huang <hz1624917200@outlook.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <73cd69f9-ff9b-4cd4-b8aa-265f9d6067b9@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-03-31hw/nvram/xlnx-efuse: Do not expose as user-creatablePhilippe Mathieu-Daudé1-0/+2
This device is part of SoC components thus can not be created manually. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20250325224310.8785-10-philmd@linaro.org>
2025-03-31hw/misc/pll: Do not expose as user-creatablePhilippe Mathieu-Daudé3-0/+18
All these devices are part of SoC components and can not be created manually. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20250325224310.8785-9-philmd@linaro.org>
2025-03-31hw/rtc/goldfish: keep time offset when resettingHeinrich Schuchardt1-7/+6
Currently resetting the leads to resynchronizing the Goldfish RTC with the system clock of the host. In real hardware an RTC reset would not change the wall time. Other RTCs like pl031 do not show this behavior. Move the synchronization of the RTC with the system clock to the instance realization. Cc: qemu-stable@nongnu.org Reported-by: Frederik Du Toit Lotter <fred.lotter@canonical.com> Fixes: 9a5b40b8427 ("hw: rtc: Add Goldfish RTC device") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250321221248.17764-1-heinrich.schuchardt@canonical.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-03-31hw/mips: Mark the "mipssim" machine as deprecatedThomas Huth1-0/+13
We are not aware of anybody still using this machine, support for it has been withdrawn from the Linux kernel (i.e. there also won't be any future development anymore), and we are not aware of any binaries online that could be used for regression testing to avoid that the machine bitrots ... thus let's mark it as deprecated now. Signed-off-by: Thomas Huth <thuth@redhat.com> Acked-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250121103655.1285596-1-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-03-31hw/dma/i82374: Categorize and add descriptionPhilippe Mathieu-Daudé1-0/+2
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20250325224310.8785-5-philmd@linaro.org>
2025-03-31hw/display/dm163: Add descriptionPhilippe Mathieu-Daudé1-1/+1
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20250325224310.8785-4-philmd@linaro.org>
2025-03-31hw/block/m25p80: Categorize and add descriptionPhilippe Mathieu-Daudé1-0/+2
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20250325224310.8785-3-philmd@linaro.org>
2025-03-31hw/core/cpu: Use size_t for memory_rw_debug len argumentRichard Henderson3-3/+3
Match the prototype of cpu_memory_rw_debug(). Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250325224403.4011975-4-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-03-31hw/arm/fsl-imx8mp: Remove unused defineBernhard Beschow1-1/+0
The SoC has three SPI controllers, not four. Remove the extra define of an SPI IRQ. Fixes: 06908a84f036 "hw/arm/fsl-imx8mp: Add SPI controllers" Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-ID: <20250318205709.28862-4-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-03-31hw/arm/fsl-imx8mp: Derive struct FslImx8mpState from TYPE_SYS_BUS_DEVICEBernhard Beschow3-3/+4
Deriving from TYPE_SYS_BUS_DEVICE fixes the SoC object to be reset upon machine reset. It also makes the SoC implementation not user-creatable which can trigger the following crash: $ ./qemu-system-aarch64 -M virt -device fsl-imx8mp ** ERROR:../../devel/qemu/tcg/tcg.c:1006:tcg_register_thread: assertion failed: (n < tcg_max_ctxs) Bail out! ERROR:../../devel/qemu/tcg/tcg.c:1006:tcg_register_thread: assertion failed: (n < tcg_max_ctxs) Aborted (core dumped) Fixes: a4eefc69b237 "hw/arm: Add i.MX 8M Plus EVK board" Reported-by: Thomas Huth <thuth@redhat.com> Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-ID: <20250318205709.28862-3-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-03-31hw/arm/imx8mp-evk: Fix reference count of SoC objectBernhard Beschow1-1/+1
TYPE_FSL_IMX8MP is created using object_new(), so must be realized with qdev_realize_and_unref() to keep the reference counting intact. Fixes: a4eefc69b237 "hw/arm: Add i.MX 8M Plus EVK board" Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-ID: <20250318205709.28862-2-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-03-31hw/arm/armv7m: Expose and access System Control Space as little endianPhilippe Mathieu-Daudé1-7/+7
We only build ARM system emulators using little endianness, so the MO_TE definition always expands to MO_LE, and DEVICE_TARGET_ENDIAN to DEVICE_LITTLE_ENDIAN. Replace the definitions by their expanded value, making it closer to the Armv7-M Architecture Reference Manual (ARM DDI 0403E) description: The System Control Space (SCS, address range 0xE000E000 to 0xE000EFFF) is a memory-mapped 4KB address space that provides 32-bit registers for configuration, status reporting and control. All accesses to the SCS are little endian. Fixes: d5d680cacc ("memory: Access MemoryRegion with endianness") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250312104821.1012-1-philmd@linaro.org>
2025-03-31migration: fix SEEK_CUR offset calculation in qio_channel_block_seekMarco Cavenati1-1/+1
The SEEK_CUR case in qio_channel_block_seek was incorrectly using the 'whence' parameter instead of the 'offset' parameter when calculating the new position. Fixes: 65cf200a51 ("migration: introduce a QIOChannel impl for BlockDriverState VMState") Signed-off-by: Marco Cavenati <Marco.Cavenati@eurecom.fr> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Message-ID: <20250326162230.3323199-1-Marco.Cavenati@eurecom.fr> Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-03-28Revert "target/riscv/kvm: add missing KVM CSRs"Daniel Henrique Barboza1-6/+0
This commit breaks KVM boot on older kernels, like reported in [1], due to senvcfg not being available in them. There's also another problem related to scounteren. Using a recent enough guest buildroot, 'ping' will be build with rdtime support. In this case, doing a ping in a KVM guest while exposing scounteren will result in an error. The root cause relates to how KVM handles scounteren, but QEMU can work around it by initializing scounteren with the host value during init(). Fixing these issues in a non-rushed-bandaid manner results in an amount of design changes that I don't feel comfortable pushing during code freeze, so for 10.0 we'll remove the CSRs and re-introduce them in 10.1 with the adequate support. This reverts commit 4db19d5b21e058e6eb3474b6be470d1184afaa9e. [1] https://lore.kernel.org/qemu-riscv/CABJz62OfUDHYkQ0T3rGHStQprf1c7_E0qBLbLKhfv=+jb0SYAw@mail.gmail.com/ Reported-by: Andrea Bolognani <abologna@redhat.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20250327152052.707657-1-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-03-28docs/specs/riscv-iommu: Fixed broken link to external risv iommu documenthemanshu.khilari.foss1-3/+3
The links to riscv iommu specification document are incorrect. This patch updates all the said link to point to correct location. Cc: qemu-stable@nongnu.org Cc: qemu-riscv@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2808 Signed-off-by: hemanshu.khilari.foss <hemanshu.khilari.foss@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250323063404.13206-1-hemanshu.khilari.foss@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-03-28docs: Added docs/specs/riscv-iommu.rst in MAINTAINERS file.hemanshu.khilari.foss1-0/+1
Added docs/specs/riscv-iommu.rst under `RISC-V TCG CPUs` section in in MAINTAINERS file since `scripts/get_maintainer.pl -f docs/specs/riscv-iommu.rst` doesn't list any maintainers. Signed-off-by: hemanshu.khilari.foss <hemanshu.khilari.foss@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250323140151.9994-1-hemanshu.khilari.foss@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-03-27migration: Avoid SNP guest crash due to duplicate cpr blockerSteve Sistare1-7/+13
With aux-ram-share=off, booting an SNP guest fails with: ../util/error.c:68: error_setv: Assertion `*errp == NULL' failed. This is because a CPR blocker for the guest_memfd ramblock is added twice, once in ram_block_add_cpr_blocker because aux-ram-share=off so rb->fd < 0, and once in ram_block_add for a specific guest_memfd blocker. To fix, add the guest_memfd blocker iff a generic one would not be added by ram_block_add_cpr_blocker. Fixes: 094a3dbc55df ("migration: ram block cpr blockers") Reported-by: Tom Lendacky <thomas.lendacky@amd.com> Reported-by: Michael Roth <michael.roth@amd.com> Tested-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Message-ID: <1743087130-429075-1-git-send-email-steven.sistare@oracle.com> [reword subject line] Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-03-27target/loongarch: Fix the cpu unplug resource leakXianglai Li2-1/+7
When the cpu is created, qemu_add_vm_change_state_handler is called in the kvm_arch_init_vcpu function to create the VMChangeStateEntry resource. However, the resource is not released when the cpu is destroyed. This results in a qemu process segment error when the virtual machine restarts after the cpu is unplugged. This patch solves the problem by adding the corresponding resource release process to the kvm_arch_destroy_vcpu function. Signed-off-by: Xianglai Li <lixianglai@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20250324123328.518076-1-lixianglai@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2025-03-27tests/functional/test_vnc: Skip test if VNC support is not availableThomas Huth1-4/+22
These tests currently fail if VNC support has not been compiled into the QEMU binary. Let's add some checks to skip the tests in that case instead. Message-ID: <20250325064715.278876-1-thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-03-27tests/functional/test_aarch64_virt_gpu: Skip if "dbus" display isn't availableThomas Huth2-1/+3
This test currently fails if the "dbus" display has not been compiled into the binary (which can happen when CFI has been enabled, for example). Check for the error message to skip the test in that case. While we're at it, also make sure that this test is covered in the right section in the MAINTAINERS file. Message-ID: <20250325061609.272847-1-thuth@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-03-27target/s390x: Fix a typo in s390_cpu_class_init()Philippe Mathieu-Daudé1-1/+1
Replace the comma at the end of the line by a semicolon. Fixes: 41868f846d2 ("s390x/cpumodel: "host" and "qemu" as CPU subclasses") Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250324165356.39540-1-philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-03-27tests/functional: Add missing require_netdev('user') statementsThomas Huth7-1/+16
A bunch of tests are using "-netdev user" but fail to check for the availability of SLIRP in the binary, so these tests fail if QEMU has been configured with "--disable-slirp" (most of the tests are disabled by default with a decorator, that's likely why nobody noticed this problem yet). Add the missing self.require_netdev('user') statements to skip the tests if SLIRP is not available. Message-ID: <20250324123450.111307-1-thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-03-27tests/functional/meson.build: Bump arm_aspeed_bletchley timeoutPeter Maydell1-1/+1
The arm_aspeed_bletchley timeout takes more than its current 120s timeout on a debug Rust config: $ time (cd build/rust; PYTHONPATH=../../python:../../tests/functional QEMU_TEST_QEMU_BINARY=./qemu-system-arm ./pyvenv/bin/python3 ../../tests/functional/test_arm_aspeed_bletchley.py) TAP version 13 ok 1 test_arm_aspeed_bletchley.BletchleyMachine.test_arm_ast2600_bletchley_openbmc 1..1 real 2m15.536s user 3m21.444s sys 0m11.558s Bump it up to 480s, same as arm_aspeed_rainier. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20250321155806.1888867-1-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-03-27tests/functional/test_ppc64_replay: Mark the e500 test as flakyThomas Huth1-1/+2
The test_ppc64_e500 occasionally fails (it just hangs and finally times out). The same issue could also be reproduced with the former Avocado test already (especially if the host system is under heavy load), so it's not a new regression. It's very likely the issue that has been filed at https://gitlab.com/qemu-project/qemu/-/issues/2523 instead (e.g. I could not reproduce the issue in older commits before commit 578912ad), so use this URL for the reasoning in the the decorator. Message-ID: <20250320065012.309520-1-thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-03-25Update version for v10.0.0-rc1 releaseStefan Hajnoczi1-1/+1
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-03-23hw/misc/aspeed_hace: Fix buffer overflow in has_padding functionJamin Lin1-0/+5
The maximum padding size is either 64 or 128 bytes and should always be smaller than "req_len". If "padding_size" exceeds "req_len", then "req_len - padding_size" underflows due to "uint32_t" data type, leading to a large incorrect value (e.g., `0xFFXXXXXX`). This causes an out-of-bounds memory access, potentially leading to a buffer overflow. Added a check to ensure "padding_size" does not exceed "req_len" before computing "pad_offset". This prevents "req_len - padding_size" from underflowing and avoids accessing invalid memory. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Fixes: 5cd7d8564a8b563da724b9e6264c967f0a091afa ("aspeed/hace: Support AST2600 HACE ") Link: https://lore.kernel.org/qemu-devel/20250321092623.2097234-3-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-03-23hw/intc/aspeed: Fix IRQ handler mask checkSteven Lee1-1/+1
Updated the IRQ handler mask check to AND with select variable. This ensures that the interrupt service routine is correctly triggered for the interrupts within the same irq group. For example, both `eth0` and the debug UART are handled in `GICINT132`. Without this fix, the debug console may hang if the `eth0` ISR is not handled. Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Change-Id: Ic3609eb72218dfd68be6057d78b8953b18828709 Reviewed-by: Cédric Le Goater <clg@redhat.com> Fixes: d831c5fd8682 ("aspeed/intc: Add AST2700 support") Link: https://lore.kernel.org/qemu-devel/20250320092543.4040672-2-steven_lee@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>