summary refs log tree commit diff stats
path: root/scripts/check_sparse.py (unfollow)
Commit message (Collapse)AuthorFilesLines
2021-10-19multifd: Unconditionally unregister yank functionLukas Straub1-4/+1
To: qemu-devel <qemu-devel@nongnu.org> Cc: "Dr. David Alan Gilbert" <dgilbert@redhat.com>, Juan Quintela <quintela@redhat.com>, Peter Xu <peterx@redhat.com>, Leonardo Bras Soares Passos <lsoaresp@redhat.com> Date: Wed, 4 Aug 2021 21:26:32 +0200 (5 weeks, 11 hours, 52 minutes ago) [[PGP Signed Part:No public key for 35AB0B289C5DB258 created at 2021-08-04T21:26:32+0200 using RSA]] Unconditionally unregister yank function in multifd_load_cleanup(). If it is not unregistered here, it will leak and cause a crash in yank_unregister_instance(). Now if the ioc is still in use afterwards, it will only lead to qemu not being able to recover from a hang related to that ioc. After checking the code, i am pretty sure that ref is always 1 when arriving here. So all this currently does is remove the unneeded check. Signed-off-by: Lukas Straub <lukasstraub2@web.de> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com>
2021-10-19multifd: Implement yank for multifd send sideLukas Straub2-1/+7
To: qemu-devel <qemu-devel@nongnu.org> Cc: "Dr. David Alan Gilbert" <dgilbert@redhat.com>, Juan Quintela <quintela@redhat.com>, Peter Xu <peterx@redhat.com>, Leonardo Bras Soares Passos <lsoaresp@redhat.com> Date: Wed, 1 Sep 2021 17:58:57 +0200 (1 week, 15 hours, 17 minutes ago) [[PGP Signed Part:No public key for 35AB0B289C5DB258 created at 2021-09-01T17:58:57+0200 using RSA]] When introducing yank functionality in the migration code I forgot to cover the multifd send side. Signed-off-by: Lukas Straub <lukasstraub2@web.de> Tested-by: Leonardo Bras <leobras@redhat.com> Reviewed-by: Leonardo Bras <leobras@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com>
2021-10-18bsd-user/signal: Create a dummy signal queueing functionWarner Losh2-2/+11
Create dummy signal queueing function so we can start to integrate other architectures (at the cost of signals remaining broken) to tame the dependency graph a bit and to bring in signals in a more controlled fashion. Log unimplemented events to it in the mean time. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-18bsd-user: Rename sigqueue to qemu_sigqueueWarner Losh1-7/+7
To avoid a name clash with FreeBSD's sigqueue data structure in signalvar.h, rename sigqueue to qemu_sigqueue. This structure is currently defined, but unused. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-18bsd-user/sysarch: Move to using do_freebsd_arch_sysarch interfaceWarner Losh5-50/+36
do_freebsd_arch_sysarch() exists in $ARCH/target_arch_sysarch.h for x86. Call it from do_freebsd_sysarch() and remove the mostly duplicate version in syscall.c. Future changes will move it to os-sys.c and support other architectures. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-18bsd-user: Add stop_all_tasksWarner Losh2-0/+10
Similar to the same function in linux-user: this stops all the current tasks. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-18bsd-user: Remove used from TaskStateWarner Losh2-2/+0
The 'used' field in TaskState is write only. Remove it from TaskState. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-18bsd-user/target_os_elf: If ELF_HWCAP2 is defined, publish itWarner Losh1-0/+4
Some architectures publish AT_HWCAP2 as well as AT_HWCAP. Those architectures will define ELF_HWCAP2 in their target_arch_elf.h files for the value for this process. If it is defined, then publish it. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-18bsd-user/target_os_elf.h: Remove fallback ELF_HWCAP and reorderWarner Losh1-6/+2
All architectures have a ELF_HWCAP, so remove the fallback ifdef. Place ELF_HWCAP in the same order as on native FreeBSD. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-18bsd-user: move TARGET_MC_GET_CLEAR_RET to target_os_signal.hWarner Losh3-4/+3
Move TARGET_MC_GET_CLEAR_RET to freebsd/target_os_signal.h since it's architecture agnostic on FreeBSD. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-18bsd-user/errno_defs.h: Add internal error numbersStacey Son1-3/+10
To emulate signals and interrupted system calls, we need to have the same mechanisms we have in the kernel, including these errno values. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-18bsd-user: export get_errno and is_error from syscall.cWarner Losh2-5/+9
Make get_errno and is_error global so files other than syscall.c can use them. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-18bsd-user: TARGET_RESET define is unused, remove itWarner Losh2-4/+0
Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-18bsd-user/strace.list: Remove support for FreeBSD versions older than 12.0Warner Losh1-11/+0
Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-18bsd-user/target_os-user.h: Remove support for FreeBSD older than 12.0Warner Losh1-99/+1
Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-18meson: *-user: only descend into *-user when configuredWarner Losh3-4/+16
To increase flexibility, only descend into *-user when that is configured. This allows *-user to selectively include directories based on the host OS which may not exist on all hosts. Adopt Paolo's suggestion of checking the configuration in the directories that know about the configuration. Message-Id: <20210926220103.1721355-2-f4bug@amsat.org> Message-Id: <20210926220103.1721355-3-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Warner Losh <wlosh@bsdimp.com> Acked-by: Paolo Bonzini <pbonzinni@redhat.com> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-18bsd-user/mmap.c: assert that target_mprotect cannot failWarner Losh1-4/+1
Similar to the equivalent linux-user change 86abac06c14. All error conditions that target_mprotect checks are also checked by target_mmap. EACCESS cannot happen because we are just removing PROT_WRITE. ENOMEM should not happen because we are modifying a whole VMA (and we have bigger problems anyway if it happens). Fixes a Coverity false positive, where Coverity complains about target_mprotect's return value being passed to tb_invalidate_phys_range. Signed-off-by: Mikaël Urankar <mikael.urankar@gmail.com> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-18bsd-user/mmap.c: Implement MAP_EXCL, required by jemalloc in headKyle Evans1-3/+7
jemalloc requires a working MAP_EXCL. Ensure that no page is double mapped when specified. In addition, use guest_range_valid_untagged to test for valid ranges of pages rather than an incomplete inlined version of the test that might be wrong. Signed-off-by: Kyle Evans <kevans@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-18bsd-user/mmap.c: Don't mmap fd == -1 independently from MAP_ANON flagWarner Losh1-5/+25
Switch checks for !(flags & MAP_ANONYMOUS) with checks for fd != -1. MAP_STACK and MAP_GUARD both require fd == -1 and don't require mapping the fd either. Add analysis from Guy Yur detailing the different cases for MAP_GUARD and MAP_STACK. Signed-off-by: Guy Yur <guyyur@gmail.com> [ partially merged before, finishing the job and documenting origin] Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-18bsd-user/mmap.c: Convert to qemu_log logging for mmap debuggingWarner Losh1-30/+23
Convert DEBUG_MMAP to qemu_log CPU_LOG_PAGE. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-17bsd-user/mmap.c: mmap prefer MAP_ANON for BSDWarner Losh1-6/+5
MAP_ANON and MAP_ANONYMOUS are identical. Prefer MAP_ANON for BSD since the file is now a confusing mix of the two. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-17bsd-user/mmap.c: mmap return ENOMEM on overflowWarner Losh1-1/+8
mmap should return ENOMEM on len overflow rather than EINVAL. Return EINVAL when len == 0 and ENOMEM when the rounded to a page length is 0. Found by make check-tcg. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-17bsd-user/mmap.c: MAP_ symbols are defined, so no need for ifdefsWarner Losh1-14/+0
All these MAP_ symbols are always defined on supported FreeBSD versions (12.2 and newer), so remove the #ifdefs since they aren't needed. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-17bsd-user/mmap.c: check pread's return value to fix warnings with _FORTIFY_SOURCEMikaël Urankar1-2/+6
Simmilar to the equivalent linux-user: commit fb7e378cf9c, which added checking to pread's return value. Update to current qemu standards with {} around the if statement. Signed-off-by: Mikaël Urankar <mikael.urankar@gmail.com> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-17bsd-user/mmap.c: Always zero MAP_ANONYMOUS memory in mmap_frag()Mikaël Urankar1-1/+3
Similar to the equivalent linux-user commit e6deac9cf99 When mapping MAP_ANONYMOUS memory fragments, still need notice about to set it zero, or it will cause issues. Signed-off-by: Mikaël Urankar <mikael.urankar@gmail.com> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2021-10-18via-ide: Avoid using isa_get_irq()BALATON Zoltan1-2/+2
Use via_isa_set_irq() which better encapsulates irq handling in the vt82xx model and avoids using isa_get_irq() that has a comment saying it should not be used. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <26cb1848c9fc0360df7a57c2c9ba5e03c4a692b5.1634259980.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-10-18vt82c686: Add a method to VIA_ISA to raise ISA interruptsBALATON Zoltan2-1/+13
Other functions in the VT82xx chips need to raise ISA interrupts. Keep a reference to them in the device state and add via_isa_set_irq() to allow setting their state. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-Id: <778c04dc2c8affac060b8edf9e8d7dab3c3e04eb.1634259980.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-10-18vt82c686: Move common code to via_isa_realizeBALATON Zoltan1-38/+29
The vt82c686b_realize and vt8231_realize methods are almost identical, factor out the common parts to a via_isa_realize function to avoid code duplication. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <7cb7a16ff4daf8f48d576246255bea1fd355207c.1634259980.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-10-18via-ide: Set user_creatable to falseBALATON Zoltan1-0/+3
This model only works as a function of the via superio chip not as a standalone PCI device. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211015092159.3E863748F57@zero.eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-10-18target/mips: Remove unused TCG temporary in gen_mipsdsp_accinsn()Philippe Mathieu-Daudé1-4/+0
Since gen_mipsdsp_accinsn() got added in commit b53371ed5d4 ("target-mips: Add ASE DSP accumulator instructions"), the 'v2_t' TCG temporary has never been used. Remove it. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211014224551.2204949-1-f4bug@amsat.org>
2021-10-18target/mips: Fix DEXTRV_S.H DSP opcodePhilippe Mathieu-Daudé1-2/+1
While for the DEXTR_S.H opcode: "The shift argument is provided in the instruction." For the DEXTRV_S.H opcode we have: "The five least-significant bits of register rs provide the shift argument, interpreted as a five-bit unsigned integer; the remaining bits in rs are ignored." While 't1' contains the 'rs' register content (the shift value for DEXTR_S.H), we need to load the value of 'rs' for DEXTRV_S.H. We can directly use the v1_t TCG register which already contains this shift value. Fixes: b53371ed5d4 ("target-mips: Add ASE DSP accumulator instructions") Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211013215652.1764551-1-f4bug@amsat.org>
2021-10-18target/mips: Use tcg_constant_tl() in gen_compute_compact_branch()Philippe Mathieu-Daudé1-3/+1
The offset is constant and read-only: move it to the constant pool. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211003175743.3738710-9-f4bug@amsat.org>
2021-10-18target/mips: Use explicit extract32() calls in gen_msa_i5()Philippe Mathieu-Daudé1-7/+4
We already use sextract32(), use extract32() for completeness instead of open-coding it. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211003175743.3738710-7-f4bug@amsat.org>
2021-10-18target/mips: Use tcg_constant_i32() in gen_msa_3rf()Philippe Mathieu-Daudé1-9/+14
Avoid using a TCG temporary by moving Data Format to the constant pool. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211003175743.3738710-6-f4bug@amsat.org>
2021-10-18target/mips: Use tcg_constant_i32() in gen_msa_2r()Philippe Mathieu-Daudé1-3/+2
Avoid using a TCG temporary by moving Data Format to the constant pool. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211003175743.3738710-5-f4bug@amsat.org>
2021-10-18target/mips: Use tcg_constant_i32() in gen_msa_2rf()Philippe Mathieu-Daudé1-2/+1
Avoid using a TCG temporary by moving Data Format to the constant pool. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211003175743.3738710-4-f4bug@amsat.org>
2021-10-18target/mips: Use tcg_constant_i32() in gen_msa_elm_df()Philippe Mathieu-Daudé1-2/+1
Data Format is a 2-bit constant value. Avoid using a TCG temporary by moving it to the constant pool. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211003175743.3738710-3-f4bug@amsat.org>
2021-10-18target/mips: Remove unused register from MSA 2R/2RF instruction formatPhilippe Mathieu-Daudé1-6/+0
Commits cbe50b9a8e7 ("target-mips: add MSA VEC/2R format instructions") and 3bdeb68866e ("target-mips: add MSA 2RF format instructions") added the MSA 2R/2RF instructions. However these instructions don't use any target vector register, so remove the unused TCG temporaries. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211003175743.3738710-2-f4bug@amsat.org>
2021-10-18hw/mips/boston: Add FDT generatorJiaxun Yang1-9/+236
Generate FDT on our own if no dtb argument supplied. Avoid introducing unused device in FDT with user supplied dtb. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> [PMD: Fix coding style] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211002184539.169-4-jiaxun.yang@flygoat.com>
2021-10-18hw/mips/boston: Allow loading elf kernel and dtbJiaxun Yang1-4/+32
ELF kernel allows us debugging much easier with DWARF symbols. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [PMD: Fix coding style] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211002184539.169-3-jiaxun.yang@flygoat.com>
2021-10-18hw/mips/boston: Massage memory map informationJiaxun Yang1-28/+80
Use memmap array to uinfy address of memory map. That would allow us reuse address information for FDT generation. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [PMD: Use local 'regaddr' in gen_firmware(), fix coding style] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211002184539.169-2-jiaxun.yang@flygoat.com>
2021-10-17target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6Philippe Mathieu-Daudé1-0/+6
Per the "MIPS Architecture Extension: nanoMIPS32 DSP TRM" rev 0.04, MULT and MULTU opcodes: The value of ac selects an accumulator numbered from 0 to 3. When ac=0, this refers to the original HI/LO register pair of the MIPS32 architecture. In Release 6 of the MIPS Architecture, accumulators are eliminated from MIPS32. Ensure pre-Release 6 is restricted to HI/LO registers pair. Fixes: 8b3698b2947 ("target/mips: Add emulation of DSP ASE for nanoMIPS - part 4") Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-10-15Revert "cpu: Move cpu_common_props to hw/core/cpu.c"Richard Henderson3-16/+23
This reverts commit 1b36e4f5a5de585210ea95f2257839c2312be28f. Despite a comment saying why cpu_common_props cannot be placed in a file that is compiled once, it was moved anyway. Revert that. Since then, Property is not defined in hw/core/cpu.h, so it is now easier to declare a function to install the properties rather than the Property array itself. Cc: Eduardo Habkost <ehabkost@redhat.com> Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-15target/xtensa: Drop check for singlestep_enabledRichard Henderson1-17/+8
GDB single-stepping is now handled generically. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-15target/tricore: Drop check for singlestep_enabledRichard Henderson3-21/+1
GDB single-stepping is now handled generically. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-15target/sh4: Drop check for singlestep_enabledRichard Henderson3-17/+3
GDB single-stepping is now handled generically. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-15target/s390x: Drop check for singlestep_enabledRichard Henderson1-6/+2
GDB single-stepping is now handled generically. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-15target/rx: Drop checks for singlestep_enabledRichard Henderson3-19/+2
GDB single-stepping is now handled generically. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-15target/riscv: Remove exit_tb and lookup_and_goto_ptrRichard Henderson4-34/+7
GDB single-stepping is now handled generically, which means we don't need to do anything in the wrappers. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-15target/riscv: Remove dead code after exceptionRichard Henderson1-5/+1
We have already set DISAS_NORETURN in generate_exception, which makes the exit_tb unreachable. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>