| Commit message (Expand) | Author | Files | Lines |
| 2025-07-08 | hw/cxl-host: Add an index field to CXLFixedMemoryWindow | Jonathan Cameron | 2 | -3/+7 |
| 2025-07-08 | MAX78000: Add AES to SOC | Jackson Donaldson | 2 | -3/+11 |
| 2025-07-08 | MAX78000: AES implementation | Jackson Donaldson | 7 | -0/+303 |
| 2025-07-08 | MAX78000: Add TRNG to SOC | Jackson Donaldson | 2 | -1/+11 |
| 2025-07-08 | MAX78000: TRNG Implementation | Jackson Donaldson | 7 | -0/+186 |
| 2025-07-08 | MAX78000: Add GCR to SOC | Jackson Donaldson | 2 | -2/+18 |
| 2025-07-08 | MAX78000: GCR Implementation | Jackson Donaldson | 5 | -0/+473 |
| 2025-07-08 | MAX78000: Add UART to SOC | Jackson Donaldson | 2 | -4/+27 |
| 2025-07-08 | MAX78000: UART Implementation | Jackson Donaldson | 5 | -0/+368 |
| 2025-07-08 | MAX78000: Add ICC to SOC | Jackson Donaldson | 2 | -4/+22 |
| 2025-07-08 | MAX78000: ICC Implementation | Jackson Donaldson | 5 | -0/+158 |
| 2025-07-08 | MAX78000: Add MAX78000FTHR Machine | Jackson Donaldson | 5 | -0/+269 |
| 2025-07-04 | linux-user/aarch64: Set hwcap bits for SME2p1/SVE2p1 | Richard Henderson | 1 | -0/+8 |
| 2025-07-04 | target/arm: Enable FEAT_SME2p1 on -cpu max | Richard Henderson | 2 | -2/+14 |
| 2025-07-04 | target/arm: Implement SME2 BFMOPA (non-widening) | Peter Maydell | 4 | -0/+64 |
| 2025-07-04 | target/arm: Implement FMOPA (non-widening) for fp16 | Peter Maydell | 4 | -0/+63 |
| 2025-07-04 | target/arm: Support FPCR.AH in SME FMOPS, BFMOPS | Richard Henderson | 4 | -33/+161 |
| 2025-07-04 | target/arm: Rename BFMOPA to BFMOPA_w | Peter Maydell | 4 | -5/+5 |
| 2025-07-04 | target/arm: Rename FMOPA_h to FMOPA_w_h | Peter Maydell | 4 | -6/+6 |
| 2025-07-04 | target/arm: Implement LUTI2, LUTI4 for SME2/SME2p1 | Richard Henderson | 4 | -0/+210 |
| 2025-07-04 | target/arm: Implement MOVAZ for SME2p1 | Richard Henderson | 4 | -11/+137 |
| 2025-07-04 | target/arm: Implement LD1Q, ST1Q for SVE2p1 | Richard Henderson | 4 | -2/+62 |
| 2025-07-04 | target/arm: Implement {LD, ST}[234]Q for SME2p1/SVE2p1 | Richard Henderson | 4 | -31/+156 |
| 2025-07-04 | target/arm: Move ld1qq and st1qq primitives to sve_ldst_internal.h | Richard Henderson | 2 | -38/+69 |
| 2025-07-04 | target/arm: Implement {LD1, ST1}{W, D} (128-bit element) for SVE2p1 | Richard Henderson | 5 | -27/+183 |
| 2025-07-04 | target/arm: Split the ST_zpri and ST_zprr patterns | Richard Henderson | 1 | -8/+18 |
| 2025-07-04 | target/arm: Implement SME2 counted predicate register load/store | Richard Henderson | 4 | -0/+662 |
| 2025-07-04 | target/arm: Implement TBLQ, TBXQ for SME2p1/SVE2p1 | Richard Henderson | 4 | -0/+37 |
| 2025-07-04 | target/arm: Implement ZIPQ, UZPQ for SME2p1/SVE2p1 | Richard Henderson | 4 | -1/+63 |
| 2025-07-04 | target/arm: Implement PMOV for SME2p1/SVE2p1 | Richard Henderson | 5 | -0/+207 |
| 2025-07-04 | target/arm: Implement EXTQ for SME2p1/SVE2p1 | Richard Henderson | 2 | -0/+51 |
| 2025-07-04 | target/arm: Implement DUPQ for SME2p1/SVE2p1 | Richard Henderson | 2 | -0/+27 |
| 2025-07-04 | target/arm: Implement CNTP (predicate as counter) for SME2/SVE2p1 | Richard Henderson | 4 | -1/+54 |
| 2025-07-04 | target/arm: Implement BFMLSLB{L, T} for SME2/SVE2p1 | Richard Henderson | 2 | -0/+36 |
| 2025-07-04 | target/arm: Implement FADDQV, F{MIN, MAX}{NM}QV for SVE2p1 | Richard Henderson | 4 | -27/+148 |
| 2025-07-04 | target/arm: Implement ANDQV, ORQV, EORQV for SVE2p1 | Richard Henderson | 4 | -0/+65 |
| 2025-07-04 | target/arm: Implement SME2 SEL | Richard Henderson | 4 | -0/+362 |
| 2025-07-04 | target/arm: Implement SVE2p1 PEXT | Richard Henderson | 5 | -0/+146 |
| 2025-07-04 | target/arm: Implement {ADD, SMIN, SMAX, UMIN, UMAX}QV for SVE2p1 | Richard Henderson | 4 | -0/+113 |
| 2025-07-04 | target/arm: Implement SVE2p1 PTRUE (predicate as counter) | Richard Henderson | 2 | -0/+17 |
| 2025-07-04 | target/arm: Implement SVE2p1 WHILE (predicate as counter) | Richard Henderson | 4 | -5/+84 |
| 2025-07-04 | target/arm: Implement SVE2p1 WHILE (predicate pair) | Richard Henderson | 4 | -4/+61 |
| 2025-07-04 | target/arm: Enable PSEL for SVE2p1 | Richard Henderson | 1 | -1/+1 |
| 2025-07-04 | target/arm: Split trans_WHILE to lt and gt | Richard Henderson | 2 | -15/+12 |
| 2025-07-04 | target/arm: Move scale by esz into helper_sve_while* | Richard Henderson | 2 | -8/+7 |
| 2025-07-04 | target/arm: Split out do_whileg from helper_sve_whileg | Richard Henderson | 1 | -19/+20 |
| 2025-07-04 | target/arm: Split out do_whilel from helper_sve_whilel | Richard Henderson | 1 | -10/+16 |
| 2025-07-04 | target/arm: Expand do_zero inline | Richard Henderson | 1 | -17/+11 |
| 2025-07-04 | target/arm: Fold predtest_ones into helper_sve_brkns | Richard Henderson | 1 | -20/+14 |
| 2025-07-04 | target/arm: Introduce pred_count_test | Richard Henderson | 1 | -34/+45 |