| Commit message (Expand) | Author | Files | Lines |
|---|
| 2025-07-29 | system/physmem: fix use-after-free with dispatch | Pierrick Bouvier | 1 | -12/+3 |
| 2025-07-29 | hw/xen/passthrough: add missing error-report include | Adam Williamson | 1 | -0/+1 |
| 2025-07-29 | hw/net/cadence_gem: fix register mask initialization | Luc Michel | 1 | -1/+1 |
| 2025-07-29 | migration: rename target.c to vfio.c | Pierrick Bouvier | 2 | -2/+2 |
| 2025-07-29 | hw/vfio/vfio-migration: Remove unnecessary 'qemu/typedefs.h' include | Philippe Mathieu-Daudé | 1 | -1/+0 |
| 2025-07-29 | hw/display/qxl-render: fix qxl_unpack_chunks() chunk size calculation | Michael Tokarev | 1 | -1/+10 |
| 2025-07-29 | target/mips: Only update MVPControl.EVP bit if executed by master VPE | Philippe Mathieu-Daudé | 1 | -14/+18 |
| 2025-07-25 | target/arm: hvf: stubbing reads to LORC_EL1 | Mohamed Mediouni | 1 | -0/+4 |
| 2025-07-25 | hw/arm/smmu-common: Avoid using inlined functions with external linkage | JianChunfu | 1 | -1/+1 |
| 2025-07-25 | target/arm: Fix LD1W, LD1D to 128-bit elements | Peter Maydell | 1 | -2/+2 |
| 2025-07-25 | target/arm: Pass correct esize to sve_st1_z() for LD1Q, ST1Q | Peter Maydell | 1 | -4/+32 |
| 2025-07-25 | target/arm: LD1Q, ST1Q are vector + scalar, not scalar + vector | Peter Maydell | 2 | -20/+57 |
| 2025-07-25 | decodetree: Infer argument set before inferring format | Richard Henderson | 3 | -3/+9 |
| 2025-07-25 | target/arm: Pack mtedesc into upper 32 bits of descriptor | Richard Henderson | 4 | -51/+25 |
| 2025-07-25 | target/arm: Expand the descriptor for SME/SVE memory ops to i64 | Richard Henderson | 7 | -827/+828 |
| 2025-07-24 | log: make '-msg timestamp=on' apply to all qemu_log usage | Daniel P. Berrangé | 2 | -14/+20 |
| 2025-07-24 | MAINTAINERS: remove myself as ppc maintainer/reviewer | Daniel Henrique Barboza | 1 | -3/+0 |
| 2025-07-24 | MAINTAINERS: Remove Frédéric as reviewer | Cédric Le Goater | 1 | -2/+0 |
| 2025-07-24 | MAINTAINERS: Add myself as a reviewer for XIVE | Gautam Menghani | 1 | -0/+1 |
| 2025-07-24 | MAINTAINERS: Add myself as a reviewer of PowerNV emulation | Aditya Gupta | 1 | -0/+1 |
| 2025-07-24 | MAINTAINERS: Add myself as reviewer for PowerPC TCG CPUs | Chinmay Rath | 1 | -0/+1 |
| 2025-07-24 | MAINTAINERS: Adding myself as reviewer for PPC KVM cpus. | Harsh Prateek Bora | 1 | -0/+1 |
| 2025-07-24 | MAINTAINERS: Adding myself as a co-maintainer for ppc/spapr | Harsh Prateek Bora | 1 | -0/+1 |
| 2025-07-22 | crypto: add tracing & warning about GNUTLS countermeasures | Daniel P. Berrangé | 2 | -0/+13 |
| 2025-07-22 | migration: activate TLS thread safety workaround | Daniel P. Berrangé | 1 | -0/+9 |
| 2025-07-22 | io: add support for activating TLS thread safety workaround | Daniel P. Berrangé | 2 | -0/+6 |
| 2025-07-22 | crypto: implement workaround for GNUTLS thread safety problems | Daniel P. Berrangé | 5 | -3/+119 |
| 2025-07-22 | migration: show error message when postcopy fails | Daniel P. Berrangé | 1 | -1/+3 |
| 2025-07-22 | migration: HMP: Fix postcopy latency distribution label | Fabiano Rosas | 1 | -1/+1 |
| 2025-07-22 | migration: HMP: Fix possible out-of-bounds access | Fabiano Rosas | 1 | -4/+2 |
| 2025-07-22 | Update version for the v10.1.0-rc0 release | Stefan Hajnoczi | 1 | -1/+1 |
| 2025-07-22 | tracetool: removed the unused vcpu property | Tanish Desai | 4 | -16/+4 |
| 2025-07-21 | tcg/optimize: Don't fold INDEX_op_and_vec to extract | Richard Henderson | 1 | -1/+1 |
| 2025-07-21 | accel/hvf: Display executable bit as 'X' | Philippe Mathieu-Daudé | 1 | -1/+1 |
| 2025-07-21 | crypto: load all certificates in X509 CA file | Henry Kleynhans | 1 | -12/+11 |
| 2025-07-21 | hvf: arm: Emulate ICC_RPR_EL1 accesses properly | Zenghui Yu | 1 | -0/+2 |
| 2025-07-21 | hvf: arm: Add permission check in GIC sysreg handlers | Zenghui Yu | 1 | -0/+6 |
| 2025-07-21 | target/arm: Make LD1Q decode and trans fn agree about a->u | Peter Maydell | 1 | -1/+1 |
| 2025-07-21 | target/arm: Honour FPCR.AH=1 default NaN value in FMAXNMQV, FMINNMQV | Peter Maydell | 1 | -12/+17 |
| 2025-07-21 | target/arm: Don't nest H() macro calls in SVE DO_REDUCE | Peter Maydell | 1 | -1/+1 |
| 2025-07-21 | target/arm: Correct sense of FPCR.AH test for FMAXQV and FMINQV | Peter Maydell | 1 | -2/+2 |
| 2025-07-21 | target/arm: Add BFMLA, BFMLS (indexed) | Peter Maydell | 2 | -9/+18 |
| 2025-07-21 | target/arm: Add BFMLA, BFMLS (vectors) | Peter Maydell | 3 | -6/+98 |
| 2025-07-21 | target/arm: Add BFMUL (indexed) | Peter Maydell | 4 | -1/+5 |
| 2025-07-21 | target/arm: Add BFMIN, BFMAX (predicated) | Peter Maydell | 3 | -2/+27 |
| 2025-07-21 | target/arm: Add BFADD, BFSUB, BFMUL, BFMAXNM, BFMINNM (predicated) | Peter Maydell | 3 | -5/+32 |
| 2025-07-21 | target/arm: Add BFADD, BFSUB, BFMUL (unpredicated) | Peter Maydell | 3 | -1/+11 |
| 2025-07-21 | docs: Fix Aspeed title | Cédric Le Goater | 1 | -0/+1 |
| 2025-07-21 | hw/misc/max78000_aes: Comment Internal Key Storage | Jackson Donaldson | 1 | -0/+6 |
| 2025-07-21 | host-utils: Drop workaround for buggy Apple Clang __builtin_subcll() | Peter Maydell | 2 | -14/+1 |