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2025-05-19hw/riscv/virt.c: remove 'long' casts in fmt stringsDaniel Henrique Barboza1-15/+17
2025-05-19hw/riscv/virt.c: use s->memmap in finalize_fdt() functionsDaniel Henrique Barboza1-22/+22
2025-05-19hw/riscv/virt.c: use s->memmap in create_fdt_virtio()Daniel Henrique Barboza1-7/+10
2025-05-19hw/riscv/virt.c: use s->memmap in create_fdt_sockets() pathDaniel Henrique Barboza1-42/+47
2025-05-19hw/riscv/virt.c: use s->memmap in create_fdt() pathDaniel Henrique Barboza1-9/+10
2025-05-19hw/riscv/virt.c: add 'base' arg in create_fw_cfg()Daniel Henrique Barboza1-3/+2
2025-05-19hw/riscv/virt.c: use s->memmap in virt_machine_done()Daniel Henrique Barboza1-8/+7
2025-05-19hw/riscv/virt.c: remove trivial virt_memmap referencesDaniel Henrique Barboza1-15/+14
2025-05-19hw/riscv/virt.c: enforce s->memmap use in machine_init()Daniel Henrique Barboza1-27/+27
2025-05-19target/riscv/kvm: add scounteren CSRDaniel Henrique Barboza1-0/+2
2025-05-19target/riscv/kvm: read/write KVM regs via env sizeDaniel Henrique Barboza1-5/+7
2025-05-19target/riscv/kvm: add senvcfg CSRDaniel Henrique Barboza1-0/+2
2025-05-19target/riscv/kvm: do not read unavailable CSRsDaniel Henrique Barboza1-3/+59
2025-05-19target/riscv/kvm: add kvm_csr_cfgs[]Daniel Henrique Barboza2-36/+86
2025-05-19target/riscv/kvm: turn kvm_riscv_reg_id_ulong() into a macroDaniel Henrique Barboza1-58/+41
2025-05-19target/riscv/kvm: turn u32/u64 reg functions into macrosDaniel Henrique Barboza1-13/+9
2025-05-19target/riscv/kvm: fix leak in kvm_riscv_init_multiext_cfg()Daniel Henrique Barboza1-1/+1
2025-05-19target/riscv/kvm: minor fixes/tweaksDaniel Henrique Barboza1-15/+14
2025-05-19target/riscv: Fix write_misa vs aligned next_pcRichard Henderson1-5/+17
2025-05-19target/riscv: Move insn_len to internals.hRichard Henderson2-5/+5
2025-05-19target/riscv: Pass ra to riscv_csrrw_i128Richard Henderson3-10/+11
2025-05-19target/riscv: Pass ra to riscv_csrrwRichard Henderson4-11/+11
2025-05-19target/riscv: Pass ra to riscv_csrrw_do128Richard Henderson1-4/+5
2025-05-19target/riscv: Pass ra to riscv_csrrw_do64Richard Henderson1-8/+7
2025-05-19target/riscv: Pass ra to riscv_csr_write_fnRichard Henderson2-111/+118
2025-05-19MAINTAINERS: Add common-user/host/riscv to RISC-V sectionAlistair Francis1-0/+1
2025-05-19target/riscv: Fix vslidedown with rvv_ta_all_1sAnton Blanchard1-2/+4
2025-05-19target/riscv: Fix the rvv reserved encoding of unmasked instructionsMax Chou1-9/+9
2025-05-19target/riscv: rvv: Apply vext_check_input_eew to vector indexed load/store in...Max Chou1-2/+4
2025-05-19target/riscv: rvv: Apply vext_check_input_eew to vector narrow/widen instruct...Max Chou2-18/+68
2025-05-19target/riscv: rvv: Apply vext_check_input_eew to vector integer extension ins...Max Chou1-1/+3
2025-05-19target/riscv: rvv: Apply vext_check_input_eew to vector slide instructions(OP...Max Chou1-1/+3
2025-05-19target/riscv: rvv: Apply vext_check_input_eew to OPIVV/OPFVV(vext_check_sss) ...Max Chou1-0/+1
2025-05-19target/riscv: rvv: Apply vext_check_input_eew to OPIVI/OPIVX/OPFVF(vext_check...Max Chou1-1/+2
2025-05-19target/riscv: rvv: Apply vext_check_input_eew to vrgather instructions to che...Max Chou1-0/+32
2025-05-19target/riscv: rvv: Add CHECK arg to GEN_OPFVF_WIDEN_TRANSAnton Blanchard1-9/+9
2025-05-19target/riscv: rvv: Source vector registers cannot overlap mask registerAnton Blanchard1-3/+26
2025-05-19common-user/host/riscv: use tail pseudoinstruction for calling tailIcenowy Zheng1-2/+2
2025-05-19target/riscv: fix endless translation loop on big endian systemsZiqiao Kong1-2/+4
2025-05-19hw/riscv: Fix type conflict of GLib function pointersPaolo Bonzini1-2/+5
2025-05-19Expand the probe_pages helper function to handle probe flags.Paolo Savini1-20/+37
2025-05-19target/riscv: use tcg ops generation to emulate whole reg rvv loads/stores.Paolo Savini1-47/+108
2025-05-19hw/riscv: microchip_pfsoc: Rework documentationSebastian Huber1-81/+43
2025-05-19hw/riscv: Configurable MPFS CLINT timebase freqSebastian Huber2-4/+46
2025-05-19hw/riscv: Allow direct start of kernel for MPFSSebastian Huber1-17/+42
2025-05-19hw/riscv: Make FDT optional for MPFSSebastian Huber1-28/+28
2025-05-19hw/riscv: More flexible FDT placement for MPFSSebastian Huber1-2/+9
2025-05-19hw/misc: Add MPFS system reset supportSebastian Huber1-0/+7
2025-05-19Generate strided vector loads/stores with tcg nodes.Paolo Savini1-50/+273
2025-05-19target/riscv: pmp: remove redundant check in pmp_is_lockedLoïc Lefort1-5/+0