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2025-10-03target/riscv: Save stimer and vstimer in CPU vmstateTANG Tiancheng1-0/+25
vmstate_riscv_cpu was missing env.stimer and env.vstimer. Without migrating these QEMUTimer fields, active S/VS-mode timer events are lost after snapshot or migration. Add VMSTATE_TIMER_PTR() entries to save and restore them. Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: TANG Tiancheng <lyndra@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250911-timers-v3-4-60508f640050@linux.alibaba.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-10-03hw/intc: Save timers array in RISC-V mtimer VMStateTANG Tiancheng2-2/+8
The current 'timecmp' field in vmstate_riscv_mtimer is insufficient to keep timers functional after migration. If an mtimer's entry in 'mtimer->timers' is active at the time the snapshot is taken, it means riscv_aclint_mtimer_write_timecmp() has written to 'mtimecmp' and scheduled a timer into QEMU's main loop 'timer_list'. During snapshot save, these active timers must also be migrated; otherwise, after snapshot load there is no mechanism to restore 'mtimer->timers' back into the 'timer_list', and any pending timer events would be lost. QEMU's migration framework commonly uses VMSTATE_TIMER_xxx macros to save and restore 'QEMUTimer' variables. However, 'timers' is a pointer array with variable length, and vmstate.h did not previously provide a helper macro for such type. This commit adds a new macro, 'VMSTATE_TIMER_PTR_VARRAY', to handle saving and restoring a variable-length array of 'QEMUTimer *'. We then use this macro to migrate the 'mtimer->timers' array, ensuring that timer events remain scheduled correctly after snapshot load. Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Signed-off-by: TANG Tiancheng <lyndra@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250911-timers-v3-3-60508f640050@linux.alibaba.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-10-03migration: Add support for a variable-length array of UINT32 pointersTANG Tiancheng1-0/+10
Add support for defining a vmstate field which is a variable-length array of pointers, and use this to define a VMSTATE_TIMER_PTR_VARRAY() which allows a variable-length array of QEMUTimer* to be used by devices. Message-id: 20250909-timers-v1-0-7ee18a9d8f4b@linux.alibaba.com Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: TANG Tiancheng <lyndra@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250911-timers-v3-2-60508f640050@linux.alibaba.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-10-02hw/intc: Save time_delta in RISC-V mtimer VMStateTANG Tiancheng1-2/+3
In QEMU's RISC-V ACLINT timer model, 'mtime' is not stored directly as a state variable. It is computed on demand as: mtime = rtc_r + time_delta where: - 'rtc_r' is the current VM virtual time (in ticks) obtained via cpu_riscv_read_rtc_raw() from QEMU_CLOCK_VIRTUAL. - 'time_delta' is an offset applied when the guest writes a new 'mtime' value via riscv_aclint_mtimer_write(): time_delta = value - rtc_r Under this design, 'rtc_r' is assumed to be monotonically increasing during VM execution. Even if the guest writes an 'mtime' value smaller than the current one (making 'time_delta' negative in signed arithmetic, or underflow in unsigned arithmetic), the computed 'mtime' remains correct because 'rtc_r_new > rtc_r_old': mtime_new = rtc_r_new + (value - rtc_r_old) However, this monotonicity assumption breaks on snapshot load. Before restoring a snapshot, QEMU resets the guest, which calls riscv_aclint_mtimer_reset_enter() to set 'mtime' to 0 and recompute 'time_delta' as: time_delta = 0 - rtc_r_reset Here, the time_delta differs from the value that was present when the snapshot was saved. As a result, subsequent reads produce a fixed offset from the true mtime. This can be observed with the 'date' command inside the guest: after loading a snapshot, the reported time appears "frozen" at the save point, and only resumes correctly after the guest has run long enough to compensate for the erroneous offset. The fix is to treat 'time_delta' as part of the device's migratable state and save/restore it via vmstate. This preserves the correct relation between 'rtc_r' and 'mtime' across snapshot save/load, ensuring 'mtime' continues incrementing from the precise saved value after restore. Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: TANG Tiancheng <lyndra@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250911-timers-v3-1-60508f640050@linux.alibaba.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-10-02hw/char: sifive_uart: Add newline to error messageFrank Chang1-1/+1
Adds a missing newline character to the error message. Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250911160647.5710-5-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-10-02hw/char: sifive_uart: Remove outdated comment about Tx FIFOFrank Chang1-6/+0
Since Tx FIFO is now implemented using "qemu/fifo8.h", remove the comment that no longer reflects the current implementation. Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250911160647.5710-4-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-10-02hw/char: sifive_uart: Avoid pushing Tx FIFO when size is zeroFrank Chang1-1/+3
There's no need to call fifo8_push_all() when size is zero. Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250911160647.5710-3-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-10-02hw/char: sifive_uart: Raise IRQ according to the Tx/Rx watermark thresholdsFrank Chang1-12/+12
Currently, the SiFive UART raises an IRQ whenever: 1. ie.txwm is enabled. 2. ie.rxwm is enabled and the Rx FIFO is not empty. It does not check the watermark thresholds set by software. However, since commit [1] changed the SiFive UART character printing from synchronous to asynchronous, Tx overflows may occur, causing characters to be dropped when running Linux because: 1. The Linux SiFive UART driver sets the transmit watermark level to 1 [2], meaning a transmit watermark interrupt is raised whenever a character is enqueued into the Tx FIFO. 2. Upon receiving a transmit watermark interrupt, the Linux driver transfers up to a full Tx FIFO's worth of characters from the Linux serial transmit buffer [3], without checking the txdata.full flag before transferring multiple characters [4]. To fix this issue, we must honor the Tx/Rx watermark thresholds and raise interrupts only when the Tx threshold is exceeded or the Rx threshold is undercut. [1] 53c1557b230986ab6320a58e1b2c26216ecd86d5 [2] https://github.com/torvalds/linux/blob/master/drivers/tty/serial/sifive.c#L1039 [3] https://github.com/torvalds/linux/blob/master/drivers/tty/serial/sifive.c#L538 [4] https://github.com/torvalds/linux/blob/master/drivers/tty/serial/sifive.c#L291 Signed-off-by: Frank Chang <frank.chang@sifive.com> Signed-off-by: Emmanuel Blot <emmanuel.blot@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250911160647.5710-2-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-10-02roms/opensbi: Update to v1.7Daniel Henrique Barboza3-0/+0
Update OpenSBI and the pre-built opensbi32 and opensbi64 images to version 1.7. It has been almost an year since we last updated OpenSBI (at the time, up to v1.5.1) and we're missing a lot of good stuff from both v1.6 and v1.7, including SBI 3.0 and RPMI 1.0. The changelog is too large and tedious to post in the commit msg so I encourage refering to [1] and [2] to see the new features we're adding into the QEMU roms. [1] https://github.com/riscv-software-src/opensbi/releases/tag/v1.6 [2] https://github.com/riscv-software-src/opensbi/releases/tag/v1.7 Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-10-02target/riscv: implement MonitorDef HMP APIDaniel Henrique Barboza2-0/+149
The MonitorDef API is related to two HMP monitor commands: 'p' and 'x': (qemu) help p print|p /fmt expr -- print expression value (use $reg for CPU register access) (qemu) help x x /fmt addr -- virtual memory dump starting at 'addr' For x86, one of the few targets that implements it, it is possible to print the PC register value with $pc and use the PC value in the 'x' command as well. Those 2 commands are hooked into get_monitor_def(), called by exp_unary() in hmp.c. The function tries to fetch a reg value in two ways: by reading them directly via a target_monitor_defs array or using a target_get_monitor_def() helper. In RISC-V we have *A LOT* of registers and this number will keep getting bigger, so we're opting out of an array declaration. We're able to retrieve all regs but vregs because the API only fits an uint64_t and vregs have 'vlen' size that are bigger than that. With this patch we can do things such as: - print CSRs and use their val in expressions: (qemu) p $mstatus 0xa000000a0 (qemu) p $mstatus & 0xFF 0xa0 - dump the next 10 insn from virtual memory starting at x1 (ra): (qemu) x/10i $ra 0xffffffff80958aea: a9bff0ef jal ra,-1382 # 0xffffffff80958584 0xffffffff80958aee: 10016073 csrrsi zero,sstatus,2 0xffffffff80958af2: 60a2 ld ra,8(sp) 0xffffffff80958af4: 6402 ld s0,0(sp) 0xffffffff80958af6: 0141 addi sp,sp,16 0xffffffff80958af8: 8082 ret 0xffffffff80958afa: 10016073 csrrsi zero,sstatus,2 0xffffffff80958afe: 8082 ret 0xffffffff80958b00: 1141 addi sp,sp,-16 0xffffffff80958b02: e422 sd s0,8(sp) (qemu) Suggested-by: Dr. David Alan Gilbert <dave@treblig.org> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250703130815.1592493-1-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-10-02linux-user/syscall.c: sync RISC-V hwprobe with LinuxDaniel Henrique Barboza1-0/+89
It has been awhile since the last sync. Let's bring QEMU hwprobe support on par with Linux 6.17-rc4. A lot of new RISCV_HWPROBE_KEY_* entities are added but this patch is only adding support for ZICBOM_BLOCK_SIZE. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250903164043.2828336-1-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-10-02docs/interop/firmware: Add riscv64 to FirmwareArchitectureAndrea Bolognani1-1/+3
Descriptors using this value have been shipped for years by distros, so we just need to update the spec to match reality. Signed-off-by: Andrea Bolognani <abologna@redhat.com> Reviewed-by: Kashyap Chamarthy <kchamart@redhat.com> Message-ID: <20250910121501.676219-1-abologna@redhat.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-10-02hw/riscv/riscv-iommu: Fix MSI table size limitAndrew Jones1-4/+7
The MSI table is not limited to 4k. The only constraint the table has is that its base address must be aligned to its size, ensuring no offsets of the table size will overrun when added to the base address (see "8.5. MSI page tables" of the AIA spec). Fixes: 0c54acb8243d ("hw/riscv: add RISC-V IOMMU base emulation") Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20250904132723.614507-2-ajones@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-09-30build-sys: pass -fvisibility=default for wasm bindgenMarc-André Lureau9-1/+13
Otherwise, no functions are generated: https://github.com/rust-lang/rust-bindgen/issues/2989 Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Kohei Tokunaga <ktokunaga.mail@gmail.com> Message-ID: <20250924120426.2158655-27-marcandre.lureau@redhat.com>
2025-09-30build-sys: deprecate mips hostMarc-André Lureau3-8/+11
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250924120426.2158655-26-marcandre.lureau@redhat.com>
2025-09-30meson: rust-bindgen limit allowlist-file to srcdir/includeMarc-André Lureau1-2/+1
gitlab CI restricts usage of directories for the build environment and cache. Msys64 is installed under project root ($srcdir/msys64). This confuses rust-bindgen allowlist-file which will generate bindings for all the system include headers under msys64/. blocklist-file is also too strict, as it prevents generating all the recursively dependent types coming from system includes. Instead, let's not use allowlist-file from the project root, Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-ID: <20250924120426.2158655-22-marcandre.lureau@redhat.com>
2025-09-30tests/freebsd: enable RustMarc-André Lureau2-2/+4
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-21-marcandre.lureau@redhat.com>
2025-09-30configure: set the meson executable suffix/extMarc-André Lureau1-1/+13
The 'rustfmt' target runs meson: it needs the correct path with extension on Windows. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-20-marcandre.lureau@redhat.com>
2025-09-30tests/lcitool: enable rust & refreshMarc-André Lureau16-3/+41
Enable Rust on various distro images: alpine, centos, debian, fedora, opensuse. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20250924120426.2158655-19-marcandre.lureau@redhat.com>
2025-09-30tests/docker: add ENABLE_RUST environmentMarc-André Lureau1-0/+9
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-18-marcandre.lureau@redhat.com>
2025-09-30tests/lcitool: update to debian13Marc-André Lureau9-46/+149
riscv64 is now a supported architecture. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250924120426.2158655-17-marcandre.lureau@redhat.com>
2025-09-30tests/lcitool: add missing rust-std depMarc-André Lureau17-1/+18
Some distros/targets may pull it by default, but some don't. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-16-marcandre.lureau@redhat.com>
2025-09-30lcitool/alpine: workaround bindgen issueMarc-André Lureau2-1/+9
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-15-marcandre.lureau@redhat.com>
2025-09-30lcitool/qemu: include libclang-rt for TSANMarc-André Lureau18-0/+18
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-14-marcandre.lureau@redhat.com>
2025-09-30lcitool: update, switch to f41Marc-André Lureau20-37/+79
Newer lcitool version has various fixes helping QEMU CI and this series. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-13-marcandre.lureau@redhat.com>
2025-09-30build-sys: cfi_debug and safe_stack are not compatibleMarc-André Lureau2-3/+6
It fails to link on fedora >= 41: /usr/bin/ld: /usr/bin/../lib/clang/20/lib/x86_64-redhat-linux-gnu/libclang_rt.safestack.a(safestack.cpp.o): in function `__sanitizer_internal_memcpy': (.text.__sanitizer_internal_memcpy+0x0): multiple definition of `__sanitizer_internal_memcpy'; /usr/bin/../lib/clang/20/lib/x86_64-redhat-linux-gnu/libclang_rt.ubsan_standalone.a(sanitizer_libc.cpp.o):(.text.__sanitizer_internal_memcpy+0x0): first defined here /usr/bin/ld: /usr/bin/../lib/clang/20/lib/x86_64-redhat-linux-gnu/libclang_rt.safestack.a(safestack.cpp.o): in function `__sanitizer_internal_memmove': (.text.__sanitizer_internal_memmove+0x0): multiple definition of `__sanitizer_internal_memmove'; /usr/bin/../lib/clang/20/lib/x86_64-redhat-linux-gnu/libclang_rt.ubsan_standalone.a(sanitizer_libc.cpp.o):(.text.__sanitizer_internal_memmove+0x0): first defined here /usr/bin/ld: /usr/bin/../lib/clang/20/lib/x86_64-redhat-linux-gnu/libclang_rt.safestack.a(safestack.cpp.o): in function `__sanitizer_internal_memset': (.text.__sanitizer_internal_memset+0x0): multiple definition of `__sanitizer_internal_memset'; /usr/bin/../lib/clang/20/lib/x86_64-redhat-linux-gnu/libclang_rt.ubsan_standalone.a(sanitizer_libc.cpp.o):(.text.__sanitizer_internal_memset+0x0): first defined here cfi_debug seems to pull ubsan which has conflicting symbols with safe_stack. See also: https://bugzilla.redhat.com/show_bug.cgi?id=2397265 Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-12-marcandre.lureau@redhat.com>
2025-09-30tests/docker/common: print meson log on configure failureMarc-André Lureau1-1/+1
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-11-marcandre.lureau@redhat.com>
2025-09-30tests/docker: use fully qualified image name for emsdkMarc-André Lureau1-1/+1
Without it, at least it fails with podman on fc42: [1/6] STEP 1/15: FROM emscripten/emsdk:3.1.50 AS build-base Error: creating build container: short-name resolution enforced but cannot prompt without a TTY Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Kohei Tokunaga <ktokunaga.mail@gmail.com> Message-ID: <20250924120426.2158655-10-marcandre.lureau@redhat.com>
2025-09-30tests/docker/common: print errors to stderrMarc-André Lureau1-2/+2
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-9-marcandre.lureau@redhat.com>
2025-09-30configure: set the bindgen cross targetMarc-André Lureau4-0/+110
Implement a bash version of rust-bindgen rust_to_clang_target() to convert from rust target to clang target. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-ID: <20250924120426.2158655-8-marcandre.lureau@redhat.com>
2025-09-30configure: fix rust meson configurationMarc-André Lureau1-1/+1
It was incorrectly set on the [host_machine] and caused error: File "/tmp/qemu-test/build/pyvenv/lib/python3.11/site-packages/mesonbuild/envconfig.py", line 281, in from_literal assert all(isinstance(v, str) for v in raw.values()), 'for mypy' AssertionError: for mypy Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-7-marcandre.lureau@redhat.com>
2025-09-30scripts/archive-source: use a bash arrayMarc-André Lureau1-8/+23
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250924120426.2158655-6-marcandre.lureau@redhat.com>
2025-09-30scripts/archive-source: silence subprojects downloadsMarc-André Lureau1-1/+1
It's too verbose. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250924120426.2158655-5-marcandre.lureau@redhat.com>
2025-09-30scripts/archive-source: speed up downloading subprojectsMarc-André Lureau1-2/+3
Running meson on each subproject is quite slow. According to Paolo, meson will run download tasks in parallel. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250924120426.2158655-4-marcandre.lureau@redhat.com>
2025-09-30gitlab-ci: fix 'needs' property type must be arrayMarc-André Lureau3-54/+54
The gitlab "Pipeline editor" has some warnings, and gitlab-ci-local fails. Read also from the docs https://docs.gitlab.com/ci/yaml/#needs "Supported values: An array of jobs (maximum of 50 jobs). An empty array ([]), to set the job to start as soon as the pipeline is created." Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-3-marcandre.lureau@redhat.com>
2025-09-30build-sys: require -lrt when no shm_open() in std libsMarc-André Lureau1-7/+9
Fail during configure time if the shm functions are missing, as required by oslib-posix.c. Note, we could further check the presence of the function in librt. This is a minor cleanup/improvement. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250924120426.2158655-2-marcandre.lureau@redhat.com>
2025-09-30ui/icons/qemu.svg: Add metadata information (author, license) to the logoThomas Huth1-1/+20
We've got two versions of the QEMU logo in the repository, one with the whole word "QEMU" (pc-bios/qemu_logo.svg) and one that only contains the letter "Q" (ui/icons/qemu.svg). While qemu_logo.svg contains the proper metadata with license and author information, this is missing from the ui/icons/qemu.svg file. Copy the meta data there so that people have a chance to know the license of the file if they only look at the qemu.svg file. Closes: https://gitlab.com/qemu-project/qemu/-/issues/3139 Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-ID: <20250930071419.117592-1-thuth@redhat.com>
2025-09-30ui/sdl2: fix reset scaling binding to be consistent with gtkNir Lichtman1-1/+1
Problem: Currently the reset scaling hotkey is inconsistent between SDL and GTK graphics modes. Solution: Fix SDL to use MOD+0 instead of MOD+u which is in line with GTK and generally more consistent with other apps. This is also related to my previously sent patch fixing the docs. Suggested-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Nir Lichtman <nir@lichtman.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20250910114929.GA1783677@lichtman.org>
2025-09-30ui/spice: fix crash when disabling GL scanout onMarc-André Lureau1-1/+3
When spice_qxl_gl_scanout2() isn't available, the fallback code incorrectly handles NULL arguments to disable the scanout, leading to: Program terminated with signal SIGSEGV, Segmentation fault. #0 spice_server_gl_scanout (qxl=0x55a25ce57ae8, fd=0x0, width=0, height=0, offset=0x0, stride=0x0, num_planes=0, format=0, modifier=72057594037927935, y_0_top=0) at ../ui/spice-display.c:983 983 if (num_planes <= 1) { Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=2391334 Fixes: 98a050ca93afd8 ("ui/spice: support multi plane dmabuf scanout") Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Message-Id: <20250903193818.2460914-1-marcandre.lureau@redhat.com>
2025-09-30ui/spice: Fix abort on macOSMohamed Akram1-5/+1
The check is faulty because the thread variable was assigned in the main thread while the main loop runs in a different thread on macOS. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3070 Signed-off-by: Mohamed Akram <mohd.akram@outlook.com> Acked-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-ID: <C87205B9-DD8F-4E53-AB5B-C8BF82EF1D16@outlook.com>
2025-09-30gtk: Skip drawing if console surface is NULLWeifeng Liu2-8/+2
In gtk draw/render callbacks, add an early NULL check for the console surface and skip drawing if it's NULL. Otherwise, attempting to fetch its width and height crash. This change fixes Coverity CID 1610328. In practice, this case wouldn't happen at all because we always install a placeholder surface to the console when there is nothing to display. Resolves: Coverity CID 1610328 Signed-off-by: Weifeng Liu <weifeng.liu.z@gmail.com> Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-ID: <20250714141758.10062-1-weifeng.liu.z@gmail.com>
2025-09-29hw/arm/aspeed_ast27x0-fc: Make sub-init functions return bool with errpJamin Lin1-14/+20
Refactor ast2700fc_ca35_init(), ast2700fc_ssp_init(), and ast2700fc_tsp_init() to take an Error **errp parameter and return a bool. Each function now reports failure through the error object and returns false. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250925050535.2657256-7-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-09-29hw/arm/aspeed_ast27x0-fc: Drop dead return checksJamin Lin1-29/+14
1. object_property_set_link() can return false only when it fails, and it sets an error when it fails. Since passing &error_abort causes an abort, the function never returns false, and the return statement is effectively dead code. 2. object_property_set_int() is considered as a routine which shouldn't fail. So the common practice in models is to pass &error_abort and ignore the returned value. https://patchwork.kernel.org/project/qemu-devel/patch/20250717034054.1903991-3-jamin_lin@aspeedtech.com/#26540626 No functional change. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250925050535.2657256-6-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-09-29hw/arm/aspeed: Move aspeed_load_vbootrom to common SoC codeJamin Lin3-30/+30
Move the vbootrom loader helper into common SoC code so it can be reused by all ASPEED boards, and decouple the API from AspeedMachineState. Specifically: - Move aspeed_load_vbootrom() to hw/arm/aspeed_soc_common.c and declare it in include/hw/arm/aspeed_soc.h. - Change the helper’s signature to take AspeedSoCState * instead of AspeedMachineState *. - Update aspeed_machine_init() call sites accordingly. No functional change. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250925050535.2657256-5-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-09-29hw/arm/aspeed: Move aspeed_install_boot_rom to common SoC codeJamin Lin3-20/+22
Move the boot ROM install helper into common SoC code so it can be reused by all ASPEED boards, and decouple the API from AspeedMachineState. Specifically: - Move aspeed_install_boot_rom() to hw/arm/aspeed_soc_common.c and declare it in include/hw/arm/aspeed_soc.h. - Change the helper’s signature to take AspeedSoCState * and a MemoryRegion * provided by the caller, instead of AspeedMachineState *. - Update aspeed_machine_init() call sites accordingly. No functional change. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250925050535.2657256-4-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-09-29hw/arm/aspeed: Move write_boot_rom to common SoC codeJamin Lin3-31/+35
Move the write_boot_rom helper from hw/arm/aspeed.c into hw/arm/aspeed_soc_common.c so it can be reused by all ASPEED machines. Export the API as aspeed_write_boot_rom() in include/hw/arm/aspeed_soc.h and update the existing call site to use the new helper. No functional change. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250925050535.2657256-3-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-09-29hw/arm/aspeed: Move aspeed_board_init_flashes() to common SoC codeJamin Lin2-22/+23
Relocate aspeed_board_init_flashes() from hw/arm/aspeed.c into hw/arm/aspeed_soc_common.c so the helper can be reused by all ASPEED machines. The API was already declared in include/hw/arm/aspeed_soc.h; this change moves its implementation out of the machine file to keep aspeed.c cleaner. No functional change. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250925050535.2657256-2-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-09-29tests/functional/arm/test_aspeed_ast2600: Add PCIe and network testJamin Lin1-0/+21
Extend the AST2600 functional tests with PCIe and network checks. This patch introduces a new helper "do_ast2600_pcie_test()" that runs "lspci" on the emulated system and verifies the presence of the expected PCIe devices: - 80:00.0 Host bridge: ASPEED Technology, Inc. Device 2600 - 80:08.0 PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge - 81:00.0 Ethernet controller: Intel Corporation 82574L Gigabit Network Connection To exercise the PCIe network device, the test adds: -device e1000e,netdev=net1,bus=pcie.0 -netdev user,id=net1 and assigns an IP address to the interface, verifying it with `ip addr`. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250919093017.338309-14-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-09-29hw/arm/aspeed_ast27x0: Introduce 3 PCIe RCs for AST2700Jamin Lin2-0/+75
Add PCIe Root Complex support to the AST2700 SoC model. The AST2700 A1 silicon revision provides three PCIe Root Complexes: PCIe0 with its PHY at 0x12C15000, config (H2X) block at 0x120E0000, MMIO window at 0x60000000, and GIC IRQ 56. PCIe1 with its PHY at 0x12C15800, config (H2X) block at 0x120F0000, MMIO window at 0x80000000, and GIC IRQ 57. PCIe2 with its PHY at 0x14C1C000, config (H2X) block at 0x140D0000, MMIO window at 0xA0000000, and IRQ routed through INTC4 bit 31 mapped to GIC IRQ 196. Each RC instantiates a PHY device, a PCIe config (H2X) bridge, and an MMIO alias region. The per-RC MMIO alias size is 0x20000000. The AST2700 A0 silicon revision does not support PCIe Root Complexes, so pcie_num is set to 0 in that variant. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250919093017.338309-13-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-09-29hw/pci-host/aspeed: Disable Root Device and place Root Port at 00:00.0 to ↵Jamin Lin1-0/+2
AST2700 AST2700 does not implement a PCIe Root Device; each RC exposes a single PCIe Root Port at devfn 0:0.0. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250919093017.338309-12-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>