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2025-10-03target/riscv: Fix SSP CSR error handling in VU/VS modeJim Shu1-0/+2
2025-10-03target/riscv: Fix the mepc when sspopchk triggers the exceptionJim Shu1-0/+1
2025-10-03target/riscv: do not use translator_ldl in opcode_atVladimir Isaev1-1/+2
2025-10-03qemu/osdep: align memory allocations to 2M on RISC-VXuemei Liu1-1/+1
2025-10-03target/riscv: use riscv_csrr in riscv_csr_readstove1-1/+1
2025-10-03target/riscv/kvm: Use riscv_cpu_is_32bit() when handling SBI_DBCN regPhilippe Mathieu-Daudé1-1/+1
2025-10-03target/riscv: Save stimer and vstimer in CPU vmstateTANG Tiancheng1-0/+25
2025-10-03hw/intc: Save timers array in RISC-V mtimer VMStateTANG Tiancheng2-2/+8
2025-10-03migration: Add support for a variable-length array of UINT32 pointersTANG Tiancheng1-0/+10
2025-10-02hw/intc: Save time_delta in RISC-V mtimer VMStateTANG Tiancheng1-2/+3
2025-10-02hw/char: sifive_uart: Add newline to error messageFrank Chang1-1/+1
2025-10-02hw/char: sifive_uart: Remove outdated comment about Tx FIFOFrank Chang1-6/+0
2025-10-02hw/char: sifive_uart: Avoid pushing Tx FIFO when size is zeroFrank Chang1-1/+3
2025-10-02hw/char: sifive_uart: Raise IRQ according to the Tx/Rx watermark thresholdsFrank Chang1-12/+12
2025-10-02roms/opensbi: Update to v1.7Daniel Henrique Barboza3-0/+0
2025-10-02target/riscv: implement MonitorDef HMP APIDaniel Henrique Barboza2-0/+149
2025-10-02linux-user/syscall.c: sync RISC-V hwprobe with LinuxDaniel Henrique Barboza1-0/+89
2025-10-02docs/interop/firmware: Add riscv64 to FirmwareArchitectureAndrea Bolognani1-1/+3
2025-10-02hw/riscv/riscv-iommu: Fix MSI table size limitAndrew Jones1-4/+7
2025-09-30build-sys: pass -fvisibility=default for wasm bindgenMarc-André Lureau9-1/+13
2025-09-30build-sys: deprecate mips hostMarc-André Lureau3-8/+11
2025-09-30meson: rust-bindgen limit allowlist-file to srcdir/includeMarc-André Lureau1-2/+1
2025-09-30tests/freebsd: enable RustMarc-André Lureau2-2/+4
2025-09-30configure: set the meson executable suffix/extMarc-André Lureau1-1/+13
2025-09-30tests/lcitool: enable rust & refreshMarc-André Lureau16-3/+41
2025-09-30tests/docker: add ENABLE_RUST environmentMarc-André Lureau1-0/+9
2025-09-30tests/lcitool: update to debian13Marc-André Lureau9-46/+149
2025-09-30tests/lcitool: add missing rust-std depMarc-André Lureau17-1/+18
2025-09-30lcitool/alpine: workaround bindgen issueMarc-André Lureau2-1/+9
2025-09-30lcitool/qemu: include libclang-rt for TSANMarc-André Lureau18-0/+18
2025-09-30lcitool: update, switch to f41Marc-André Lureau20-37/+79
2025-09-30build-sys: cfi_debug and safe_stack are not compatibleMarc-André Lureau2-3/+6
2025-09-30tests/docker/common: print meson log on configure failureMarc-André Lureau1-1/+1
2025-09-30tests/docker: use fully qualified image name for emsdkMarc-André Lureau1-1/+1
2025-09-30tests/docker/common: print errors to stderrMarc-André Lureau1-2/+2
2025-09-30configure: set the bindgen cross targetMarc-André Lureau4-0/+110
2025-09-30configure: fix rust meson configurationMarc-André Lureau1-1/+1
2025-09-30scripts/archive-source: use a bash arrayMarc-André Lureau1-8/+23
2025-09-30scripts/archive-source: silence subprojects downloadsMarc-André Lureau1-1/+1
2025-09-30scripts/archive-source: speed up downloading subprojectsMarc-André Lureau1-2/+3
2025-09-30gitlab-ci: fix 'needs' property type must be arrayMarc-André Lureau3-54/+54
2025-09-30build-sys: require -lrt when no shm_open() in std libsMarc-André Lureau1-7/+9
2025-09-30ui/icons/qemu.svg: Add metadata information (author, license) to the logoThomas Huth1-1/+20
2025-09-30ui/sdl2: fix reset scaling binding to be consistent with gtkNir Lichtman1-1/+1
2025-09-30ui/spice: fix crash when disabling GL scanout onMarc-André Lureau1-1/+3
2025-09-30ui/spice: Fix abort on macOSMohamed Akram1-5/+1
2025-09-30gtk: Skip drawing if console surface is NULLWeifeng Liu2-8/+2
2025-09-29hw/arm/aspeed_ast27x0-fc: Make sub-init functions return bool with errpJamin Lin1-14/+20
2025-09-29hw/arm/aspeed_ast27x0-fc: Drop dead return checksJamin Lin1-29/+14
2025-09-29hw/arm/aspeed: Move aspeed_load_vbootrom to common SoC codeJamin Lin3-30/+30