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path: root/scripts/qapi-commands.py (unfollow)
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2018-03-02tricore: renamed masking of IEDavid Brenken3-11/+13
2018-03-02tricore: added CORE_IDDavid Brenken2-0/+2
2018-03-02tricore: added some missing cpu instructionsDavid Brenken2-0/+30
2018-03-01cryptodev-vhost-user: set the key lengthGonglei2-0/+7
2018-03-01cryptodev-vhost-user: add crypto session handlerGonglei4-11/+175
2018-03-01cryptodev: add vhost supportGonglei7-0/+398
2018-03-01cryptodev: add vhost-user as a new cryptodev backendGonglei7-0/+622
2018-03-01docs/vmcoreinfo: detail unsupported host format behaviourMarc-André Lureau1-0/+4
2018-03-01vhost: fix incorrect check in vhost_verify_ring_mappingsJia He1-2/+2
2018-03-01vhost: avoid to start/stop virtqueue which is not readyJia He1-1/+17
2018-03-01vhost: fix memslot limit checkJay Zhou1-7/+12
2018-03-01docs: pcie: Spell out machine type needs for PCIe featuresKashyap Chamarthy1-2/+7
2018-03-01docs: document virtio-balloon statsTomáš Golembiovský1-0/+2
2018-03-01intel-iommu: Accept 64-bit writes to FEADDRJan Kiszka1-2/+9
2018-03-01virtio-pci: trivial fixes in error messageGreg Kurz1-1/+1
2018-03-01vhost-user: fix memory leaklinzhecheng1-0/+1
2018-03-01s390x/tcg: fix loading 31bit PSWs with the highest bit setDavid Hildenbrand1-0/+4
2018-03-01MAINTAINERS: Update my email addressAlistair Francis1-6/+6
2018-03-01linux-user: Report AArch64 FP16 support via hwcap bitsPeter Maydell1-0/+2
2018-03-01target/arm: Enable ARM_V8_FP16 feature bit for the AArch64 "any" CPUPeter Maydell1-0/+1
2018-03-01arm/translate-a64: add all single op FP16 to handle_fp_1src_halfAlex Bennée1-0/+71
2018-03-01arm/translate-a64: implement simd_scalar_three_reg_same_fp16Alex Bennée1-0/+99
2018-03-01arm/translate-a64: add all FP16 ops in simd_scalar_pairwiseAlex Bennée1-26/+54
2018-03-01arm/translate-a64: add FP16 FMOV to simd_mod_immAlex Bennée1-10/+25
2018-03-01arm/translate-a64: add FP16 FRSQRTE to simd_two_reg_misc_fp16Alex Bennée1-0/+7
2018-03-01arm/helper.c: re-factor rsqrte and add rsqrte_f16Alex Bennée2-118/+104
2018-03-01arm/translate-a64: add FP16 FSQRT to simd_two_reg_misc_fp16Alex Bennée3-0/+19
2018-03-01arm/translate-a64: add FP16 FRCPX to simd_two_reg_misc_fp16Alex Bennée3-0/+34
2018-03-01arm/translate-a64: add FP16 FRECPEAlex Bennée1-0/+8
2018-03-01arm/helper.c: re-factor recpe and add recepe_f16Alex Bennée2-97/+128
2018-03-01arm/translate-a64: add FP16 FNEG/FABS to simd_two_reg_misc_fp16Alex Bennée1-1/+15
2018-03-01arm/translate-a64: add FP16 SCVTF/UCVFT to simd_two_reg_misc_fp16Alex Bennée3-24/+104
2018-03-01arm/translate-a64: add FP16 FCMxx (zero) to simd_two_reg_misc_fp16Alex Bennée1-23/+57
2018-03-01arm/translate-a64: add FCVTxx to simd_two_reg_misc_fp16Alex Bennée3-1/+118
2018-03-01arm/translate-a64: add FP16 FPRINTx to simd_two_reg_misc_fp16Alex Bennée3-5/+142
2018-03-01arm/translate-a64: initial decode for simd_two_reg_misc_fp16Alex Bennée1-0/+40
2018-03-01arm/translate-a64: add FP16 x2 ops for simd_indexedAlex Bennée3-6/+76
2018-03-01arm/translate-a64: add FP16 FMULX/MLS/FMLA to simd_indexedAlex Bennée1-16/+66
2018-03-01arm/translate-a64: add FP16 pairwise ops simd_three_reg_same_fp16Alex Bennée1-75/+133
2018-03-01arm/translate-a64: add FP16 FR[ECP/SQRT]S to simd_three_reg_same_fp16Alex Bennée4-4/+54
2018-03-01arm/translate-a64: add FP16 FMULA/X/S to simd_three_reg_same_fp16Alex Bennée3-0/+41
2018-03-01arm/translate-a64: add FP16 F[A]C[EQ/GE/GT] to simd_three_reg_same_fp16Alex Bennée3-0/+69
2018-03-01arm/translate-a64: add FP16 FADD/FABD/FSUB/FMUL/FDIV to simd_three_reg_same_fp16Alex Bennée3-0/+36
2018-03-01arm/translate-a64: initial decode for simd_three_reg_same_fp16Alex Bennée1-0/+73
2018-03-01arm/translate-a64: handle_3same_64 comment fixAlex Bennée1-2/+1
2018-03-01arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV)Alex Bennée3-54/+110
2018-03-01target/arm/helper: pass explicit fpst to set_rmodeAlex Bennée4-22/+22
2018-03-01target/arm/cpu.h: add additional float_status flagsAlex Bennée3-36/+75
2018-03-01target/arm/cpu.h: update comment for half-precision valuesAlex Bennée1-0/+1
2018-03-01target/arm/cpu64: introduce ARM_V8_FP16 feature bitAlex Bennée1-0/+1