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2019-01-10linux-user: make pwrite64/pread64(fd, NULL, 0, offset) return 0Peter Maydell1-4/+18
Linux returns success if pwrite64() or pread64() are called with a zero length NULL buffer, but QEMU was returning -TARGET_EFAULT. This is the same bug that we fixed in commit 58cfa6c2e6eb51b23cc9 for the write syscall, and long before that in 38d840e6790c29f59 for the read syscall. Fixes: https://bugs.launchpad.net/qemu/+bug/1810433 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190108184900.9654-1-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-01-10Add getsockopt for settable SOL_IPV6 optionsTom Deseyn1-0/+39
Signed-off-by: Tom Deseyn <tom.deseyn@gmail.com> Message-Id: <20181213130611.7496-1-tom.deseyn@gmail.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-01-10spice: Remove unused includeFrediano Ziglio1-1/+0
The definitions in the header are not used. Also this fixes porting SPICE to Windows where the header is not available. Signed-off-by: Frediano Ziglio <fziglio@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190107184404.31993-1-fziglio@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-01-10keymaps: drop support for include filesGerd Hoffmann1-4/+3
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Li Qiang <liq3ea@gmail.com> Message-id: 20181116104319.10329-5-kraxel@redhat.com
2019-01-10keymaps: remove common includeGerd Hoffmann4-177/+352
Copy the content into the sl and sv files (the only ones left which are not generated by qemu-keymap). Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20181116104319.10329-4-kraxel@redhat.com
2019-01-10keymaps: drop nl-be mapGerd Hoffmann2-4/+1
It doesn't define any keys, only includes "common". Which makes it effectively an "en-us" map. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20181116104319.10329-3-kraxel@redhat.com
2019-01-10keymaps: remove modifiers includeGerd Hoffmann3-20/+19
"common" is the only file using it, so we can just include it directly. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20181116104319.10329-2-kraxel@redhat.com
2019-01-10ui/console: Remove qemu_create_display_surface_guestmem()Peter Maydell2-40/+0
The qemu_create_display_surface_guestmem() function was added in commit a77549b3ffcc24c32ee4e but apparently never used. Remove it. (The API of this function is in any case awkward as a generic function: it assumes that a physical address uniquely identifies a piece of memory in the system, which is mostly but not always true.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20181122170309.4856-1-peter.maydell@linaro.org Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-01-10configure: bump spice-server required version to 0.12.5Marc-André Lureau5-28/+2
Looking at chardev/spice.c code, I realize compilation was broken for a while with spice-server < 0.12.3. Let's bump required version to 0.12.5, released May 19 2014, instead of adding more #ifdef. (this patch combines changes from an early version and some of Frediano "[PATCH 2/2] spice: Bump required spice-server version to 0.12.6") According to repology, all the distros that are build target platforms for QEMU include it: RHEL-7: 0.14.0 Debian (Stretch): 0.12.8 Debian (Jessie): 0.12.5 FreeBSD (ports): 0.14.0 OpenSUSE Leap 15: 0.14.0 Ubuntu (Xenial): 0.12.6 Note that a previous version of this patch was bumping version to 0.12.6. Unfortunately, Debian Jessie (oldstable) is stuck with spice server 0.12.5, and QEMU should keep building until after 2y of current stable (Stretch), which will be around June 17th 2019. Qemu 4.1 should thus be free of bumping to spice-server 0.12.6 during 4.1 development cycle. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20181128155932.16171-1-marcandre.lureau@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-01-10egl-headless: add egl_create_contextGerd Hoffmann1-1/+9
We must set the correct context (via eglMakeCurrent) before calling qemu_egl_create_context, so we need a thin wrapper and can't hook qemu_egl_create_context directly as ->dpy_gl_ctx_create callback. Reported-by: Frederik Carlier <frederik.carlier@quamotion.mobi> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20181129123502.30129-1-kraxel@redhat.com
2019-01-09ioapic: use TYPE_FOO MACRO than constant stringLi Qiang4-4/+7
Make them more QOMConventional. Cc:qemu-trivial@nongnu.org Signed-off-by: Li Qiang <liq3ea@163.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20190105023831.66910-1-liq3ea@163.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-01-09trivial: Don't include isa.h if it is not really necessaryThomas Huth9-9/+0
These files don't seem to do anything related to ISA directly, so there is no need to include isa.h here. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <1546615943-16274-1-git-send-email-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-01-09hw/audio/marvell: Don't include unnecessary i2c.h header fileThomas Huth1-1/+0
This device does not use I2C, so no need to include the header file here. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <1546614146-10525-1-git-send-email-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-01-09qom: Include qemu/fprintf-fn.h in cpu.hPriit Laes1-0/+1
QOM cpu.h uses fprintf_function which requires Qemu's qemu/fprintf-fn.h header. Include it. Signed-off-by: Priit Laes <plaes@plaes.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20181226003722.31257-1-plaes@plaes.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-01-09hw/core: fix whitespace in a sentenceWainer dos Santos Moschetta1-1/+1
Signed-off-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20181224154922.3338-1-wainersm@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-01-09typedefs: (Re-)sort entries alphabeticallyEric Blake1-5/+5
Since the last time we sorted things (2988cbeaf), we've had a few relapses that were inserted out of order. Also, we had more entries that were sorted case-insensitively than not, so let's document that convention and stick to it. Signed-off-by: Eric Blake <eblake@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20181115211752.1295571-2-eblake@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-01-09docker: Use a stable snapshot for Debian SidPhilippe Mathieu-Daudé1-0/+4
The Debian Sid repository is not garanteed to be stable, as his 'unstable' name suggest :) To allow quick testing, Debian maintainers might push packages various time a day. Sometime package dependencies might break, which is annoying when using this repository for stable development (which is not recommended, but Sid provides edge packages we use for testing). Debian provides repositories snapshots which are suitable for our use. Pick a recent date that works. When required, update to newer releases will be easy. This fixes current issues with this image: $ make docker-image-debian-sid [...] The following packages have unmet dependencies: build-essential : Depends: dpkg-dev (>= 1.17.11) but it is not going to be installed git : Depends: perl but it is not going to be installed Depends: liberror-perl but it is not going to be installed pkg-config : Depends: libdpkg-perl but it is not going to be installed texinfo : Depends: perl (>= 5.26.2-6) but it is not going to be installed Depends: libtext-unidecode-perl but it is not going to be installed Depends: libxml-libxml-perl but it is not going to be installed E: Unable to correct problems, you have held broken packages. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20181101183705.5422-1-philmd@redhat.com> Signed-off-by: Fam Zheng <famz@redhat.com>
2019-01-09block/nvme: optimize the performance of nvme driver based on vfio-pciLi Feng1-10/+6
When the IO size is larger than 2 pages, we move the the pointer one by one in the pagelist, this is inefficient. This is a simple benchmark result: Before: $ qemu-io -c 'write 0 1G' nvme://0000:00:04.0/1 wrote 1073741824/1073741824 bytes at offset 0 1 GiB, 1 ops; 0:00:02.41 (424.504 MiB/sec and 0.4146 ops/sec) $ qemu-io -c 'read 0 1G' nvme://0000:00:04.0/1 read 1073741824/1073741824 bytes at offset 0 1 GiB, 1 ops; 0:00:02.03 (503.055 MiB/sec and 0.4913 ops/sec) After: $ qemu-io -c 'write 0 1G' nvme://0000:00:04.0/1 wrote 1073741824/1073741824 bytes at offset 0 1 GiB, 1 ops; 0:00:02.17 (471.517 MiB/sec and 0.4605 ops/sec) $ qemu-io -c 'read 0 1G' nvme://0000:00:04.0/1 read 1073741824/1073741824 bytes at offset 0 1 GiB, 1 ops; 0:00:01.94 (526.770 MiB/sec and 0.5144 ops/sec) Signed-off-by: Li Feng <lifeng1519@gmail.com> Message-Id: <20181101103807.25862-1-lifeng1519@gmail.com> Signed-off-by: Fam Zheng <famz@redhat.com>
2019-01-09spapr: enable XIVE MMIOs at resetCédric Le Goater3-0/+19
Depending on the interrupt mode of the machine, enable or disable the XIVE MMIOs. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09spapr: introduce a new sPAPR IRQ backend supporting XIVE and XICSCédric Le Goater4-3/+198
The 'dual' sPAPR IRQ backend supports both interrupt mode, XIVE exploitation mode and the legacy compatibility mode (XICS). both modes are not supported at the same time. The machine starts with the legacy mode and a new interrupt mode can then be negotiated by the CAS process. In this case, the new mode is activated after a reset to take into account the required changes in the machine. These impact the device tree layout, the interrupt presenter object and the exposed MMIO regions in the case of XIVE. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09ppc/xics: allow ICSState to have an offset 0Cédric Le Goater1-2/+1
commit 15ed653fa49a ("ppc/xics: An ICS with offset 0 is assumed to be uninitialized") introduced an extra check on the ICS offset which is not strictly necessary. Revert the change to be able to map the XICS IRQ number space on the XIVE IRQ number space. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09spapr: move the qemu_irq array under the machineCédric Le Goater8-11/+29
The qemu_irq array is now allocated at the machine level using a sPAPR IRQ set_irq handler depending on the chosen interrupt mode. The use of this handler is slightly inefficient today but it will become necessary when the 'dual' interrupt mode is introduced. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09pnv/psi: move the ICSState qemu_irq array under the PSI device modelCédric Le Goater2-3/+5
Future changes of the ICSState object will remove the qemu_irq array from under the interrupt controller model. Prepare ground for the PSI interrupt sources and introduce a new one directly under the PSI device model. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09ppc: export the XICS and XIVE set_irq handlersCédric Le Goater5-3/+7
To support the 'dual' interrupt mode, XICS and XIVE, we plan to move the qemu_irq array of each interrupt controller under the machine and do the allocation under the sPAPR IRQ init method. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09spapr: return from post_load method when RTC import failsCédric Le Goater1-2/+7
The error value can be squashed by the section handling radix migration. Simply bail out if an error occurs when the RTC offset is imported. This fixes the Coverity issue CID 1398591. Fixes: d39c90f5f3ae ("spapr: Fix migration of Radix guests") Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09ppc: replace the 'Object *intc' by a 'ICPState *icp' pointer under the CPUCédric Le Goater7-16/+17
Now that the 'intc' pointer is only used by the XICS interrupt mode, let's make things clear and use a XICS type and name. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09ppc/xive: introduce a XiveTCTX pointer under PowerPCCPUCédric Le Goater4-8/+15
which will be used by the machine only when the XIVE interrupt mode is in use. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09spapr: modify the prototype of the cpu_intc_create() methodCédric Le Goater6-20/+47
Today, the interrupt presenter is linked to a CPU using the cpu_intc_create() method of the sPAPR IRQ backend. The resulting object is assigned to the PowerPCCPU 'intc' pointer whatever the interrupt mode, XICS or XIVE. To support the 'dual' interrupt mode, we will need to distinguish between the two presenter objects and for that, we plan to introduce a second interrupt presenter object pointer under the PowerPCCPU. The modifications below move the assignment of the presenter object under the cpu_intc_create() method to prepare ground for the future changes. Both sPAPR and PowerNV machines are impacted. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09spapr/xive: simplify the sPAPR IRQ qirq method for XIVECédric Le Goater4-22/+11
The qirq routines of the XiveSource and the sPAPRXive model are only used under the sPAPR IRQ backend. Simplify the overall call stack and gather all the code under spapr_qirq_xive(). It will ease future changes. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09spapr_pci: Define SPAPR_MAX_PHBS in hw/pci-host/spapr.hGreg Kurz2-4/+4
PHB hotplug will bring more users for it. Let's define it along with the PHB defines from which it is derived for simplicity. While here fix a misleading comment about manual placement, which was abandoned with 30b3bc5aa9f4. Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09pci: allow cleanup/unregistration of PCI root busesMichael Roth2-0/+36
This adds cleanup counterparts to pci_register_root_bus(), pci_root_bus_new(), and pci_bus_irqs(). These cleanup routines are needed in the case of hotpluggable PCIHostBridge implementations. Currently we can rely on the object_unparent()'ing of the PCIHostState recursively unparenting and cleaning up it's child buses, but we need explicit calls to also: 1) remove the PCIHostState from pci_host_bridges global list. otherwise, we risk accessing freed memory when we access the list later 2) clean up memory allocated in pci_bus_irqs() Both are handled outside the context of any particular bus or host bridge's init/realize functions, making it difficult to avoid the need for explicit cleanup functions without remodeling how PCIHostBridges are created. So keep it simple and just add them for now. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09spapr: move spapr_create_phb() to core machine codeGreg Kurz3-14/+12
This function is only used when creating the default PHB. Let's rename it and move it to the core machine code for clarity. Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09MAINTAINERS: add qemu_vga.ndrv file entry for Mac machinesMark Cave-Ayland1-0/+2
The VGA driver built from Ben's QemuMacDrivers repository is used exclusively by the Mac machines. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09MAINTAINERS: Add some missing ppc-related filesThomas Huth1-2/+7
hw/gpio/mpc8xxx.c is only used by the e500 machine, so add it there. And the hw/input/adb* files are specific to the Mac machines, so they should be assigned to these categories. Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09target/ppc: replace AVR* macros with Vsr* macrosMark Cave-Ayland1-17/+13
Now that the VMX and VSR register sets have been combined, the same macros can be used to access both AVR and VSR field members. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09target/ppc: move FP and VMX registers into aligned vsr register arrayMark Cave-Ayland13-82/+165
The VSX register array is a block of 64 128-bit registers where the first 32 registers consist of the existing 64-bit FP registers extended to 128-bit using new VSR registers, and the last 32 registers are the VMX 128-bit registers as show below: 64-bit 64-bit +--------------------+--------------------+ | FP0 | | VSR0 +--------------------+--------------------+ | FP1 | | VSR1 +--------------------+--------------------+ | ... | ... | ... +--------------------+--------------------+ | FP30 | | VSR30 +--------------------+--------------------+ | FP31 | | VSR31 +--------------------+--------------------+ | VMX0 | VSR32 +-----------------------------------------+ | VMX1 | VSR33 +-----------------------------------------+ | ... | ... +-----------------------------------------+ | VMX30 | VSR62 +-----------------------------------------+ | VMX31 | VSR63 +-----------------------------------------+ In order to allow for future conversion of VSX instructions to use TCG vector operations, recreate the same layout using an aligned version of the existing vsr register array. Since the old fpr and avr register arrays are removed, the existing callers must also be updated to use the correct offset in the vsr register array. This also includes switching the relevant VMState fields over to using subarrays to make sure that migration is preserved. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09target/ppc: merge ppc_vsr_t and ppc_avr_t union typesMark Cave-Ayland3-45/+39
Since the VSX registers are actually a superset of the VMX registers then they can be represented by the same type. Merge ppc_avr_t into ppc_vsr_t and change ppc_avr_t to be a simple typedef alias. Note that due to a difference in the naming of the float32 member between ppc_avr_t and ppc_vsr_t, references to the ppc_avr_t f member must be replaced with f32 instead. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09target/ppc: switch FPR, VMX and VSX helpers to access data directly from cpu_envMark Cave-Ayland2-45/+18
Instead of accessing the FPR, VMX and VSX registers through static arrays of TCGv_i64 globals, remove them and change the helpers to load/store data directly within cpu_env. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09target/ppc: introduce get_cpu_vsr{l,h}() and set_cpu_vsr{l,h}() helpers for ↵Mark Cave-Ayland1-224/+638
VSR register access These helpers allow us to move VSR register values to/from the specified TCGv_i64 argument. To prevent VSX helpers accessing the cpu_vsr array directly, add extra TCG temporaries as required. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09target/ppc: introduce get_avr64() and set_avr64() helpers for VMX register ↵Mark Cave-Ayland2-33/+124
access These helpers allow us to move AVR register values to/from the specified TCGv_i64 argument. To prevent VMX helpers accessing the cpu_avr{l,h} arrays directly, add extra TCG temporaries as required. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09target/ppc: introduce get_fpr() and set_fpr() helpers for FP register accessMark Cave-Ayland2-110/+386
These helpers allow us to move FP register values to/from the specified TCGv_i64 argument in the VSR helpers to be introduced shortly. To prevent FP helpers accessing the cpu_fpr array directly, add extra TCG temporaries as required. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09target/ppc: switch EXTRACT_HELPER macros over to use sextract32/extract32Mark Cave-Ayland1-4/+4
These ensure that we consistently handle signed and unsigned extensions correctly when decoding immediates from instruction opcodes. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09target/ppc: fix typo in SIMM5 extraction helperMark Cave-Ayland1-1/+1
As the macro name suggests, the argument should be signed and not unsigned. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09MAINTAINERS: Add more files to sam460exBALATON Zoltan1-0/+6
The sm501 model belonged to SH before but that seems to be inactive now and latest changes were for sam460ex which is the more active user of this device at the moment so let's adopt sm501 for sam460ex. Also add device tree and firmware sources and binaries. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09ppc4xx: Disable debug logging by defaultBALATON Zoltan1-2/+1
Debug logs were left enabled in ppc4xx_devs.c whereas in other files these are normally not enabled. Disable it here as well. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09ppc/spapr: Receive and store device tree blob from SLOFAlexey Kardashevskiy5-3/+94
SLOF receives a device tree and updates it with various properties before switching to the guest kernel and QEMU is not aware of any changes made by SLOF. Since there is no real RTAS (QEMU implements it), it makes sense to pass the SLOF final device tree to QEMU to let it implement RTAS related tasks better, such as PCI host bus adapter hotplug. Specifially, now QEMU can find out the actual XICS phandle (for PHB hotplug) and the RTAS linux,rtas-entry/base properties (for firmware assisted NMI - FWNMI). This stores the initial DT blob in the sPAPR machine and replaces it in the KVMPPC_H_UPDATE_DT (new private hypercall) handler. This adds an @update_dt_enabled machine property to allow backward migration. SLOF already has a hypercall since https://github.com/aik/SLOF/commit/e6fc84652c9c0073f9183 This makes use of the new fdt_check_full() helper. In order to allow the configure script to pick the correct DTC version, this adjusts the DTC presense test. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-09spapr: Add H-Call H_HOME_NODE_ASSOCIATIVITYLaurent Vivier3-0/+42
H_HOME_NODE_ASSOCIATIVITY H-Call returns the associativity domain designation associated with the identifier input parameter This fixes a crash when we try to hotplug a CPU in memory-less and CPU-less numa node. In this case, the kernel tries to online the node, but without the information provided by this h-call, the node id, it cannot and the CPU is started while the node is not onlined. It also removes the warning message from the kernel: VPHN is not supported. Disabling polling.. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-01-08qemu-thread: Don't block SEGV, ILL and FPERoman Bolshakov1-0/+5
If any of these signals happen on macOS, they are not delivered to other threads and signalfd_compat receives nothing. Indeed, POSIX reference and sigprocmask(2) note that an attempt to block the signals results in undefined behaviour. SEGV and FPE can't also be received by signalfd(2) on Linux. An ability to retrieve SIGBUS via signalfd(2) is used by QEMU for memory preallocation therefore we can't unblock it without consequences. But it's important to leave a remark that the signal is lost on macOS. Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-01-08util: Implement debug-threads for macOSRoman Bolshakov3-9/+33
macOS provides pthread_setname_np that doesn't have thread id argument. Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-01-08ui/cocoa: Include less of the generated modular QAPI headersMarkus Armbruster1-1/+2
Avoids pointless recompilation. Missed in commit 112ed241f5d. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Roman Bolshakov <r.bolshakov@yadro.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Roman Bolshakov <r.bolshakov@yadro.com> Message-id: 20181220084559.13880-1-armbru@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>