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2023-04-23tcg: Clear TCGLabelQemuLdst on allocationRichard Henderson1-0/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-04-23tcg: Introduce tcg_out_xchgRichard Henderson11-0/+55
We will want a backend interface for register swapping. This is only properly defined for x86; all others get a stub version that always indicates failure. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-04-23tcg: Introduce tcg_out_movextRichard Henderson9-168/+103
This is common code in most qemu_{ld,st} slow paths, extending the input value for the store helper data argument or extending the return value from the load helper. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-04-23tcg: Split out tcg_out_extrl_i64_i32Richard Henderson11-17/+65
We will need a backend interface for type truncation. For those backends that did not enable TCG_TARGET_HAS_extrl_i64_i32, use tcg_out_mov. Use it in tcg_reg_alloc_op in the meantime. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-04-23tcg: Split out tcg_out_extu_i32_i64Richard Henderson11-28/+63
We will need a backend interface for type extension with zero. Use it in tcg_reg_alloc_op in the meantime. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-04-23tcg: Split out tcg_out_exts_i32_i64Richard Henderson11-19/+63
We will need a backend interface for type extension with sign. Use it in tcg_reg_alloc_op in the meantime. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-04-23tcg: Split out tcg_out_ext32uRichard Henderson11-25/+54
We will need a backend interface for performing 32-bit zero-extend. Use it in tcg_reg_alloc_op in the meantime. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-04-23tcg: Split out tcg_out_ext32sRichard Henderson11-20/+54
We will need a backend interface for performing 32-bit sign-extend. Use it in tcg_reg_alloc_op in the meantime. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-04-23tcg: Split out tcg_out_ext16uRichard Henderson11-42/+66
We will need a backend interface for performing 16-bit zero-extend. Use it in tcg_reg_alloc_op in the meantime. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-04-23tcg: Split out tcg_out_ext16sRichard Henderson11-52/+79
We will need a backend interface for performing 16-bit sign-extend. Use it in tcg_reg_alloc_op in the meantime. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-04-23tcg: Split out tcg_out_ext8uRichard Henderson11-33/+69
We will need a backend interface for performing 8-bit zero-extend. Use it in tcg_reg_alloc_op in the meantime. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-04-23tcg: Split out tcg_out_ext8sRichard Henderson11-51/+81
We will need a backend interface for performing 8-bit sign-extend. Use it in tcg_reg_alloc_op in the meantime. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-04-23tcg: Replace tcg_abort with g_assert_not_reachedRichard Henderson13-55/+47
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-04-23tcg: Replace if + tcg_abort with tcg_debug_assertRichard Henderson2-8/+4
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-04-21Hexagon (target/hexagon) Add overrides for cache/sync/barrier instructionsTaylor Simpson2-14/+28
Most of these are not modelled in QEMU, so save the overhead of calling a helper. The only exception is dczeroa. It assigns to hex_dczero_addr, which is handled during packet commit. Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230410202402.2856852-1-tsimpson@quicinc.com>
2023-04-21Hexagon (target/hexagon) Remove unused slot variable in helpersTaylor Simpson4-11/+9
The slot variable in helpers was only passed to log_reg_write function where the argument is unused. - Remove declaration from generated helper functions - Remove slot argument from log_reg_write Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230407204521.357244-1-tsimpson@quicinc.com>
2023-04-21Hexagon (tests/tcg/hexagon) Move HVX test infra to header fileTaylor Simpson3-158/+181
This will facilitate adding additional tests in separate .c files Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230406174241.853296-1-tsimpson@quicinc.com>
2023-04-21Hexagon (target/hexagon) Updates to USR should use get_result_gprTaylor Simpson6-44/+34
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230405164211.30015-3-tsimpson@quicinc.com>
2023-04-21Hexagon (target/hexagon) Add overrides for count trailing zeros/onesTaylor Simpson2-1/+79
The following instructions are overriden S2_ct0 Count trailing zeros S2_ct1 Count trailing ones S2_ct0p Count trailing zeros (register pair) S2_ct1p Count trailing ones (register pair) These instructions are not handled by idef-parser because the imported semantics uses bit-reverse. However, they are straightforward to implement in TCG with tcg_gen_ctzi_* Test cases added to tests/tcg/hexagon/misc.c Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230405164211.30015-1-tsimpson@quicinc.com>
2023-04-21Hexagon (target/hexagon) Merge arguments to probe_pkt_scalar_hvx_storesTaylor Simpson4-9/+10
Reducing the number of arguments reduces the overhead of the helper call Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230405164211.30015-2-tsimpson@quicinc.com>
2023-04-21Hexagon (target/hexagon) Remove redundant/unused macrosTaylor Simpson1-43/+22
Remove the following macros (remnants of the old generator design) READ_REG READ_PREG WRITE_RREG WRITE_PREG Modify macros that rely on the above The following are unused READ_IREG fGET_FIELD fSET_FIELD fREAD_P3 fREAD_NPC fWRITE_LC0 fWRITE_LC1 Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230405183048.147767-1-tsimpson@quicinc.com>
2023-04-21Use black code style for python scriptsMarco Liebel13-911/+1191
Signed-off-by: Marco Liebel <quic_mliebel@quicinc.com> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Acked-by: Taylor Simpson <tsimpson@quicinc.com> Tested-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <20230320092533.2859433-3-quic_mliebel@quicinc.com>
2023-04-21Use f-strings in python scriptsMarco Liebel12-306/+250
Replace python 2 format string with f-strings Signed-off-by: Marco Liebel <quic_mliebel@quicinc.com> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Tested-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <20230320092533.2859433-2-quic_mliebel@quicinc.com>
2023-04-21Hexagon (translate.c): avoid redundant PC updates on COFMatheus Tavares Bernardino1-8/+13
When there is a conditional change of flow or an endloop instruction, we preload HEX_REG_PC with ctx->next_PC at gen_start_packet(). Nonetheless, we still generate TCG code to do this update again at gen_goto_tb() when the condition for the COF is not met, thus producing redundant instructions. This can be seen with the following packet: 0x004002e4: 0x5c20d000 { if (!P0) jump:t PC+0 } Which generates this TCG code: ---- 004002e4 -> mov_i32 pc,$0x4002e8 and_i32 loc9,p0,$0x1 mov_i32 branch_taken,loc9 add_i32 pkt_cnt,pkt_cnt,$0x2 add_i32 insn_cnt,insn_cnt,$0x2 brcond_i32 branch_taken,$0x0,ne,$L1 goto_tb $0x0 mov_i32 pc,$0x4002e4 exit_tb $0x7fb0c36e5200 set_label $L1 goto_tb $0x1 -> mov_i32 pc,$0x4002e8 exit_tb $0x7fb0c36e5201 set_label $L0 exit_tb $0x7fb0c36e5203 Note that even after optimizations, the redundant PC update is still present: ---- 004002e4 -> mov_i32 pc,$0x4002e8 sync: 0 dead: 0 1 pref=0xffff mov_i32 branch_taken,$0x1 sync: 0 dead: 0 1 pref=0xffff add_i32 pkt_cnt,pkt_cnt,$0x2 sync: 0 dead: 0 1 pref=0xffff add_i32 insn_cnt,insn_cnt,$0x2 sync: 0 dead: 0 1 2 pref=0xffff goto_tb $0x1 -> mov_i32 pc,$0x4002e8 sync: 0 dead: 0 1 pref=0xffff exit_tb $0x7fb0c36e5201 set_label $L0 exit_tb $0x7fb0c36e5203 With this patch, the second redundant update is properly discarded. Note that we need the additional "move_to_pc" flag instead of just avoiding the update whenever `dest == ctx->next_PC`, as that could potentially skip updates from a COF with met condition, whose ctx->branch_dest just happens to be equal to ctx->next_PC. Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <fc059153c3f0526d97b7f13450c02b276b0908e1.1679519341.git.quic_mathbern@quicinc.com>
2023-04-20qtest: Add a test case for TPM TIS I2C connected to Aspeed I2C controllerStefan Berger2-0/+666
Add a test case for the TPM TIS I2C device exercising most of its functionality, including localities. Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Tested-by: Cédric Le Goater <clg@kaod.org> Tested-by: Ninad Palsule<ninad@linux.ibm.com> Message-id: 20230331173051.3857801-4-stefanb@linux.ibm.com
2023-04-20qtest: Move tpm_util_tis_transmit() into tpm-tis-utils.c and rename itStefan Berger8-59/+56
To be able to remove tpm_tis_base_addr from test cases that do not really need it move the tpm_util_tis_transmit() function into tpm-tis-utils.c and rename it to tpm_tis_transmit(). Fix a locality parameter in a test case on the way. Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20230331173051.3857801-3-stefanb@linux.ibm.com
2023-04-20qtest: Add functions for accessing devices on Aspeed I2C controllerStefan Berger3-0/+165
Add read and write functions for accessing registers of I2C devices connected to the Aspeed I2C controller. Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Ninad Palsule <ninad@linux.ibm.com> Acked-by: Thomas Huth <thuth@redhat.com> Message-id: 20230331173051.3857801-2-stefanb@linux.ibm.com
2023-04-20tests/avocado/aspeed: Add TPM TIS I2C testJoel Stanley1-2/+40
Add a new buildroot image based test that attaches a TPM emulator to the I2C bus and checks for a known PCR0 value for the image that was booted. Note that this does not tear down swtpm process when qemu execution fails. The swtpm process will exit when qemu exits if a connection has been made, but if the test errors before connection then the swtpm process will still be around. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Ninad Palsule <ninad@linux.ibm.com> Message-id: 20230328120844.190914-1-joel@jms.id.au
2023-04-20tpm: Add support for TPM device over I2C busNinad Palsule6-0/+589
Qemu already supports devices attached to ISA and sysbus. This drop adds support for the I2C bus attached TPM devices. I2C model only supports TPM2 protocol. This commit includes changes for the common code. - Added I2C emulation model. Logic was added in the model to temporarily cache the data as I2C interface works per byte basis. - New tpm type "tpm-tis-i2c" added for I2C support. The user has to provide this string on command line. Testing: TPM I2C device module is tested using SWTPM (software based TPM package). Qemu uses the rainier machine and is connected to swtpm over the socket interface. The command to start swtpm is as follows: $ swtpm socket --tpmstate dir=/tmp/mytpm1 \ --ctrl type=unixio,path=/tmp/mytpm1/swtpm-sock \ --tpm2 --log level=100 The command to start qemu is as follows: $ qemu-system-arm -M rainier-bmc -nographic \ -kernel ${IMAGEPATH}/fitImage-linux.bin \ -dtb ${IMAGEPATH}/aspeed-bmc-ibm-rainier.dtb \ -initrd ${IMAGEPATH}/obmc-phosphor-initramfs.rootfs.cpio.xz \ -drive file=${IMAGEPATH}/obmc-phosphor-image.rootfs.wic.qcow2,if=sd,index=2 \ -net nic -net user,hostfwd=:127.0.0.1:2222-:22,hostfwd=:127.0.0.1:2443-:443 \ -chardev socket,id=chrtpm,path=/tmp/mytpm1/swtpm-sock \ -tpmdev emulator,id=tpm0,chardev=chrtpm \ -device tpm-tis-i2c,tpmdev=tpm0,bus=aspeed.i2c.bus.12,address=0x2e Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Tested-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Tested-by: Joel Stanley <joel@jms.id.au> Message-id: 20230414220754.1191476-4-ninadpalsule@us.ibm.com
2023-04-20tpm: Extend common APIs to support TPM TIS I2CNinad Palsule3-8/+72
Qemu already supports devices attached to ISA and sysbus. This drop adds support for the I2C bus attached TPM devices. This commit includes changes for the common code. - Added support for the new checksum registers which are required for the I2C support. The checksum calculation is handled in the qemu common code. - Added wrapper function for read and write data so that I2C code can call it without MMIO interface. The TPM TIS I2C spec describes in the table in section "Interface Locality Usage per Register" that the TPM_INT_ENABLE and TPM_INT_STATUS registers must be writable for any locality even if the locality is not the active locality. Therefore, remove the checks whether the writing locality is the active locality for these registers. Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Tested-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Tested-by: Joel Stanley <joel@jms.id.au> Message-id: 20230414220754.1191476-3-ninadpalsule@us.ibm.com
2023-04-20docs: Add support for TPM devices over I2C busNinad Palsule1-0/+21
This is a documentation change for I2C TPM device support. Qemu already supports devices attached to ISA and sysbus. This drop adds support for the I2C bus attached TPM devices. Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-id: 20230414220754.1191476-2-ninadpalsule@us.ibm.com
2023-04-20arm/mcimx7d-sabre: Set fec2-phy-connected property to falseGuenter Roeck1-0/+2
On mcimx7d-sabre, the MDIO bus is connected to the first Ethernet interface. Set fec2-phy-connected to false to reflect this. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-6-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20fsl-imx7: Add fec[12]-phy-connected propertiesGuenter Roeck2-0/+21
Add fec[12]-phy-connected properties and use it to set phy-connected and phy-consumer properties for imx_fec. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-5-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20arm/mcimx6ul-evk: Set fec1-phy-connected property to falseGuenter Roeck1-0/+2
On mcimx6ul-evk, the MDIO bus is connected to the second Ethernet interface. Set fec1-phy-connected to false to reflect this. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-4-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20fsl-imx6ul: Add fec[12]-phy-connected propertiesGuenter Roeck2-0/+21
Add fec[12]-phy-connected properties and use it to set phy-connected and phy-consumer properties for imx_fec. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-3-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20tests/vm/freebsd: Update to FreeBSD 13.2Thomas Huth1-76/+25
According to QEMU's support policy, we stop supporting the previous major release two years after the the new major release has been published. So we can stop testing FreeBSD 12 now and should switch our FreeBSD VM to version 13 instead. Some changes are needed for this update: The downloadable .ISO images do not use the serial port as console by default anymore, so they are not usable in the same way as with FreeBSD 12. Fortunately, the FreeBSD project now also offers some pre-installed CI images that have the serial console enabled, so we can use those now, with the benefit that we can skip almost all parts of the previous installation process. Message-Id: <20230419144553.719749-1-thuth@redhat.com> Reviewed-by: Warner Losh <imp@bsdimp.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-04-20hw/net/imx_fec: Support two Ethernet interfaces connected to single MDIO busGuenter Roeck2-4/+25
The SOC on i.MX6UL and i.MX7 has 2 Ethernet interfaces. The PHY on each may be connected to separate MDIO busses, or both may be connected on the same MDIO bus using different PHY addresses. Commit 461c51ad4275 ("Add a phy-num property to the i.MX FEC emulator") added support for specifying PHY addresses, but it did not provide support for linking the second PHY on a given MDIO bus to the other Ethernet interface. To be able to support two PHY instances on a single MDIO bus, two properties are needed: First, there needs to be a flag indicating if the MDIO bus on a given Ethernet interface is connected. If not, attempts to read from this bus must always return 0xffff. Implement this property as phy-connected. Second, if the MDIO bus on an interface is active, it needs a link to the consumer interface to be able to provide PHY access for it. Implement this property as phy-consumer. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-2-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20qtest: Add a test case for TPM TIS I2C connected to Aspeed I2C controllerStefan Berger2-0/+666
Add a test case for the TPM TIS I2C device exercising most of its functionality, including localities. Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Tested-by: Cédric Le Goater <clg@kaod.org> Tested-by: Ninad Palsule<ninad@linux.ibm.com> Message-Id: <20230331173051.3857801-4-stefanb@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-04-20qtest: Move tpm_util_tis_transmit() into tpm-tis-utils.c and rename itStefan Berger8-59/+56
To be able to remove tpm_tis_base_addr from test cases that do not really need it move the tpm_util_tis_transmit() function into tpm-tis-utils.c and rename it to tpm_tis_transmit(). Fix a locality parameter in a test case on the way. Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20230331173051.3857801-3-stefanb@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-04-20qtest: Add functions for accessing devices on Aspeed I2C controllerStefan Berger3-0/+165
Add read and write functions for accessing registers of I2C devices connected to the Aspeed I2C controller. Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Ninad Palsule <ninad@linux.ibm.com> Message-Id: <20230331173051.3857801-2-stefanb@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-04-20MAINTAINERS: Add Juan Quintela to developer guides reviewJuan Quintela1-0/+1
Signed-off-by: Juan Quintela <quintela@redhat.com> Message-Id: <20230419163457.17175-1-quintela@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-04-20cpu: Remove parameter of list_cpus()Thomas Huth3-3/+3
The "optarg" parameter is completely unused, so let's drop it. Message-Id: <20230419124831.678079-1-thuth@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-04-20hw/core: Move numa.c into the target independent source setThomas Huth1-1/+1
There is nothing that depends on target specific macros in this file, so we can move it to the common source set to avoid that we have to compile this file multiple times (one time for each target). Message-Id: <20230413182636.139356-1-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-04-20softmmu: Move dirtylimit.c into the target independent source setThomas Huth2-2/+3
dirtylimit.c just uses one TARGET_PAGE_SIZE macro - change it to qemu_target_page_size() so we can move thefile into the target independent source set. Then we only have to compile this file once during the build instead of multiple times (one time for each target). Message-Id: <20230413054509.54421-1-thuth@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-04-20hw/display: Compile vga.c as target-independent codeThomas Huth2-10/+23
The target checks here are only during the initialization, so they are not performance critical. We can switch these to runtime checks to avoid that we have to compile this file multiple times during the build, and make the code ready for an universal build one day. Message-Id: <20230412163501.36770-1-thuth@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-04-20softmmu: Make qtest.c target independentThomas Huth2-7/+7
The code in this file is not performance critical, so we can use the target independent endianess functions to only compile this file once for all targets. Message-Id: <20230411183418.1640500-4-thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-04-20include/exec: Provide the tswap() functions for target independent code, tooThomas Huth2-63/+73
In some cases of target independent code, it would be useful to have access to the functions that swap endianess in case it differs between guest and host. Thus re-implement the tswapXX() functions in a new header that can be included separately. The check whether the swapping is needed continues to be done at compile-time for target specific code, while it is done at run-time in target-independent code. Message-Id: <20230411183418.1640500-3-thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-04-20softmmu/qtest: Move the target-specific pseries RTAS code out of qtest.cThomas Huth3-26/+46
Ideally, qtest.c should be independent from target specific code, so we only have to compile it once for all targets. Thus start improving the situation by moving the pseries related code to hw/ppc/spapr_rtas.c instead and allow target code to register a callback handler for such target specific commands. Message-Id: <20230411183418.1640500-2-thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-04-20hw/char: Move two more files from specific_ss to softmmu_ssThomas Huth1-3/+2
The code for these two devices seems to be independent from any target specific macros. "riscv_htif.c" is used for both, riscv32 and riscv64, so by moving this to the common code source set, we can avoid to compile it twice every time. "goldfish_tty.c" is only used for one target at the moment, but since it is a paravirtualized device, it could get useful for other targets one day, so let's move it now, too. Message-Id: <20230411173206.1511621-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-04-20target/i386: Set family/model/stepping of the "max" CPU according to LM bitThomas Huth1-9/+22
We want to get rid of the "#ifdef TARGET_X86_64" compile-time switch in the long run, so we can drop the separate compilation of the "qemu-system-i386" binary one day - but we then still need a way to run a guest with max. CPU settings in 32-bit mode. So the "max" CPU should determine its family/model/stepping settings according to the "large mode" (LM) CPU feature bit during runtime, so that it is possible to run "qemu-system-x86_64 -cpu max,lm=off" and still get a sane family/model/stepping setting for the guest CPU. To be able to check the LM bit, we have to move the code that sets up these properties to a "realize" function, since the LM setting is not available yet when the "instance_init" function is being called. Message-Id: <20230306154311.476458-1-thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>