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2018-05-04qapi: add SysEmuTarget to "common.json"Laszlo Ersek2-1/+24
We'll soon need an enumeration type that lists all the softmmu targets that QEMU (the project) supports. Introduce @SysEmuTarget to "common.json". The enum constant @x86_64 doesn't match the QAPI convention of preferring hyphen ("-") over underscore ("_"). This is intentional; the @SysEmuTarget constants are supposed to produce QEMU executable names when stringified and appended to the "qemu-system-" prefix. Put differently, the replacement text of the TARGET_NAME preprocessor macro must be possible to look up in the list of (stringified) enum constants. Like other enum types, @SysEmuTarget too can be used for discriminator fields in unions. For the @i386 constant, a C-language union member called "i386" would be generated. On mingw build hosts, "i386" is a macro however. Add "i386" to "polluted_words" at once. Cc: "Daniel P. Berrange" <berrange@redhat.com> Cc: Eric Blake <eblake@redhat.com> Cc: Markus Armbruster <armbru@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20180427192852.15013-3-lersek@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2018-05-04qapi: fill in CpuInfoFast.arch in query-cpus-fastLaszlo Ersek2-2/+16
* Commit ca230ff33f89 added the @arch field to @CpuInfoFast, but it failed to set the new field in qmp_query_cpus_fast(), when TARGET_S390X was not defined. The updated @query-cpus-fast example in "qapi-schema.json" showed "arch":"x86" only because qmp_query_cpus_fast() calls g_malloc0() to allocate @CpuInfoFast, and the CPU_INFO_ARCH_X86 enum constant is generated with value 0. All @arch values other than @s390 implied the @CpuInfoOther sub-struct for @CpuInfoFast -- at the time of writing the patch --, thus no fields other than @arch needed to be set when TARGET_S390X was not defined. Set @arch now, by copying the corresponding assignments from qmp_query_cpus(). * Commit 25fa194b7b11 added the @riscv enum constant to @CpuInfoArch (used in both @CpuInfo and @CpuInfoFast -- the return types of the @query-cpus and @query-cpus-fast commands, respectively), and assigned, in both return structures, the @CpuInfoRISCV sub-structure to the new enum value. However, qmp_query_cpus_fast() would not populate either the @arch field or the @CpuInfoRISCV sub-structure, when TARGET_RISCV was defined; only qmp_query_cpus() would. Assign @CpuInfoOther to the @riscv enum constant in @CpuInfoFast, and populate only the @arch field in qmp_query_cpus_fast(). Getting CPU state without interrupting KVM is an exceptional thing that only S390X does currently. Quoting Cornelia Huck <cohuck@redhat.com>, "s390x is exceptional in that it has state in QEMU that is actually interesting for upper layers and can be retrieved without performance penalty". See also <https://www.redhat.com/archives/libvir-list/2018-February/msg00121.html>. Cc: Cornelia Huck <cohuck@redhat.com> Cc: Eric Blake <eblake@redhat.com> Cc: Markus Armbruster <armbru@redhat.com> Cc: Viktor VM Mihajlovski <mihajlov@linux.vnet.ibm.com> Cc: qemu-stable@nongnu.org Fixes: ca230ff33f89bf7102cbfbc2328716da6750aaed Fixes: 25fa194b7b11901561532e435beb83d046899f7a Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20180427192852.15013-2-lersek@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2018-05-04qobject: Modify qobject_ref() to return objMarc-André Lureau12-64/+47
For convenience and clarity, make it possible to call qobject_ref() at the time when the reference is associated with a variable, or argument, by making qobject_ref() return the same pointer as given. Use that to simplify the callers. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20180419150145.24795-5-marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> [Useless change to qobject_ref_impl() dropped, commit message improved slightly] Signed-off-by: Markus Armbruster <armbru@redhat.com>
2018-05-04qobject: Replace qobject_incref/QINCREF qobject_decref/QDECREFMarc-André Lureau94-613/+609
Now that we can safely call QOBJECT() on QObject * as well as its subtypes, we can have macros qobject_ref() / qobject_unref() that work everywhere instead of having to use QINCREF() / QDECREF() for QObject and qobject_incref() / qobject_decref() for its subtypes. The replacement is mechanical, except I broke a long line, and added a cast in monitor_qmp_cleanup_req_queue_locked(). Unlike qobject_decref(), qobject_unref() doesn't accept void *. Note that the new macros evaluate their argument exactly once, thus no need to shout them. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20180419150145.24795-4-marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> [Rebased, semantic conflict resolved, commit message improved] Signed-off-by: Markus Armbruster <armbru@redhat.com>
2018-05-04qobject: use a QObjectBase_ structMarc-André Lureau9-26/+35
By moving the base fields to a QObjectBase_, QObject can be a type which also has a 'base' field. This allows writing a generic QOBJECT() macro that will work with any QObject type, including QObject itself. The container_of() macro ensures that the object to cast has a QObjectBase_ base field, giving some type safety guarantees. QObject must have no members but QObjectBase_ base, or else QOBJECT() breaks. QObjectBase_ is not a typedef and uses a trailing underscore to make it obvious it is not for normal use and to avoid potential abuse. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20180419150145.24795-3-marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2018-05-04qobject: Ensure base is at offset 0Marc-André Lureau2-3/+11
All QObject types have the base QObject as their first field. This allows the simplification of qobject_to(). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20180419150145.24795-2-marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> [Commit message paragraph on type casts dropped, to avoid giving the impression type casting would be okay] Signed-off-by: Markus Armbruster <armbru@redhat.com>
2018-05-04qobject: Use qobject_to() instead of type castMarkus Armbruster1-1/+1
The proper way to convert from (abstract) QObject to a (concrete) subtype is qobject_to(). Look for offenders that type cast instead: $ git-grep '(Q[A-Z][a-z]* \*)' hmp.c: qmp_device_add((QDict *)qdict, NULL, &err); include/qapi/qmp/qobject.h: return (QObject *)obj; qobject/qobject.c:static void (*qdestroy[QTYPE__MAX])(QObject *) = { tests/check-qdict.c: dst = (QDict *)qdict_crumple(src, &error_abort); The first two cast away const, the third isn't a type cast. Fix the fourth. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20180426152805.8469-1-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2018-05-029p: add trace event for v9fs_setattr()Greg Kurz2-0/+7
Don't print the tv_nsec part of atime and mtime, to stay below the 10 argument limit of trace events. Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2018-05-01tcg: workaround branch instruction overflow in tcg_out_qemu_ld/stLaurent Vivier3-6/+6
ppc64 uses a BC instruction to call the tcg_out_qemu_ld/st slow path. BC instruction uses a relative address encoded on 14 bits. The slow path functions are added at the end of the generated instructions buffer, in the reverse order of the callers. So more we have slow path functions more the distance between the caller (BC) and the function increases. This patch changes the behavior to generate the functions in the same order of the callers. Cc: qemu-stable@nongnu.org Fixes: 15fa08f845 ("tcg: Dynamically allocate TCGOps") Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20180429235840.16659-1-lvivier@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-05-01tcg: Improve TCGv_ptr supportRichard Henderson4-94/+130
Drop TCGV_PTR_TO_NAT and TCGV_NAT_TO_PTR internal macros. Add tcg_temp_local_new_ptr, tcg_gen_brcondi_ptr, tcg_gen_ext_i32_ptr, tcg_gen_trunc_i64_ptr, tcg_gen_extu_ptr_i64, tcg_gen_trunc_ptr_i32. Use inlines instead of macros where possible. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-05-01tcg: Allow wider vectors for cmp and mulRichard Henderson1-4/+4
In db432672, we allow wide inputs for operations such as add. However, in 212be173 and 3774030a we didn't do the same for compare and multiply. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-05-01tcg/arm: Fix memory barrier encodingHenry Wertz1-2/+2
I found with qemu 2.11.x or newer that I would get an illegal instruction error running some Intel binaries on my ARM chromebook. On investigation, I found it was quitting on memory barriers. qemu instruction: mb $0x31 was translating as: 0x604050cc: 5bf07ff5 blpl #0x600250a8 After patch it gives: 0x604050cc: f57ff05b dmb ish In short, I found INSN_DMB_ISH (memory barrier for ARMv7) appeared to be correct based on online docs, but due to some endian-related shenanigans it had to be byte-swapped to suit qemu; it appears INSN_DMB_MCR (memory barrier for ARMv6) also should be byte swapped (and this patch does so). I have not checked for correctness of aarch64's barrier instruction. Cc: qemu-stable@nongnu.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Henry Wertz <hwertz10@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-05-01tcg: Document INDEX_mul[us]h_*Richard Henderson1-0/+8
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-05-01hw/m68k/mcf5208: Fix trivial typo in board descriptionThomas Huth1-1/+1
It's the MCF5208 evaluation board, not the MCF5206 eval board. Signed-off-by: Thomas Huth <huth@tuxfamily.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180429094002.3293c9de@thl530.multi.box> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-05-01m68k: remove dead code (Coverity CID1390617)Laurent Vivier1-29/+14
floatx80_sin() and floatx80_cos() are derived from one sincos() function. They have both unused code coming from their common origin. Remove it. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20180430170156.1860-2-laurent@vivier.eu>
2018-05-01m68k: Fix floatx80_lognp1 (Coverity CID1390587)Laurent Vivier1-1/+2
return the result of packFloatx80() instead of dropping it. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180430170156.1860-1-laurent@vivier.eu>
2018-04-30target-microblaze: mmu: Make the TLBX MISS bit read-onlyEdgar E. Iglesias1-0/+4
Make the TLBX MISS bit read-only. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-04-30target-microblaze: mmu: Make TLBSX write-onlyEdgar E. Iglesias1-1/+4
Make TLBSX write-only and guest-error log reads from it. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-04-30target-microblaze: Don't clobber the IMM reg for ld/st reversedEdgar E. Iglesias1-2/+0
Do not clobber the IMM register on reversed load/stores. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-04-30target-microblaze: Fix trap checks for FPU insnsEdgar E. Iglesias1-1/+1
Fix trap checks for FPU insns when extended FPU insns are enabled. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-04-30target-microblaze: Respect MSR.PVR as read-onlyEdgar E. Iglesias1-1/+1
Respect MSR.PVR as read-only. We were wrongly overwriting the PVR bit. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-04-30m68k: fix subx mem, mem instructionPavel Dovgalyuk1-2/+2
This patch fixes decrement of the pointers for subx mem, mem instructions. Without the patch pointers are decremented by OS_* constant value instead of retrieving the corresponding data size and using it as a decrement. Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180418064152.24606.71975.stgit@pasha-VirtualBox> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-04-30linux-user: Add ARM get_tls syscall supportChristophe Lyon2-0/+4
Co-Authored-By: Mickaël Guêné <mickael.guene@st.com> Signed-off-by: Christophe Lyon <christophe.lyon@st.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20180416091845.7315-1-christophe.lyon@st.com> [lv: moved the change to linux-user/arm/cpu_loop.c] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-04-30linux-user: move xtensa cpu loop to xtensa directoryLaurent Vivier2-250/+241
No code change, only move code from main.c to xtensa/cpu_loop.c. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180411185651.21351-20-laurent@vivier.eu>
2018-04-30linux-user: move hppa cpu loop to hppa directoryLaurent Vivier2-193/+186
No code change, only move code from main.c to hppa/cpu_loop.c. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180411185651.21351-19-laurent@vivier.eu>
2018-04-30linux-user: move riscv cpu loop to riscv directoryLaurent Vivier2-100/+93
No code change, only move code from main.c to riscv/cpu_loop.c. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Michael Clark <mjc@sifive.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180411185651.21351-18-laurent@vivier.eu>
2018-04-30linux-user: move tilegx cpu loop to tilegx directoryLaurent Vivier2-267/+260
No code change, only move code from main.c to tilegx/cpu_loop.c. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180411185651.21351-17-laurent@vivier.eu>
2018-04-30linux-user: move s390x cpu loop to s390x directoryLaurent Vivier2-146/+139
No code change, only move code from main.c to s390x/cpu_loop.c. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180411185651.21351-16-laurent@vivier.eu>
2018-04-30linux-user: move alpha cpu loop to alpha directoryLaurent Vivier2-204/+199
No code change, only move code from main.c to alpha/cpu_loop.c. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180411185651.21351-15-laurent@vivier.eu>
2018-04-30linux-user: move m68k cpu loop to m68k directoryLaurent Vivier2-149/+145
No code change, only move code from main.c to m68k/cpu_loop.c. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180411185651.21351-14-laurent@vivier.eu>
2018-04-30linux-user: move microblaze cpu loop to microblaze directoryLaurent Vivier2-155/+150
No code change, only move code from main.c to microblaze/cpu_loop.c. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180411185651.21351-13-laurent@vivier.eu>
2018-04-30linux-user: move cris cpu loop to cris directoryLaurent Vivier2-90/+89
No code change, only move code from main.c to cris/cpu_loop.c. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180411185651.21351-12-laurent@vivier.eu>
2018-04-30linux-user: move sh4 cpu loop to sh4 directoryLaurent Vivier2-90/+85
No code change, only move code from main.c to sh4/cpu_loop.c. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180411185651.21351-11-laurent@vivier.eu>
2018-04-30linux-user: move openrisc cpu loop to openrisc directoryLaurent Vivier2-96/+89
No code change, only move code from main.c to openrisc/cpu_loop.c. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180411185651.21351-10-laurent@vivier.eu>
2018-04-30linux-user: move nios2 cpu loop to nios2 directoryLaurent Vivier2-133/+126
No code change, only move code from main.c to nios2/cpu_loop.c. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180411185651.21351-9-laurent@vivier.eu>
2018-04-30linux-user: move mips/mips64 cpu loop to mips directoryLaurent Vivier3-732/+724
No code change, only move code from main.c to mips/cpu_loop.c. Include mips/cpu_loop.c in mips64/cpu_loop.c to avoid to duplicate code. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180411185651.21351-8-laurent@vivier.eu>
2018-04-30linux-user: move ppc/ppc64 cpu loop to ppc directoryLaurent Vivier2-559/+554
No code change, only move code from main.c to ppc/cpu_loop.c. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180411185651.21351-7-laurent@vivier.eu>
2018-04-30linux-user: move sparc/sparc64 cpu loop to sparc directoryLaurent Vivier3-294/+282
No code change, only move code from main.c to sparc/cpu_loop.c. Include sparc/cpu_loop.c in sparc64/cpu_loop.c to avoid to duplicate code. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180411185651.21351-6-laurent@vivier.eu>
2018-04-30linux-user: move arm cpu loop to arm directoryLaurent Vivier2-431/+432
No code change, only move code from main.c to arm/cpu_loop.c and duplicate some macro defined for both arm and aarch64. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180411185651.21351-5-laurent@vivier.eu>
2018-04-30linux-user: move aarch64 cpu loop to aarch64 directoryLaurent Vivier2-107/+158
No code change, only move code from main.c to aarch64/cpu_loop.c and duplicate some macro defined for both arm and aarch64. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180411185651.21351-4-laurent@vivier.eu>
2018-04-30linux-user: move i386/x86_64 cpu loop to i386 directoryLaurent Vivier3-354/+345
No code change, only move code from main.c to i386/cpu_loop.c. Include i386/cpu_loop.c in x86_64/cpu_loop.c to avoid to duplicate code. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180411185651.21351-3-laurent@vivier.eu>
2018-04-30linux-user: create a dummy per arch cpu_loop.cLaurent Vivier24-15/+588
Create a cpu_loop-common.h for future use by these new files and use it in the existing main.c Introduce target_cpu_copy_regs(): declare the function in cpu_loop-common.h and an empty function for each target, to move all the cpu_loop prologues to this function. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180411185651.21351-2-laurent@vivier.eu>
2018-04-30linux-user: define TARGET_ARCH_HAS_SETUP_FRAMELaurent Vivier23-110/+28
Instead of calling setup_frame() conditionally to a list of known targets, define TARGET_ARCH_HAS_SETUP_FRAME if the target provides the function and call it only if the macro is defined. Move declarations of setup_frame() and setup_rt_frame() to linux-user/signal-common.h Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180424192635.6027-21-laurent@vivier.eu>
2018-04-30linux-user: move ppc/ppc64 signal.c parts to ppc directoryLaurent Vivier3-670/+678
No code change, only move code from signal.c to ppc/signal.c, except adding includes and exporting setup_frame() and setup_rt_frame(). Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180424192635.6027-20-laurent@vivier.eu>
2018-04-30linux-user: move mips/mips64 signal.c parts to mips directoryLaurent Vivier5-382/+396
No code change, only move code from signal.c to mips/signal.c, except adding includes and exporting setup_frame() and setup_rt_frame(). mips64/signal.c includes mips/signal.c Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180424192635.6027-19-laurent@vivier.eu>
2018-04-30linux-user: move sparc/sparc64 signal.c parts to sparc directoryLaurent Vivier5-605/+619
No code change, only move code from signal.c to sparc/signal.c, except adding includes and exporting setup_frame() and setup_rt_frame(). sparc64/signal.c includes sparc/signal.c Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180424192635.6027-18-laurent@vivier.eu>
2018-04-30linux-user: move i386/x86_64 signal.c parts to i386 directoryLaurent Vivier5-581/+595
No code change, only move code from signal.c to i386/signal.c, except adding includes and exporting setup_frame() and setup_rt_frame(). x86_64/signal.c includes i386/signal.c Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180424192635.6027-17-laurent@vivier.eu>
2018-04-30linux-user: move xtensa signal.c parts to xtensa directoryLaurent Vivier3-247/+253
No code change, only move code from signal.c to xtensa/signal.c, except adding includes and exporting setup_rt_frame(). Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180424192635.6027-16-laurent@vivier.eu>
2018-04-30linux-user: move hppa signal.c parts to hppa directoryLaurent Vivier3-189/+195
No code change, only move code from signal.c to hppa/signal.c, except adding includes and exporting setup_rt_frame(). Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180424192635.6027-15-laurent@vivier.eu>
2018-04-30linux-user: move riscv signal.c parts to riscv directoryLaurent Vivier3-197/+203
No code change, only move code from signal.c to riscv/signal.c, except adding includes and exporting setup_rt_frame(). Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180424192635.6027-14-laurent@vivier.eu>