| Commit message (Expand) | Author | Files | Lines |
|---|
| 2020-09-01 | target/arm: Convert Neon VCVT fixed-point to gvec | Peter Maydell | 3 | -17/+43 |
| 2020-09-01 | target/arm: Implement fp16 for Neon float-integer VCVT | Peter Maydell | 3 | -11/+42 |
| 2020-09-01 | target/arm: Implement fp16 for Neon pairwise fp ops | Peter Maydell | 3 | -26/+68 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VRSQRTS | Peter Maydell | 4 | -36/+34 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VRECPS | Peter Maydell | 4 | -34/+35 |
| 2020-09-01 | target/arm: Implement fp16 for Neon fp compare-vs-0 | Peter Maydell | 3 | -28/+45 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VFMA, VMFS | Peter Maydell | 3 | -91/+40 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VMLA, VMLS operations | Peter Maydell | 3 | -31/+50 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VMAXNM, VMINNM | Peter Maydell | 3 | -8/+27 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VMAX, VMIN | Peter Maydell | 3 | -3/+14 |
| 2020-09-01 | target/arm: Implement fp16 for VACGE, VACGT | Peter Maydell | 3 | -2/+34 |
| 2020-09-01 | target/arm: Implement fp16 for VCEQ, VCGE, VCGT comparisons | Peter Maydell | 3 | -3/+56 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VABS, VNEG of floats | Peter Maydell | 1 | -6/+28 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VRECPE, VRSQRTE using gvec | Peter Maydell | 1 | -2/+29 |
| 2020-09-01 | target/arm: Implement FP16 for Neon VADD, VSUB, VABD, VMUL | Peter Maydell | 3 | -17/+26 |
| 2020-09-01 | target/arm: Implement VFP fp16 VMOV between gp and halfprec registers | Peter Maydell | 2 | -0/+35 |
| 2020-09-01 | target/arm: Implement new VFP fp16 insn VMOVX | Peter Maydell | 2 | -0/+28 |
| 2020-09-01 | target/arm: Implement new VFP fp16 insn VINS | Peter Maydell | 2 | -0/+31 |
| 2020-09-01 | target/arm: Implement VFP fp16 VRINT* | Peter Maydell | 5 | -8/+122 |
| 2020-09-01 | target/arm: Implement VFP fp16 VSEL | Peter Maydell | 2 | -6/+16 |
| 2020-09-01 | target/arm: Implement VFP vp16 VCVT-with-specified-rounding-mode | Peter Maydell | 2 | -10/+28 |
| 2020-09-01 | target/arm: Implement VFP fp16 VCVT between float and fixed-point | Peter Maydell | 2 | -0/+61 |
| 2020-09-01 | target/arm: Use macros instead of open-coding fp16 conversion helpers | Peter Maydell | 2 | -80/+12 |
| 2020-09-01 | target/arm: Make VFP_CONV_FIX macros take separate float type and float size | Peter Maydell | 1 | -23/+23 |
| 2020-09-01 | target/arm: Implement VFP fp16 VCVT between float and integer | Peter Maydell | 2 | -0/+69 |
| 2020-09-01 | target/arm: Implement VFP fp16 VLDR and VSTR | Peter Maydell | 2 | -2/+36 |
| 2020-09-01 | target/arm: Implement VFP fp16 VCMP | Peter Maydell | 4 | -7/+51 |
| 2020-09-01 | target/arm: Implement VFP fp16 for VMOV immediate | Peter Maydell | 2 | -0/+24 |
| 2020-09-01 | target/arm: Implement VFP fp16 for VABS, VNEG, VSQRT | Peter Maydell | 4 | -0/+55 |
| 2020-09-01 | target/arm: Macroify uses of do_vfp_2op_sp() and do_vfp_2op_dp() | Peter Maydell | 1 | -35/+14 |
| 2020-09-01 | target/arm: Implement VFP fp16 for fused-multiply-add | Peter Maydell | 4 | -0/+77 |
| 2020-09-01 | target/arm: Macroify trans functions for VFMA, VFMS, VFNMA, VFNMS | Peter Maydell | 1 | -37/+13 |
| 2020-09-01 | target/arm: Implement VFP fp16 VMLA, VMLS, VNMLS, VNMLA, VNMUL | Peter Maydell | 4 | -0/+95 |
| 2020-09-01 | target/arm: Implement VFP fp16 for VFP_BINOP operations | Peter Maydell | 5 | -0/+106 |
| 2020-09-01 | target/arm: Use correct ID register check for aa32_fp16_arith | Peter Maydell | 1 | -6/+1 |
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