index
:
focaccia-qemu
this commit
master
sr/plugin
ta/focaccia
Unnamed repository; edit this file 'description' to name the repository.
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
scripts
/
qapi
/
source.py
(
unfollow
)
Commit message (
Expand
)
Author
Files
Lines
2025-09-30
lcitool: update, switch to f41
Marc-André Lureau
20
-37
/
+79
2025-09-30
build-sys: cfi_debug and safe_stack are not compatible
Marc-André Lureau
2
-3
/
+6
2025-09-30
tests/docker/common: print meson log on configure failure
Marc-André Lureau
1
-1
/
+1
2025-09-30
tests/docker: use fully qualified image name for emsdk
Marc-André Lureau
1
-1
/
+1
2025-09-30
tests/docker/common: print errors to stderr
Marc-André Lureau
1
-2
/
+2
2025-09-30
configure: set the bindgen cross target
Marc-André Lureau
4
-0
/
+110
2025-09-30
configure: fix rust meson configuration
Marc-André Lureau
1
-1
/
+1
2025-09-30
scripts/archive-source: use a bash array
Marc-André Lureau
1
-8
/
+23
2025-09-30
scripts/archive-source: silence subprojects downloads
Marc-André Lureau
1
-1
/
+1
2025-09-30
scripts/archive-source: speed up downloading subprojects
Marc-André Lureau
1
-2
/
+3
2025-09-30
gitlab-ci: fix 'needs' property type must be array
Marc-André Lureau
3
-54
/
+54
2025-09-30
build-sys: require -lrt when no shm_open() in std libs
Marc-André Lureau
1
-7
/
+9
2025-09-29
hw/arm/aspeed_ast27x0-fc: Make sub-init functions return bool with errp
Jamin Lin
1
-14
/
+20
2025-09-29
hw/arm/aspeed_ast27x0-fc: Drop dead return checks
Jamin Lin
1
-29
/
+14
2025-09-29
hw/arm/aspeed: Move aspeed_load_vbootrom to common SoC code
Jamin Lin
3
-30
/
+30
2025-09-29
hw/arm/aspeed: Move aspeed_install_boot_rom to common SoC code
Jamin Lin
3
-20
/
+22
2025-09-29
hw/arm/aspeed: Move write_boot_rom to common SoC code
Jamin Lin
3
-31
/
+35
2025-09-29
hw/arm/aspeed: Move aspeed_board_init_flashes() to common SoC code
Jamin Lin
2
-22
/
+23
2025-09-29
tests/functional/arm/test_aspeed_ast2600: Add PCIe and network test
Jamin Lin
1
-0
/
+21
2025-09-29
hw/arm/aspeed_ast27x0: Introduce 3 PCIe RCs for AST2700
Jamin Lin
2
-0
/
+75
2025-09-29
hw/pci-host/aspeed: Disable Root Device and place Root Port at 00:00.0 to AST...
Jamin Lin
1
-0
/
+2
2025-09-29
hw/pci-host/aspeed: Add AST2700 PCIe config with dedicated H2X blocks
Jamin Lin
2
-0
/
+161
2025-09-29
hw/pci-host/aspeed: Add AST2700 PCIe PHY
Jamin Lin
2
-0
/
+40
2025-09-29
hw/arm/aspeed_ast2600: Add PCIe RC support (RC_H only)
Jamin Lin
2
-0
/
+75
2025-09-29
hw/arm/aspeed: Wire up PCIe devices in SoC model
Jamin Lin
1
-0
/
+13
2025-09-29
hw/pci-host/aspeed: Add MSI support and per-RC IOMMU address space
Jamin Lin
3
-0
/
+145
2025-09-29
hw/pci-host/aspeed: Add AST2600 PCIe Root Port and make address configurable
Jamin Lin
2
-0
/
+61
2025-09-29
hw/pci-host/aspeed: Add AST2600 PCIe Root Device support
Jamin Lin
2
-0
/
+67
2025-09-29
hw/pci-host/aspeed: Add AST2600 PCIe config space and host bridge
Jamin Lin
3
-0
/
+484
2025-09-29
hw/pci-host/aspeed: Add AST2600 PCIe PHY model
Jamin Lin
6
-0
/
+211
2025-09-29
hw/pci/pci_ids: Add PCI vendor ID for ASPEED
Jamin Lin
1
-0
/
+2
2025-09-29
tests/functional/arm: Add AST2600 boot test with generated OTP image
Kane-Chen-AS
1
-0
/
+15
2025-09-29
tests/functional/arm: Add AST1030 boot test with generated OTP image
Kane-Chen-AS
1
-4
/
+20
2025-09-29
tests/functional/arm: Add helper to generate OTP images
Kane-Chen-AS
1
-0
/
+8
2025-09-29
hw/arm/aspeed Move ast2700-evb alias to ast2700a1-evb
Jamin Lin
2
-3
/
+3
2025-09-29
docs/system/arm/aspeed: Document OTP memory options
Kane-Chen-AS
1
-0
/
+31
2025-09-29
hw/misc/aspeed_sbc: Handle OTP write command for voltage mode registers
Kane-Chen-AS
2
-0
/
+42
2025-09-29
hw/misc/aspeed_sbc: Add CAMP2 support for OTP data reads
Kane-Chen-AS
1
-0
/
+27
2025-09-29
hw/arm: Integrate ASPEED OTP memory support into AST1030 SoCs
Kane-Chen-AS
3
-1
/
+18
2025-09-29
hw/nvram/aspeed_otp: Add OTP programming semantics and tracing
Kane-Chen-AS
2
-1
/
+84
2025-09-29
hw/nvram/aspeed_otp: Add 'drive' property to support block backend
Kane-Chen-AS
1
-1
/
+14
2025-09-29
hw/arm: Integrate ASPEED OTP memory support into AST2600 SoCs
Kane-Chen-AS
2
-1
/
+3
2025-09-29
hw/misc/aspeed_sbc: Connect ASPEED OTP memory device to SBC
Kane-Chen-AS
3
-0
/
+121
2025-09-29
hw/nvram/aspeed_otp: Add ASPEED OTP memory device model
Kane-Chen-AS
3
-0
/
+136
2025-09-28
target/ppc: use MAKE_64BIT_MASK for mcrfs exception clear mask
Denis Sergeev
1
-1
/
+1
2025-09-28
target/ppc: Deprecate Power8E and Power8NVL
Aditya Gupta
2
-4
/
+13
2025-09-28
target/ppc: Introduce macro for deprecating PowerPC CPUs
Aditya Gupta
2
-2
/
+17
2025-09-28
target/ppc: Move remaining floating-point move instructions to decodetree.
Chinmay Rath
3
-40
/
+32
2025-09-28
target/ppc: Move floating-point move instructions to decodetree.
Chinmay Rath
3
-63
/
+28
2025-09-28
target/ppc: Move floating-point compare instructions to decodetree.
Chinmay Rath
5
-38
/
+22
[next]