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2021-03-18hw/block/pflash_cfi02: Rename register_memory(true) as mode_read_arrayPhilippe Mathieu-Daudé2-9/+10
The same pattern is used when setting the flash in READ_ARRAY mode: - Set the state machine command to READ_ARRAY - Reset the write_cycle counter - Reset the memory region in ROMD Refactor the current code by extracting this pattern. It is used three times: - When the timer expires and not in bypass mode - On a read access (on invalid command). - When the device is initialized. Here the ROMD mode is hidden by the memory_region_init_rom_device() call. pflash_register_memory(rom_mode=true) already sets the ROM device in "read array" mode (from I/O device to ROM one). Explicit that by renaming the function as pflash_mode_read_array(), adding a trace event and resetting wcycle. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: David Edmondson <david.edmondson@oracle.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210310170528.1184868-7-philmd@redhat.com>
2021-03-18hw/block/pflash_cfi02: Open-code pflash_register_memory(rom=false)Philippe Mathieu-Daudé1-2/+4
There is only one call to pflash_register_memory() with rom_mode == false. As we want to modify pflash_register_memory() in the next patch, open-code this trivial function in place for the 'rom_mode == false' case. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: David Edmondson <david.edmondson@oracle.com> Message-Id: <20210310170528.1184868-6-philmd@redhat.com>
2021-03-18hw/block/pflash_cfi02: Set rom_mode to true in pflash_setup_mappings()Philippe Mathieu-Daudé1-3/+3
There is only one call to pflash_setup_mappings(). Convert 'rom_mode' to boolean and set it to true directly within pflash_setup_mappings(). Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: David Edmondson <david.edmondson@oracle.com> Message-Id: <20210310170528.1184868-5-philmd@redhat.com>
2021-03-18hw/block/pflash_cfi02: Extract pflash_cfi02_fill_cfi_table()Philippe Mathieu-Daudé1-94/+99
Fill the CFI table in out of DeviceRealize() in a new function: pflash_cfi02_fill_cfi_table(). Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: David Edmondson <david.edmondson@oracle.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210310170528.1184868-4-philmd@redhat.com>
2021-03-18hw/block/pflash_cfi01: Extract pflash_cfi01_fill_cfi_table()Philippe Mathieu-Daudé1-67/+73
Fill the CFI table in out of DeviceRealize() in a new function: pflash_cfi01_fill_cfi_table(). Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: David Edmondson <david.edmondson@oracle.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210310170528.1184868-3-philmd@redhat.com>
2021-03-18hw/block/pflash_cfi: Fix code style for checkpatch.plPhilippe Mathieu-Daudé2-15/+30
We are going to move this code, fix its style first. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: David Edmondson <david.edmondson@oracle.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210310170528.1184868-2-philmd@redhat.com>
2021-03-16Update OpenBIOS images to 4a004110 built from submodule.Mark Cave-Ayland4-0/+0
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2021-03-16qemu-timer: allow freeing a NULL timerPaolo Bonzini1-2/+4
Since 5f8e93c3e2 ("util/qemu-timer: Make timer_free() imply timer_del()", 2021-01-08) it is not possible anymore to pass a NULL pointer to timer_free(). Previously it would do nothing as it would simply pass NULL down to g_free(). Rectify this, which also fixes "-chardev braille" when there is no device. Reported-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-03-16hw/i8254: fix vmstate loadPavel Dovgalyuk1-1/+1
QEMU timer of channel 0 in i8254 is used to raise irq at the specified moment of time. This irq can be disabled with irq_disabled flag. But when vmstate of the pit is loaded, timer may be rearmed despite the disabled interrupts. This patch adds irq_disabled flag check to fix that. Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru> Message-Id: <161537170060.6654.9430112746749476215.stgit@pasha-ThinkPad-X280> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-03-16scsi: fix sense code for EREMOTEIOPaolo Bonzini1-2/+2
SENSE_CODE(LUN_COMM_FAILURE) has an ABORTED COMMAND sense key, so it results in a retry in Linux. To ensure that EREMOTEIO is forwarded to the guest, use a HARDWARE ERROR sense key instead. Note that the code before commit d7a84021d was incorrect because it used HARDWARE_ERROR as a SCSI status, not as a sense key. Reported-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-03-16Revert "accel: kvm: Add aligment assert for kvm_log_clear_one_slot"Paolo Bonzini1-7/+0
This reverts commit 3920552846e881bafa9f9aad0bb1a6eef874d7fb. Thomas Huth reported a failure with CentOS 6 guests: ../../devel/qemu/accel/kvm/kvm-all.c:690: kvm_log_clear_one_slot: Assertion `QEMU_IS_ALIGNED(start | size, psize)' failed. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-03-16configure: add option to explicitly enable/disable libgioDenis Plotnikov1-21/+39
Now, compilation of util/dbus is implicit and depends on libgio presence on the building host. The patch adds options to manage libgio dependencies explicitly. Signed-off-by: Denis Plotnikov <den-plotnikov@yandex-team.ru> Message-Id: <20210312151440.405776-1-den-plotnikov@yandex-team.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-03-16fuzz: move some DMA hooksAlexander Bulekov2-2/+1
For the sparse-mem device, we want the fuzzer to populate entire DMA reads from sparse-mem, rather than hooking into the individual MMIO memory_region_dispatch_read operations. Otherwise, the fuzzer will treat each sequential read separately (and populate it with a separate pattern). Work around this by rearranging some DMA hooks. Since the fuzzer has it's own logic to skip accidentally writing to MMIO regions, we can call the DMA cb, outside the flatview_translate loop. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-03-16fuzz: configure a sparse-mem device, by defaultAlexander Bulekov1-3/+11
The generic-fuzzer often provides randomized DMA addresses to virtual-devices. For a 64-bit address-space, the chance of these randomized addresses coinciding with RAM regions, is fairly small. Even though the fuzzer's instrumentation eventually finds valid addresses, this can take some-time, and slows-down fuzzing progress (especially, when multiple DMA buffers are involved). To work around this, create "fake" sparse-memory that spans all of the 64-bit address-space. Adjust the