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2024-01-24util/uri: Remove uri_string_unescape()Thomas Huth2-87/+11
uri_string_unescape() basically does the same as the glib function g_uri_unescape_segment(). So we can get rid of our implementation completely by simply using the glib function instead. Suggested-by: Stefan Weil <sw@weilnetz.de> Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Message-ID: <20240123182247.432642-2-thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-01-24tests/qtest: Bump timeouts of boot_sector_test()-based tests to 610 secondsThomas Huth1-2/+4
We're still seeing timeouts in qtests that use a TCG payload with TCI on a slow k8s runner: https://gitlab.com/qemu-project/qemu/-/jobs/5990992722 So we should bump the timeout of cdrom-test to see whether that fixes the issue. Now, cdrom-test, as bios-tables-test, pxe-test and vmgenid-test use the boot_sector_test() function for running a TCG payload. That function already uses an internal timeout of 600 seconds with the remark that the test could be slow with TCI. Thus from the outer meson test runner side, we should not use less than 600 seconds as timeout values for these tests. Let's bump them on the meson side to 610 seconds so that the tests themselves can run with their internal 600 seconds timeout and have some additional seconds on top for reporting the outcome. Message-ID: <20240124084412.465638-1-thuth@redhat.com> Reviewed-by: "Daniel P. Berrangé" <berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-01-23tests/unit/test-iov: Fix timeout problem on NetBSD and OpenBSDThomas Huth1-9/+11
The test-iov code uses usleep() with small values (<= 30) in some nested loops with many iterations. This causes a small delay on OSes like Linux that have a precise sleeping mechanism, but on systems like NetBSD and OpenBSD, each usleep() call takes multiple microseconds, which then sum up in a total test time of multiple minutes! Looking at the code, the usleep() does not really seem to be necessary here - if not enough data could be send, we should simply always use select() to wait 'til we can send more. Thus remove the usleep() and re-arrange the code a little bit to make it more clear what is going on here. Suggested-by: "Daniel P. Berrangé" <berrange@redhat.com> Message-ID: <20240122153347.71654-1-thuth@redhat.com> Reviewed-by: "Daniel P. Berrangé" <berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-01-23tests/qtest: Bump timeout of the boot-serial-test to 360 secondsThomas Huth1-1/+1
On the slow k8s CI runner, the test sometimes takes more than 240 seconds. See for example this run here where it took ~ 267 seconds: https://gitlab.com/qemu-project/qemu/-/jobs/5806087027#L4769 Thus we have to bump the timeout here even further to be on the safe side. Let's use 360 seconds which should hopefully really be high enough now. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2097 Message-ID: <20240123110353.30658-1-thuth@redhat.com> Reviewed-by: "Daniel P. Berrangé" <berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-01-19configure: Add linux header compile support for LoongArchBibo Mao1-0/+1
When compiling qemu with system KVM mode for LoongArch, header files in directory linux-headers/asm-loongarch should be used firstly. Otherwise it fails to find kvm.h on system with old glibc, since latest kernel header files are not installed. This patch adds linux_arch definition for LoongArch system so that header files in directory linux-headers/asm-loongarch can be included. Fixes: 714b03c125 ("target/loongarch: Add loongarch kvm into meson build") Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240116013952.264474-1-maobibo@loongson.cn> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-01-19MAINTAINERS: Update hw/core/cpu.c entryZhao Liu1-1/+2
The hw/core/cpu.c was split as hw/core/cpu-common.c and hw/core/cpu-sysemu.c in the commit df4fd7d5c8a3 ("cpu: Split as cpu-common / cpu-sysemu"). Update the related entry. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240115094852.3597165-2-zhao1.liu@linux.intel.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-01-19MAINTAINERS: Update Raphael Norwitz emailRaphael Norwitz1-1/+1
I will be leaving Nutanix so updating my email in MAINTAINERS to my personal email for now. Signed-off-by: Raphael Norwitz <raphael.norwitz@nutanix.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240111192846.111699-1-raphael.norwitz@nutanix.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-01-19hw/elf_ops: Ignore loadable segments with zero sizeBin Meng1-36/+39
Some ELF files really do have segments of zero size, e.g.: Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flags Align RISCV_ATTRIBUT 0x00000000000025b8 0x0000000000000000 0x0000000000000000 0x000000000000003e 0x0000000000000000 R 0x1 LOAD 0x0000000000001000 0x0000000080200000 0x0000000080200000 0x00000000000001d1 0x00000000000001d1 R E 0x1000 LOAD 0x00000000000011d1 0x00000000802001d1 0x00000000802001d1 0x0000000000000e37 0x0000000000000e37 RW 0x1000 LOAD 0x0000000000000120 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x1000 The current logic does not check for this condition, resulting in the incorrect assignment of 'lowaddr' as zero. There is already a piece of codes inside the segment traversal loop that checks for zero-sized loadable segments for not creating empty ROM blobs. Let's move this check to the beginning of the loop to cover both scenarios. Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240116155049.390301-1-bmeng@tinylab.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-01-19hw/scsi/esp-pci: set DMA_STAT_BCMBLT when BLAST command issuedMark Cave-Ayland1-0/+1
Even though the BLAST command isn't fully implemented in QEMU, the DMA_STAT_BCMBLT bit should be set after the command has been issued to indicate that the command has completed. This fixes an issue with the DC390 DOS driver which issues the BLAST command as part of its normal error recovery routine at startup, and otherwise sits in a tight loop waiting for DMA_STAT_BCMBLT to be set before continuing. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Guenter Roeck <linux@roeck-us.net> Message-ID: <20240112131529.515642-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-01-19hw/scsi/esp-pci: synchronise setting of DMA_STAT_DONE with ESP completion ↵Mark Cave-Ayland1-15/+13
interrupt The setting of DMA_STAT_DONE at the end of a DMA transfer can be configured to generate an interrupt, however the Linux driver manually checks for DMA_STAT_DONE being set and if it is, considers that a DMA transfer has completed. If DMA_STAT_DONE is set but the ESP device isn't indicating an interrupt then the Linux driver considers this to be a spurious interrupt. However this can occur in QEMU as there is a delay between the end of DMA transfer where DMA_STAT_DONE is set, and the ESP device raising its completion interrupt. This appears to be an incorrect assumption in the Linux driver as the ESP and PCI DMA interrupt sources are separate (and may not be raised exactly together), however we can work around this by synchronising the setting of DMA_STAT_DONE at the end of a DMA transfer with the ESP completion interrupt. In conjunction with the previous commit Linux is now able to correctly boot from an am53c974 PCI SCSI device on the hppa C3700 machine without emitting "iget: checksum invalid" and "Spurious irq, sreg=10" errors. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Guenter Roeck <linux@roeck-us.net> Message-ID: <20240112131529.515642-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-01-19hw/scsi/esp-pci: generate PCI interrupt from separate ESP and PCI sourcesMark Cave-Ayland1-5/+27
The am53c974/dc390 PCI interrupt has two separate sources: the first is from the internal ESP device, and the second is from the PCI DMA transfer logic. Update the ESP interrupt handler so that it sets DMA_STAT_SCSIINT rather than driving the PCI IRQ directly, and introduce a new esp_pci_update_irq() function to generate the correct PCI IRQ level. In particular this fixes spurious interrupts being generated by setting DMA_STAT_DONE at the end of a transfer if DMA_CMD_INTE_D isn't set in the DMA_CMD register. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Guenter Roeck <linux@roeck-us.net> Message-ID: <20240112131529.515642-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-01-19hw/scsi/esp-pci: use correct address register for PCI DMA transfersMark Cave-Ayland1-1/+1
The current code in esp_pci_dma_memory_rw() sets the DMA address to the value of the DMA_SPA (Starting Physical Address) register which is incorrect: this means that for each callback from the SCSI layer the DMA address is set back to the starting address. In the case where only a single SCSI callback occurs (currently for transfer lengths < 128kB) this works fine, however for larger transfers the DMA address wraps back to the initial starting address, corrupting the buffer holding the data transferred to the guest. Fix esp_pci_dma_memory_rw() to use the DMA_WAC (Working Address Counter) for the DMA address which is correctly incremented across multiple SCSI layer transfers. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Guenter Roeck <linux@roeck-us.net> Message-ID: <20240112131529.515642-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-01-19target/riscv: Rename tcg_cpu_FOO() to include 'riscv'Philippe Mathieu-Daudé1-14/+14
The tcg_cpu_FOO() names are riscv specific, so rename them as riscv_tcg_cpu_FOO() (as other names in this file) to ease navigating the code. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20240111120221.35072-6-philmd@linaro.org>
2024-01-19target/i386: Rename tcg_cpu_FOO() to include 'x86'Philippe Mathieu-Daudé1-16/+16
The tcg_cpu_FOO() names are x86 specific, so rename them as x86_tcg_cpu_FOO() (as other names in this file) to ease navigating the code. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Message-ID: <20240111120221.35072-5-philmd@linaro.org>
2024-01-19hw/s390x: Rename cpu_class_init() to include 'sclp'Philippe Mathieu-Daudé1-2/+2
cpu_class_init() is specific to s390x SCLP, so rename it as sclp_cpu_class_init() (as other names in this file) to ease navigating the code. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Eric Farman <farman@linux.ibm.com> Message-ID: <20240111120221.35072-4-philmd@linaro.org>
2024-01-19hw/core/cpu: Rename cpu_class_init() to include 'common'Philippe Mathieu-Daudé1-2/+2
cpu_class_init() is common, so rename it as cpu_common_class_init() to ease navigating the code. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20240111120221.35072-3-philmd@linaro.org>
2024-01-19accel: Rename accel_init_ops_interfaces() to include 'system'Philippe Mathieu-Daudé3-3/+3
accel_init_ops_interfaces() is system specific, so rename it as accel_system_init_ops_interfaces() to ease navigating the code. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20240111120221.35072-2-philmd@linaro.org>
2024-01-19cpus: Restrict 'start-powered-off' property to system emulationPhilippe Mathieu-Daudé1-1/+6
Since the CPUState::start-powered-off property is irrelevant to user emulation, restrict it to system emulation. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240111161817.43150-1-philmd@linaro.org>
2024-01-19system/watchpoint: Move TCG specific code to accel/tcg/Philippe Mathieu-Daudé3-124/+144
Keep system/watchpoint.c accelerator-agnostic by moving TCG specific code to accel/tcg/watchpoint.c. Update meson. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240111162032.43378-1-philmd@linaro.org>
2024-01-19system/replay: Restrict icount to system emulationPhilippe Mathieu-Daudé3-23/+9
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231208113529.74067-7-philmd@linaro.org>
2024-01-19hw/pflash: implement update buffer for block writesGerd Hoffmann3-30/+89
Add an update buffer where all block updates are staged. Flush or discard updates properly, so we should never see half-completed block writes in pflash storage. Drop a bunch of FIXME comments ;) Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240108160900.104835-4-kraxel@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-01-19hw/pflash: use ldn_{be,le}_p and stn_{be,le}_pGerd Hoffmann1-55/+8
Use the helper functions we have to read/write multi-byte values in correct byte order. Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240108160900.104835-3-kraxel@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-01-19hw/pflash: refactor pflash_data_write()Gerd Hoffmann1-14/+16
Move the offset calculation, do it once at the start of the function and let the 'p' variable point directly to the memory location which should be updated. This makes it simpler to update other buffers than pfl->storage in an upcoming patch. No functional change. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240108160900.104835-2-kraxel@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-01-19hw/i386/pc_piix: Make piix_intx_routing_notifier_xen() more device independentBernhard Beschow1-6/+3
This is a follow-up on commit 89965db43cce "hw/isa/piix3: Avoid Xen-specific variant of piix3_write_config()" which introduced piix_intx_routing_notifier_xen(). This function is implemented in board code but accesses the PCI configuration space of the PIIX ISA function to determine the PCI interrupt routes. Avoid this by reusing pci_device_route_intx_to_irq() which makes piix_intx_routing_notifier_xen() more device-agnostic. One remaining improvement would be making piix_intx_routing_notifier_xen() agnostic towards the number of PCI interrupt routes and move it to xen-hvm. This might be useful for possible Q35 Xen efforts but remains a future exercise for now. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240107231623.5282-1-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-01-19hw/block: Deprecate the TC58128 block deviceSamuel Tardieu2-1/+2
The 16MiB flash device is only used by the deprecated shix machine. Its code it old and unmaintained, and has never been adapted to the QOM architecture. It still contains debug statements and uses global variables. It is time to deprecate it. Signed-off-by: Samuel Tardieu <sam@rfc1149.net> Reviewed-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240109083053.2581588-3-sam@rfc1149.net> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-01-19target/sh4: Deprecate the shix machineSamuel Tardieu2-0/+6
The shix machine has been designed and used at Télécom Paris from 2003 to 2010. It had been added to QEMU in 2005 and has not been maintained since. Since nobody is using the physical board anymore nor interested in maintaining the QEMU port, it is time to deprecate it. Signed-off-by: Samuel Tardieu <sam@rfc1149.net> Reviewed-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240109083053.2581588-2-sam@rfc1149.net> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-01-19util/async: Only call icount_notify_exit() if icount is enabledPhilippe Mathieu-Daudé3-9/+13
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231208113529.74067-6-philmd@linaro.org>
2024-01-19target/arm: Ensure icount is enabled when emulating INST_RETIREDPhilippe Mathieu-Daudé1-0/+2
pmu_init() register its event checking the pm_event::supported() handler. For INST_RETIRED, the event is only registered and the bit enabled in the PMU Common Event Identification register when icount is enabled as ICOUNT_PRECISE. PMU events are TCG-only, hardware accelerators handle them directly. Unfortunately we register the events in non-TCG builds, leading to linking error such: ld: Undefined symbols: _icount_to_ns, referenced from: _instructions_ns_per in target_arm_helper.c.o clang: error: linker command failed with exit code 1 (use -v to see invocation) As a kludge, give a hint to the compiler by asserting the pm_event::get_count() and pm_event::ns_per_count() handler will only be called under this icount mode. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231208113529.74067-5-philmd@linaro.org>
2024-01-19system/cpu-timers: Introduce ICountMode enumeratorPhilippe Mathieu-Daudé5-19/+24
Rather than having to lookup for what the 0, 1, 2, ... icount values are, use a enum definition. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20231208113529.74067-4-philmd@linaro.org>
2024-01-19system/cpu-timers: Have icount_configure() return a booleanPhilippe Mathieu-Daudé4-12/+21
Following the example documented since commit e3fe3988d7 ("error: Document Error API usage rules"), have icount_configure() return a boolean indicating whether an error is set or not. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231208113529.74067-2-philmd@linaro.org>
2024-01-19target/alpha: Only build sys_helper.c on system emulationPhilippe Mathieu-Daudé2-5/+4
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231207105426.49339-3-philmd@linaro.org>
2024-01-19target/alpha: Extract clk_helper.c from sys_helper.cPhilippe Mathieu-Daudé3-15/+33
Except helper_load_pcc(), all helpers from sys_helper.c are system-emulation specific. In preparation of restricting sys_helper.c to system emulation, extract helper_load_pcc() to clk_helper.c. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231207105426.49339-2-philmd@linaro.org>
2024-01-19accel/tcg: Remove tb_invalidate_phys_page() from system emulationPhilippe Mathieu-Daudé2-24/+1
Since previous commit, tb_invalidate_phys_page() is not used anymore in system emulation. Make it static for user emulation and remove its public declaration in "exec/translate-all.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231130205600.35727-1-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2024-01-19accel/tcg: Remove unused tb_invalidate_phys_addr()Philippe Mathieu-Daudé2-34/+0
Commit e3f7c801f1 introduced the TCGCPUOps::debug_check_breakpoint() handler, and commit 10c37828b2 "moved breakpoint recognition outside of translation", so "we no longer need to flush any TBs when changing BPs". The last target using tb_invalidate_phys_addr() was converted to the debug_check_breakpoint(), so this function is now unused. Remove it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231130203241.31099-1-philmd@linaro.org>
2024-01-19tests/tcg/xtensa: add icount/ibreak priority testMax Filippov1-1/+24
When icount and ibreak exceptions are due to happen on the same address icount has higher precedence. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20231130171920.3798954-3-jcmvbkbc@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-01-19target/xtensa: use generic instruction breakpoint infrastructureMax Filippov5-33/+47
Don't embed ibreak exception generation into TB and don't invalidate TB on ibreak address change. Add CPUBreakpoint pointers to xtensa CPUArchState, use cpu_breakpoint_insert/cpu_breakpoint_remove_by_ref to manage ibreak breakpoints and provide TCGCPUOps::debug_check_breakpoint callback that recognizes valid instruction breakpoints. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20231130171920.3798954-2-jcmvbkbc@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-01-19accel: Do not set CPUState::can_do_io in non-TCG accelsPhilippe Mathieu-Daudé3-3/+0
'can_do_io' is specific to TCG. It was added to other accelerators in 626cf8f4c6 ("icount: set can_do_io outside TB execution"), then likely copy/pasted in commit c97d6d2cdf ("i386: hvf: add code base from Google's QEMU repository"). Having it set in non-TCG code is confusing, so remove it from QTest / HVF / KVM. Fixes: 626cf8f4c6 ("icount: set can_do_io outside TB execution") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231129205037.16849-1-philmd@linaro.org>
2024-01-19accel: Do not set CPUState::tcg_cflags in non-TCG accelsPhilippe Mathieu-Daudé2-2/+2
'tcg_cflags' is specific to TCG. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231130075958.21285-1-philmd@linaro.org>
2024-01-19backends/cryptodev: Do not ignore throttle/backends ErrorsPhilippe Mathieu-Daudé1-0/+10
Both cryptodev_backend_set_throttle() and CryptoDevBackendClass::init() can set their Error** argument. Do not ignore them, return early on failure. Without that, running into another failure trips error_setv()'s assertion. Use the ERRP_GUARD() macro as suggested in commit ae7c80a7bd ("error: New macro ERRP_GUARD()"). Cc: qemu-stable@nongnu.org Fixes: e7a775fd9f ("cryptodev: Account statistics") Fixes: 2580b452ff ("cryptodev: support QoS") Reviewed-by: zhenwei pi <pizhenwei@bytedance.com> Reviewed-by: Gonglei <arei.gonglei@huawei.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231120150418.93443-1-philmd@linaro.org>
2024-01-19hw/timer/hpet: Convert DPRINTF to trace eventsDaniel Hoffman2-33/+37
This conversion is pretty straight-forward. Standardized some formatting so the +0 and +4 offset cases can recycle the same message. Signed-off-by: Daniel Hoffman <dhoff749@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231118231129.2840388-1-dhoff749@gmail.com> [PMD: Fixed few string formats] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-01-19tests/vm/netbsd: Remove missing py311-expat packagePhilippe Mathieu-Daudé1-1/+0
Since the pkgsrc-2023Q3 release [*], the py-expat package has been merged into the base 'python' package: - Several packages have been folded into base packages. While the result is simpler, those updating may need to force-remove the secondary packages, depending on the update method. When doing make replace, one has to pkg_delete -f the secondary packages. pkgin handles at least the python packages correctly, removing the split package when updating python. Specific packages and the former packages now included: * cairo: cairo-gobject * python: py-cElementTree py-curses py-cursespanel py-expat py-readline py-sqlite3 Remove py311-expat from the package list in order to avoid: ### Installing packages ... processing remote summary (http://cdn.NetBSD.org/pub/pkgsrc/packages/NetBSD/amd64/9.3/All)... database for http://cdn.NetBSD.org/pub/pkgsrc/packages/NetBSD/amd64/9.3/All is up-to-date py311-expat is not available in the repository ... calculating dependencies.../py311-expat is not available in the repository pkg_install error log can be found in /var/db/pkgin/pkg_install-err.log [*] https://mail-index.netbsd.org/netbsd-announce/2024/01/01/msg000360.html Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2109 Tested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240117140746.23511-1-philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-01-19cli: Remove deprecated '-singlestep' command line optionPhilippe Mathieu-Daudé7-52/+20
This option has been deprecated before the 8.1 release, in commit 12fd0f41d0 ("Document that -singlestep command line option is deprecated"). Time to drop it. Inspired-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20240117151430.29235-4-philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-01-19hmp: Remove deprecated 'singlestep' commandPhilippe Mathieu-Daudé4-23/+6
This command has been deprecated before the 8.1 release, in commit e9ccfdd91d ("hmp: Add 'one-insn-per-tb' command equivalent to 'singlestep'"). Time to drop it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: "Dr. David Alan Gilbert" <dave@treblig.org> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20240117151430.29235-3-philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-01-19qapi: Remove deprecated 'singlestep' member of StatusInfoPhilippe Mathieu-Daudé7-42/+9
This member has been deprecated before the 8.1 release, in commit 34c18203d4 ("qmp: Deprecate 'singlestep' member of StatusInfo"). Time to drop it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20240117151430.29235-2-philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-01-19qemu-options: Remove the deprecated -chroot optionThomas Huth4-22/+5
It's been marked as deprecated since QEMU 8.1, so it should be fine to remove this now. Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20240118103759.130748-5-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-01-19qemu-options: Remove the deprecated -async-teardown optionThomas Huth4-21/+5
It's been marked as deprecated since QEMU 8.1 (and was only available since QEMU 8.0 anyway), so it should be fine to remove this now. Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20240118103759.130748-4-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-01-19qemu-options: Remove the deprecated -no-acpi optionThomas Huth6-23/+9
It's been marked as deprecated since QEMU 8.0, so it should be fine to remove this now. Message-ID: <20240118103759.130748-3-thuth@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-01-19qemu-options: Remove the deprecated -no-hpet optionThomas Huth4-17/+8
It's been marked as deprecated since QEMU 8.0, so it should be fine to remove this now. Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20240118103759.130748-2-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-01-19s390x/pci: drive ISM reset from subsystem resetMatthew Rosato3-9/+26
ISM devices are sensitive to manipulation of the IOMMU, so the ISM device needs to be reset before the vfio-pci device is reset (triggering a full UNMAP). In order to ensure this occurs, trigger ISM device resets from subsystem_reset before triggering the PCI bus reset (which will also trigger vfio-pci reset). This only needs to be done for ISM devices which were enabled for use by the guest. Further, ensure that AIF is disabled as part of the reset event. Fixes: ef1535901a ("s390x: do a subsystem reset before the unprotect on reboot") Fixes: 03451953c7 ("s390x/pci: reset ISM passthrough devices on shutdown and system reset") Reported-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Matthew Rosato <mjrosato@linux.ibm.com> Message-ID: <20240118185151.265329-4-mjrosato@linux.ibm.com> Reviewed-by: Eric Farman <farman@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-01-19s390x/pci: refresh fh before disabling aifMatthew Rosato1-0/+9
Typically we refresh the host fh during CLP enable, however it's possible that the device goes through multiple reset events before the guest performs another CLP enable. Let's handle this for now by refreshing the host handle from vfio before disabling aif. Fixes: 03451953c7 ("s390x/pci: reset ISM passthrough devices on shutdown and system reset") Reported-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Eric Farman <farman@linux.ibm.com> Signed-off-by: Matthew Rosato <mjrosato@linux.ibm.com> Message-ID: <20240118185151.265329-3-mjrosato@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>