| Commit message (Expand) | Author | Files | Lines |
|---|
| 2025-07-21 | accel/hvf: Display executable bit as 'X' | Philippe Mathieu-Daudé | 1 | -1/+1 |
| 2025-07-21 | crypto: load all certificates in X509 CA file | Henry Kleynhans | 1 | -12/+11 |
| 2025-07-21 | hvf: arm: Emulate ICC_RPR_EL1 accesses properly | Zenghui Yu | 1 | -0/+2 |
| 2025-07-21 | hvf: arm: Add permission check in GIC sysreg handlers | Zenghui Yu | 1 | -0/+6 |
| 2025-07-21 | target/arm: Make LD1Q decode and trans fn agree about a->u | Peter Maydell | 1 | -1/+1 |
| 2025-07-21 | target/arm: Honour FPCR.AH=1 default NaN value in FMAXNMQV, FMINNMQV | Peter Maydell | 1 | -12/+17 |
| 2025-07-21 | target/arm: Don't nest H() macro calls in SVE DO_REDUCE | Peter Maydell | 1 | -1/+1 |
| 2025-07-21 | target/arm: Correct sense of FPCR.AH test for FMAXQV and FMINQV | Peter Maydell | 1 | -2/+2 |
| 2025-07-21 | target/arm: Add BFMLA, BFMLS (indexed) | Peter Maydell | 2 | -9/+18 |
| 2025-07-21 | target/arm: Add BFMLA, BFMLS (vectors) | Peter Maydell | 3 | -6/+98 |
| 2025-07-21 | target/arm: Add BFMUL (indexed) | Peter Maydell | 4 | -1/+5 |
| 2025-07-21 | target/arm: Add BFMIN, BFMAX (predicated) | Peter Maydell | 3 | -2/+27 |
| 2025-07-21 | target/arm: Add BFADD, BFSUB, BFMUL, BFMAXNM, BFMINNM (predicated) | Peter Maydell | 3 | -5/+32 |
| 2025-07-21 | target/arm: Add BFADD, BFSUB, BFMUL (unpredicated) | Peter Maydell | 3 | -1/+11 |
| 2025-07-21 | docs: Fix Aspeed title | Cédric Le Goater | 1 | -0/+1 |
| 2025-07-21 | hw/misc/max78000_aes: Comment Internal Key Storage | Jackson Donaldson | 1 | -0/+6 |
| 2025-07-21 | host-utils: Drop workaround for buggy Apple Clang __builtin_subcll() | Peter Maydell | 2 | -14/+1 |
| 2025-07-21 | target/arm: Provide always-false kvm_arm_*_supported() stubs for usermode | Peter Maydell | 1 | -0/+35 |
| 2025-07-21 | hw/misc/ivshmem-pci: Improve error handling | Peter Maydell | 1 | -1/+8 |
| 2025-07-21 | target/arm: Correct encoding of Debug Communications Channel registers | Peter Maydell | 1 | -2/+11 |
| 2025-07-21 | hvf: arm: Remove $pc from trace_hvf_data_abort() | Zenghui Yu | 2 | -2/+2 |
| 2025-07-21 | ppc/xive2: Enable lower level contexts on VP push | Nicholas Piggin | 1 | -8/+28 |
| 2025-07-21 | ppc/xive: Split need_resend into restore_nvp | Nicholas Piggin | 2 | -24/+28 |
| 2025-07-21 | ppc/xive2: Implement PHYS ring VP push TIMA op | Nicholas Piggin | 3 | -0/+15 |
| 2025-07-21 | ppc/xive2: Implement POOL LGS push TIMA op | Nicholas Piggin | 1 | -0/+8 |
| 2025-07-21 | ppc/xive2: Implement set_os_pending TIMA op | Nicholas Piggin | 3 | -0/+32 |
| 2025-07-21 | ppc/xive2: redistribute group interrupts on context push | Nicholas Piggin | 1 | -1/+7 |
| 2025-07-21 | ppc/xive2: Implement pool context push TIMA op | Nicholas Piggin | 3 | -17/+39 |
| 2025-07-21 | ppc/xive: Check TIMA operations validity | Nicholas Piggin | 2 | -81/+116 |
| 2025-07-21 | ppc/xive: Redistribute phys after pulling of pool context | Nicholas Piggin | 2 | -2/+17 |
| 2025-07-21 | ppc/xive2: Prevent pulling of pool context losing phys interrupt | Nicholas Piggin | 1 | -8/+10 |
| 2025-07-21 | ppc/xive2: implement NVP context save restore for POOL ring | Nicholas Piggin | 2 | -16/+36 |
| 2025-07-21 | ppc/xive: Assert group interrupts were redistributed | Nicholas Piggin | 2 | -0/+3 |
| 2025-07-21 | ppc/xive2: Avoid needless interrupt re-check on CPPR set | Nicholas Piggin | 1 | -1/+3 |
| 2025-07-21 | ppc/xive2: Consolidate presentation processing in context push | Nicholas Piggin | 1 | -32/+10 |
| 2025-07-21 | ppc/xive2: split tctx presentation processing from set CPPR | Nicholas Piggin | 1 | -61/+76 |
| 2025-07-21 | ppc/xive: Add xive_tctx_pipr_set() helper function | Nicholas Piggin | 3 | -40/+20 |
| 2025-07-21 | ppc/xive: tctx_accept only lower irq line if an interrupt was presented | Nicholas Piggin | 1 | -2/+1 |
| 2025-07-21 | ppc/xive: tctx signaling registers rework | Nicholas Piggin | 3 | -106/+126 |
| 2025-07-21 | ppc/xive: Split xive recompute from IPB function | Nicholas Piggin | 1 | -3/+22 |
| 2025-07-21 | ppc/xive: Fix high prio group interrupt being preempted by low prio VP | Nicholas Piggin | 1 | -1/+17 |
| 2025-07-21 | ppc/xive: Add xive_tctx_pipr_present() to present new interrupt | Nicholas Piggin | 3 | -2/+10 |
| 2025-07-21 | ppc/xive2: Redistribute group interrupt preempted by higher priority interrupt | Nicholas Piggin | 1 | -2/+12 |
| 2025-07-21 | ppc/xive: Change presenter .match_nvt to match not present | Nicholas Piggin | 8 | -131/+97 |
| 2025-07-21 | ppc/xive2: redistribute irqs for pool and phys ctx pull | Glenn Miles | 4 | -35/+79 |
| 2025-07-21 | ppc/xive2: Redistribute group interrupt precluded by CPPR update | Glenn Miles | 1 | -22/+60 |
| 2025-07-21 | ppc/xive2: Implement "Ack OS IRQ to even report line" TIMA op | Glenn Miles | 4 | -4/+58 |
| 2025-07-21 | ppc/xive2: Improve pool regs variable name | Glenn Miles | 1 | -6/+5 |
| 2025-07-21 | ppc/xive: Add more interrupt notification tracing | Glenn Miles | 3 | -5/+17 |
| 2025-07-21 | ppc/xive2: Support redistribution of group interrupts | Glenn Miles | 2 | -4/+83 |