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* tcg: Merge INDEX_op_mulsh_{i32,i64}Richard Henderson2025-04-281-4/+4
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Convert mulsh to TCGOutOpBinaryRichard Henderson2025-04-281-2/+2
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Merge INDEX_op_muluh_{i32,i64}Richard Henderson2025-04-281-5/+5
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Convert muluh to TCGOutOpBinaryRichard Henderson2025-04-281-3/+4
| | | | | | | | Remove unreachable mul[su]h_i32 leftovers from commit aeb6326ec5e ("tcg/riscv: Require TCG_TARGET_REG_BITS == 64"). Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Merge INDEX_op_mul_{i32,i64}Richard Henderson2025-04-281-6/+6
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Merge INDEX_op_not_{i32,i64}Richard Henderson2025-04-281-8/+8
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Convert not to TCGOutOpUnaryRichard Henderson2025-04-281-4/+6
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Merge INDEX_op_neg_{i32,i64}Richard Henderson2025-04-281-2/+2
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Merge INDEX_op_sub_{i32,i64}Richard Henderson2025-04-281-2/+2
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Merge INDEX_op_nor_{i32,i64}Richard Henderson2025-04-281-4/+4
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Convert nor to TCGOutOpBinaryRichard Henderson2025-04-281-2/+2
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Merge INDEX_op_nand_{i32,i64}Richard Henderson2025-04-281-4/+4
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Convert nand to TCGOutOpBinaryRichard Henderson2025-04-281-2/+2
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Merge INDEX_op_eqv_{i32,i64}Richard Henderson2025-04-281-4/+4
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Convert eqv to TCGOutOpBinaryRichard Henderson2025-04-281-2/+2
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Merge INDEX_op_xor_{i32,i64}Richard Henderson2025-04-281-2/+2
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Merge INDEX_op_orc_{i32,i64}Richard Henderson2025-04-281-4/+4
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Convert orc to TCGOutOpBinaryRichard Henderson2025-04-281-2/+2
| | | | | | | | At the same time, drop all backend support for immediate operands, as we now transform orc to or during optimize. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Merge INDEX_op_or_{i32,i64}Richard Henderson2025-04-281-2/+2
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Merge INDEX_op_andc_{i32,i64}Richard Henderson2025-04-281-4/+4
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Convert andc to TCGOutOpBinaryRichard Henderson2025-04-281-2/+2
| | | | | | | | At the same time, drop all backend support for immediate operands, as we now transform andc to and during optimize. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Merge INDEX_op_and_{i32,i64}Richard Henderson2025-04-281-2/+2
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Merge INDEX_op_add_{i32,i64}Richard Henderson2025-04-281-2/+2
| | | | | | | Rely on TCGOP_TYPE instead of opcodes specific to each type. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Merge INDEX_op_mov_{i32,i64}Richard Henderson2025-04-281-2/+2
| | | | | | | | | Begin to rely on TCGOp.type to discriminate operations, rather than two different opcodes. Convert mov first. Introduce TCG_OPF_INT in order to keep opcode dumps the same. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Remove INDEX_op_ext{8,16,32}*Richard Henderson2025-04-281-321/+93
| | | | | | | Use the fully general extract opcodes instead. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Use extract2 for cross-word 64-bit extract on 32-bit hostRichard Henderson2025-04-281-4/+12
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Remove TCG_TARGET_HAS_deposit_{i32,i64}Richard Henderson2025-01-161-11/+11
| | | | | | | | | Make deposit "unconditional" in the sense that the opcode is always present. Rely instead on TCG_TARGET_deposit_valid, now always defined. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg/i386: Fold the ext{8,16,32}[us] cases into {s}extractRichard Henderson2025-01-161-8/+4
| | | | | | | | Accept byte and word extensions with the extract opcodes. This is preparatory to removing the specialized extracts. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Only include 'tcg-has.h' when necessaryRichard Henderson2025-01-161-1/+1
| | | | | | | | | TCG_TARGET_HAS_* definitions don't need to be exposed by "tcg/tcg.h". Only include 'tcg-has.h' when necessary. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250108215156.8731-15-philmd@linaro.org>
* tcg: Replace TCGOP_VECL with TCGOP_TYPERichard Henderson2025-01-161-50/+63
| | | | | | | | | In the replacement, drop the TCGType - TCG_TYPE_V64 adjustment, except for the call to tcg_out_vec_op. Pass type to tcg_gen_op[1-6], so that all integer opcodes gain the type. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Propagate new TCGOp to add_as_label_useRichard Henderson2024-09-221-31/+32
| | | | | | | | | | | | | The use of tcg_last_op does not interact well with TCGContext.emit_before_op, resulting in the label being linked to something other than the branch op. In this case it is easier to simply collect the emitted branch op and pass it directly to add_as_label_use. Reported-by: Elisha Hollander <just4now666666@gmail.com> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Return TCGOp from tcg_gen_op[1-6]Richard Henderson2024-09-221-8/+15
| | | | | | | | TCGOp to be propagated further in the next patch. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Remove INDEX_op_plugin_cb_{start,end}Richard Henderson2024-04-301-10/+0
| | | | | | | These opcodes are no longer used. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* plugins: Use emit_before_op for PLUGIN_GEN_FROM_MEMRichard Henderson2024-04-301-0/+5
| | | | | | | | | Introduce a new plugin_mem_cb op to hold the address temp and meminfo computed by tcg-op-ldst.c. Because this now has its own opcode, we no longer need PLUGIN_GEN_FROM_MEM. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* plugins: Use emit_before_op for PLUGIN_GEN_AFTER_INSNRichard Henderson2024-04-301-0/+5
| | | | | | | | | | Introduce a new plugin_cb op and migrate one operation. By using emit_before_op, we do not need to emit opcodes early and modify them later -- we can simply emit the final set of opcodes once. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Canonicalize subi to addi during opcode generationRichard Henderson2023-11-061-16/+2
| | | | | | | Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231026013945.1152174-2-richard.henderson@linaro.org>
* tcg: Remove TCG_TARGET_HAS_neg_{i32,i64}Richard Henderson2023-11-061-13/+9
| | | | | | | The movcond opcode is now mandatory for backends to implement. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231026041404.1229328-7-richard.henderson@linaro.org>
* tcg: Remove TCG_TARGET_HAS_movcond_{i32,i64}Richard Henderson2023-11-061-40/+10
| | | | | | | The movcond opcode is now mandatory for backends to implement. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231026041404.1229328-4-richard.henderson@linaro.org>
* tcg: Unexport tcg_gen_op*_{i32,i64}Richard Henderson2023-11-061-79/+52
| | | | | | | | These functions are no longer used outside tcg-op.c. There are several that are completely unused, so remove them. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231029210848.78234-9-richard.henderson@linaro.org>
* tcg: Move 64-bit expanders out of lineRichard Henderson2023-11-061-67/+164
| | | | | | | | This one is more complicated, combining 32-bit and 64-bit expansion with C if instead of preprocessor #if. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231029210848.78234-6-richard.henderson@linaro.org>
* tcg: Move 32-bit expanders out of lineRichard Henderson2023-11-061-0/+116
| | | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231029210848.78234-5-richard.henderson@linaro.org>
* tcg: Move generic expanders out of lineRichard Henderson2023-11-061-0/+16
| | | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231029210848.78234-4-richard.henderson@linaro.org>
* tcg: Move tcg_gen_op* out of lineRichard Henderson2023-11-061-0/+208
| | | | | | | | In addition to moving out of line, with CONFIG_DEBUG_TCG mark them all noinline. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231029210848.78234-3-richard.henderson@linaro.org>
* tcg: Mark tcg_gen_op* as noinlineRichard Henderson2023-11-061-8/+14
| | | | | | | | Encourage the compiler to tail-call rather than inline across the dozens of opcode expanders. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231029210848.78234-2-richard.henderson@linaro.org>
* tcg: add negsetcondiPaolo Bonzini2023-10-221-0/+12
| | | | | | | | | This can be useful to write a shift bit extraction that does not depend on TARGET_LONG_BITS. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20231019104648.389942-15-pbonzini@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Add tcg_gen_{ld,st}_i128Richard Henderson2023-10-221-0/+22
| | | | | | | | | | Do not require the translators to jump through concat and extract of i64 in order to move values to and from env. Tested-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Use constant zero when expanding with divu2Richard Henderson2023-10-221-8/+8
| | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Rename cpu_env to tcg_envRichard Henderson2023-10-031-1/+1
| | | | | | | Allow the name 'cpu_env' to be used for something else. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg/tcg-op: Document wswap_i64() byte patternPhilippe Mathieu-Daudé2023-08-241-0/+5
| | | | | | | | | | Document wswap_i64(), added in commit 46be8425ff ("tcg: Implement tcg_gen_{h,w}swap_{i32,i64}"). Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230823145542.79633-8-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg/tcg-op: Document hswap_i32/64() byte patternPhilippe Mathieu-Daudé2023-08-241-7/+18
| | | | | | | | | | Document hswap_i32() and hswap_i64(), added in commit 46be8425ff ("tcg: Implement tcg_gen_{h,w}swap_{i32,i64}"). Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230823145542.79633-7-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>