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2025-01-30virtio-mem-pci: Allow setting nvectors, so we can use MSI-XDavid Hildenbrand2-0/+13
Let's do it similar as virtio-balloon-pci. With this change, we can use virtio-mem-pci on s390x, although plugging will still fail until properly wired up in the machine. No need to worry about transitional/non_transitional devices, because they don't exist for virtio-mem. Signed-off-by: David Hildenbrand <david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20250128185705.1609038-2-david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-01-30virtio-balloon-pci: Allow setting nvectors, so we can use MSI-XReza Arbab2-0/+15
Most virtio-pci devices allow MSI-X. Add it to virtio-balloon-pci, but only enable it in new machine types, so we don't break migration of existing machine types between different qemu versions. This copies what was done for virtio-rng-pci in: 9ea02e8f1306 ("virtio-rng-pci: Allow setting nvectors, so we can use MSI-X") bad9c5a5166f ("virtio-rng-pci: fix migration compat for vectors") 62bdb8871512 ("virtio-rng-pci: fix transitional migration compat for vectors") Acked-by: David Hildenbrand <david@redhat.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Tested-by: Mario Casquero <mcasquer@redhat.com> Message-ID: <20250115161425.246348-1-arbab@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-01-30hw/s390x/s390-virtio-ccw: Fix a record/replay deadlockIlya Leoshkevich1-1/+23
Booting an s390x VM in record/replay mode hangs due to a deadlock between rr_cpu_thread_fn() and s390_machine_reset(). The former needs the record/replay mutex held by the latter, and the latter waits until the former completes its run_on_cpu() request. Fix by temporarily dropping the record/replay mutex, like it's done in pause_all_vcpus(). Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-ID: <20250124112625.23050-1-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-01-30tests/tcg/s390x: Test modifying code using the MVC instructionIlya Leoshkevich2-0/+83
Add a small test to prevent regressions. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250128001338.11474-2-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-01-30target/s390x: Fix MVC not always invalidating translation blocksIlya Leoshkevich1-1/+1
Node.js crashes in qemu-system-s390x with random SIGSEGVs / SIGILLs. The v8 JIT used by Node.js can garbage collect and overwrite unused code. Overwriting is performed by WritableJitAllocation::CopyCode(), which ultimately calls memcpy(). For certain sizes, memcpy() uses the MVC instruction. QEMU implements MVC and other similar instructions using helpers. While TCG store ops invalidate affected translation blocks automatically, helpers must do this manually by calling probe_access_flags(). The MVC helper does this using the access_prepare() -> access_prepare_nf() -> s390_probe_access() -> probe_access_flags() call chain. At the last step of this chain, the store size is replaced with 0. This causes the probe_access_flags() -> notdirty_write() -> tb_invalidate_phys_range_fast() chain to miss some translation blocks. When this happens, QEMU executes a mix of old and new code. This quickly leads to either a SIGSEGV or a SIGILL in case the old code ends in the middle of a new instruction. Fix by passing the true size. Reported-by: Berthold Gunreben <azouhr@opensuse.org> Cc: Sarah Kriesch <ada.lovelace@gmx.de> Cc: qemu-stable@nongnu.org Closes: https://bugzilla.opensuse.org/show_bug.cgi?id=1235709 Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Fixes: e2faabee78ff ("accel/tcg: Forward probe size on to notdirty_write") Message-ID: <20250128001338.11474-1-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-01-30target/s390x: Fix PPNO execution with icountIlya Leoshkevich1-1/+1
Executing PERFORM RANDOM NUMBER OPERATION makes QEMU exit with "Bad icount read" when using record/replay. This is caused by icount_get_raw_locked() if the current instruction is not the last one in the respective translation block. For the x86_64's rdrand this is resolved by calling translator_io_start(). On s390x one uses IF_IO in order to make this call happen automatically. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250123123808.194405-1-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-01-30tests/functional/test_mips_malta: Fix comment about endianness of the testThomas Huth1-1/+1
This test is for the big endian MIPS target, not for the little endian target. Fixes: 79cb4a14cb6 ("tests/functional: Convert mips32eb 4Kc Malta tests") Message-ID: <20250127184112.108122-1-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-01-30tests/functional: Add a ppc64 mac99 testCédric Le Goater3-0/+47
The test sequence boots from disk a mac99 machine in 64-bit mode, in which case the CPU is a PPC 970. The buildroot rootfs is built with config : BR2_powerpc64=y BR2_powerpc_970=y and the kernel with the g5 deconfig. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Cédric Le Goater <clg@redhat.com> Message-ID: <20250128212145.1186617-1-clg@redhat.com> [thuth: Adjusted the comment about '-nographic] Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-01-30tests/functional: Fix the aarch64_tcg_plugins testThomas Huth2-6/+10
Unfortunately, this test had not been added to meson.build, so we did not notice a regression: Looking for 'Kernel panic - not syncing: VFS:' as the indication for the final boot state of the kernel was a bad idea since 'Kernel panic - not syncing' is the default failure message of the LinuxKernelTest class, and since we're now reading the console input byte by byte instead of linewise (see commit cdad03b74f75), the failure now triggers before we fully read the success string. Let's fix this by simply looking for the previous line in the console output instead. Also, replace the call to cancel() - this was only available in the Avocado framework. In the functional framework, we must use skipTest() instead. While we're at it, also fix the TODO here by looking for the exact error and only skip the test if the plugins are not available. Fixes: 3abc545e66 ("tests/functional: Convert the tcg_plugins test") Fixes: cdad03b74f ("tests/functional: rewrite console handling to be bytewise") Message-ID: <20250123083625.1498495-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-01-30tests/functional: Convert the migration avocado testThomas Huth4-135/+133
Now that we've got a find_free_port() function in the functional test framework, we can convert the migration test, too. While the original avocado test was only meant to run on aarch64, ppc64 and x86, we can turn this into a more generic test by now and run it on all architectures that have a machine which ships with a working firmware. To avoid overlapping with the migration qtest, we now also test migration on machines that are not covered by the migration qtest yet. Acked-by: Fabiano Rosas <farosas@suse.de> Message-ID: <20250103074308.463860-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-01-30tests/functional: Fix broken decorators with lamda functionsThomas Huth1-23/+21
The decorators that use a lambda function are currently broken and do not properly skip the test if the condition is not met. Using "return skipUnless(lambda: ...)" does not work as expected. To fix it, rewrite the decorators without lambda, it's simpler that way anyway. Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250122134315.1448794-3-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-01-30tests/functional/qemu_test/decorators: Fix bad check for importsThomas Huth1-1/+2
skipIfMissingImports should use importlib.import_module() for checking whether a module with the name stored in the "impname" variable is available or not, otherwise the code tries to import a module with the name "impname" instead. (This bug hasn't been noticed before since there is another issue with this decorator that will be fixed by the next patch) Suggested-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250122134315.1448794-2-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-01-29gitlab-ci: include full Rust backtraces in test runsPaolo Bonzini1-0/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-01-28hw/usb/canokey: Fix buffer overflow for OUT packetHongren Zheng2-7/+3
When USBPacket in OUT direction has larger payload than the ep_out_buffer (of size 512), a buffer overflow would occur. It could be fixed by limiting the size of usb_packet_copy to be at most buffer size. Further optimization gets rid of the ep_out_buffer and directly uses ep_out as the target buffer. This is reported by a security researcher who artificially constructed an OUT packet of size 2047. The report has gone through the QEMU security process, and as this device is for testing purpose and no deployment of it in virtualization environment is observed, it is triaged not to be a security bug. Cc: qemu-stable@nongnu.org Fixes: d7d34918551dc48 ("hw/usb: Add CanoKey Implementation") Reported-by: Juan Jose Lopez Jaimez <thatjiaozi@gmail.com> Signed-off-by: Hongren Zheng <i@zenithal.me> Message-id: Z4TfMOrZz6IQYl_h@Sun Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-01-28target/arm: Use FPST_A64_F16 for halfprec-to-other conversionsPeter Maydell2-5/+8
We should be using the F16-specific float_status for conversions from half-precision, because halfprec inputs never set Input Denormal. Without FEAT_AHP, using the wrong fpst here had no effect, because the only difference between the A64_F16 and A64 fpst is its handling of flush-to-zero on input and output, and the helper functions vfp_fcvt_f16_to_* and vfp_fcvt_*_to_f16 all explicitly squash the relevant flushing flags, and flush_inputs_to_zero was the only way that IDC could be set. With FEAT_AHP, the FPCR.AH=1 behaviour sets IDC for input_denormal_used, which we will only ignore in vfp_get_fpsr_from_host() for the A64_F16 fpst; so it matters that we use that one for f16 inputs (and the normal one for single/double to f16 conversions). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250124162836.2332150-27-peter.maydell@linaro.org
2025-01-28target/arm: Remove redundant advsimd float16 helpersPeter Maydell3-25/+8
The advsimd_addh etc helpers defined in helper-a64.c are identical to the vfp_addh etc helpers defined in helper-vfp.c: both take two float16 inputs (in a uint32_t type) plus a float_status* and are simple wrappers around the softfloat float16_* functions. (The duplication seems to be a historical accident: we added the advsimd helpers in 2018 as part of the A64 implementation, and at that time there was no f16 emulation in A32. Then later we added the A32 f16 handling by extending the existing VFP helper macros to generate f16 versions as well as f32 and f64, and didn't realise we could clean things up.) Remove the now-unnecessary advsimd helpers and make the places that generated calls to them use the vfp helpers instead. Many of the helper functions were already unused. (The remaining advsimd_ helpers are those which don't have vfp versions.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250124162836.2332150-26-peter.maydell@linaro.org
2025-01-28fpu: Fix a comment in softfloat-types.hPeter Maydell1-1/+1
In softfloat-types.h a comment documents that if the float_status field flush_to_zero is set then we flush denormalised results to 0 and set the inexact flag. This isn't correct: the status flag that we set when flush_to_zero causes us to flush an output to zero is float_flag_output_denormal_flushed. Correct the comment. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250124162836.2332150-22-peter.maydell@linaro.org
2025-01-28fpu: Rename float_flag_output_denormal to float_flag_output_denormal_flushedPeter Maydell9-11/+12
Our float_flag_output_denormal exception flag is set when the fpu code flushes an output denormal to zero. Rename it to float_flag_output_denormal_flushed: * this keeps it parallel with the flag for flushing input denormals, which we just renamed * it makes it clearer that it doesn't mean "set when the output is a denormal" Commit created with for f in `git grep -l float_flag_output_denormal`; do sed -i -e 's/float_flag_output_denormal/float_flag_output_denormal_flushed/' $f; done Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250124162836.2332150-21-peter.maydell@linaro.org
2025-01-28fpu: Rename float_flag_input_denormal to float_flag_input_denormal_flushedPeter Maydell8-18/+19
Our float_flag_input_denormal exception flag is set when the fpu code flushes an input denormal to zero. This is what many guest architectures (eg classic Arm behaviour) require, but it is not the only donarmal-related reason we might want to set an exception flag. The x86 behaviour (which we do not currently model correctly) wants to see an exception flag when a denormal input is *not* flushed to zero and is actually used in an arithmetic operation. Arm's FEAT_AFP also wants these semantics. Rename float_flag_input_denormal to float_flag_input_denormal_flushed to make it clearer when it is set and to allow us to add a new float_flag_input_denormal_used next to it for the x86/FEAT_AFP semantics. Commit created with for f in `git grep -l float_flag_input_denormal`; do sed -i -e 's/float_flag_input_denormal/float_flag_input_denormal_flushed/' $f; done and manual editing of softfloat-types.h and softfloat.c to clean up the indentation afterwards and to fix a comment which wasn't using the full name of the flag. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250124162836.2332150-20-peter.maydell@linaro.org
2025-01-28target/arm: Remove now-unused vfp.fp_status_f16 and FPST_FPCR_F16Peter Maydell4-16/+0
Now we have moved all the uses of vfp.fp_status_f16 and FPST_FPCR_F16 to the new A32 or A64 fields, we can remove these. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250124162836.2332150-19-peter.maydell@linaro.org
2025-01-28target/arm: Use FPST_A64_F16 in A64 decoderPeter Maydell2-49/+49
In the A32 decoder, use FPST_A64_F16 rather than FPST_FPCR_F16. By doing an automated conversion of the whole file we avoid possibly using more than one fpst value in a set_rmode/op/restore_rmode sequence. Patch created with perl -p -i -e 's/FPST_FPCR_F16(?!_)/FPST_A64_F16/g' target/arm/tcg/translate-{a64,sve,sme}.c Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250124162836.2332150-18-peter.maydell@linaro.org
2025-01-28target/arm: Use FPST_A32_F16 in A32 decoderPeter Maydell1-12/+12
In the A32 decoder, use FPST_A32_F16 rather than FPST_FPCR_F16. By doing an automated conversion of the whole file we avoid possibly using more than one fpst value in a set_rmode/op/restore_rmode sequence. Patch created with perl -p -i -e 's/FPST_FPCR_F16(?!_)/FPST_A32_F16/g' target/arm/tcg/translate-vfp.c Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250124162836.2332150-17-peter.maydell@linaro.org
2025-01-28target/arm: Use fp_status_f16_a64 in AArch64-only helpersPeter Maydell2-6/+6
We directly use fp_status_f16 in a handful of helpers that are AArch64-specific; switch to fp_status_f16_a64 for these. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250124162836.2332150-16-peter.maydell@linaro.org
2025-01-28target/arm: Use fp_status_f16_a32 in AArch32-only helpersPeter Maydell2-3/+3
We directly use fp_status_f16 in a handful of helpers that are AArch32-specific; switch to fp_status_f16_a32 for these. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250124162836.2332150-15-peter.maydell@linaro.org
2025-01-28target/arm: Define new fp_status_f16_a32 and fp_status_f16_a64Peter Maydell4-0/+32
As the first part of splitting the existing fp_status_f16 into separate float_status fields for AArch32 and AArch64 (so that we can make FEAT_AFP control bits apply only for AArch64), define the two new fp_status_f16_a32 and fp_status_f16_a64 fields, but don't use them yet. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250124162836.2332150-14-peter.maydell@linaro.org
2025-01-28target/arm: Remove now-unused vfp.fp_status and FPST_FPCRPeter Maydell4-16/+1
Now we have moved all the uses of vfp.fp_status and FPST_FPCR to either the A32 or A64 fields, we can remove these. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250124162836.2332150-13-peter.maydell@linaro.org
2025-01-28target/arm: Use FPST_A64 in A64 decoderPeter Maydell3-90/+90
In the A64 decoder, use FPST_A64 rather than FPST_FPCR. By doing an automated conversion of the whole file we avoid possibly using more than one fpst value in a set_rmode/op/restore_rmode sequence. Patch created with perl -p -i -e 's/FPST_FPCR(?!_)/FPST_A64/g' target/arm/tcg/translate-{a64,sve,sme}.c Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250124162836.2332150-12-peter.maydell@linaro.org
2025-01-28target/arm: Use FPST_A32 in A32 decoderPeter Maydell1-27/+27
In the A32 decoder, use FPST_A32 rather than FPST_FPCR. By doing an automated conversion of the whole file we avoid possibly using more than one fpst value in a set_rmode/op/restore_rmode sequence. Patch created with perl -p -i -e 's/FPST_FPCR(?!_)/FPST_A32/g' target/arm/tcg/translate-vfp.c Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250124162836.2332150-11-peter.maydell@linaro.org
2025-01-28target/arm: Use fp_status_a32 in vfp_cmp helpersPeter Maydell1-2/+2
The helpers vfp_cmps, vfp_cmpes, vfp_cmpd, vfp_cmped are used only from the A32 decoder; the A64 decoder uses separate vfp_cmps_a64 etc helpers (because for A64 we update the main NZCV flags and for A32 we update the FPSCR NZCV flags). So we can make these helpers use the fp_status_a32 field instead of fp_status. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250124162836.2332150-10-peter.maydell@linaro.org
2025-01-28target/arm: Use fp_status_a32 in vjvct helperPeter Maydell1-1/+1
Use fp_status_a32 in the vjcvt helper function; this is called only from the A32/T32 decoder and is not used inside a set_rmode/restore_rmode sequence. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250124162836.2332150-9-peter.maydell@linaro.org
2025-01-28target/arm: Use fp_status_a64 or fp_status_a32 in is_ebf()Peter Maydell1-1/+1
In is_ebf(), we might be called for A64 or A32, but we have the CPUARMState* so we can select fp_status_a64 or fp_status_a32 accordingly. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-28target/arm: Use vfp.fp_status_a64 in A64-only helper functionsPeter Maydell2-5/+5
Switch from vfp.fp_status to vfp.fp_status_a64 for helpers which: * directly reference an fp_status field * are called only from the A64 decoder * are not called inside a set_rmode/restore_rmode sequence Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20250124162836.2332150-8-peter.maydell@linaro.org Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-28target/arm: Define new fp_status_a32 and fp_status_a64Peter Maydell4-0/+30
We want to split the existing fp_status in the Arm CPUState into separate float_status fields for AArch32 and AArch64. (This is because new control bits defined by FEAT_AFP only have an effect for AArch64, not AArch32.) To make this split we will: * define new fp_status_a32 and fp_status_a64 which have identical behaviour to the existing fp_status * move existing uses of fp_status to fp_status_a32 or fp_status_a64 as appropriate * delete the old fp_status when it has no uses left In this patch we add the new float_status fields. We will also need to split fp_status_f16, but we will do that as a separate series of patches. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250124162836.2332150-7-peter.maydell@linaro.org
2025-01-28target/arm: Use uint32_t in vfp_exceptbits_from_host()Peter Maydell1-2/+2
In vfp_exceptbits_from_host(), we accumulate the FPSR flags in an "int", and our return type is also "int". However, the only callsite returns the same information as a uint32_t, and more generally we handle FPSR values in the code as uint32_t, not int. Bring this function in to line with that convention. There is no behaviour change because none of the FPSR bits we set in this function are bit 31. The input argument to the function remains 'int' because that is the return type of the softfloat get_float_exception_flags(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250124162836.2332150-6-peter.maydell@linaro.org
2025-01-28target/arm: Use FPSR_ constants in vfp_exceptbits_from_host()Peter Maydell1-6/+6
Use the FPSR_ named constants in vfp_exceptbits_from_host(), rather than hardcoded magic numbers. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250124162836.2332150-5-peter.maydell@linaro.org
2025-01-28target/arm: arm_reset_sve_state() should set FPSR, not FPCRPeter Maydell1-1/+1
The pseudocode ResetSVEState() does: FPSR = ZeroExtend(0x0800009f<31:0>, 64); but QEMU's arm_reset_sve_state() called vfp_set_fpcr() by accident. Before the advent of FEAT_AFP, this was only setting a collection of RES0 bits, which vfp_set_fpsr() would then ignore, so the only effect was that we didn't actually set the FPSR the way we are supposed to do. Once FEAT_AFP is implemented, setting the bottom bits of FPSR will change the floating point behaviour. Call vfp_set_fpsr(), as we ought to. (Note for stable backports: commit 7f2a01e7368f9 moved this function from sme_helper.c to helper.c, but it had the same bug before the move too.) Cc: qemu-stable@nongnu.org Fixes: f84734b87461 ("target/arm: Implement SMSTART, SMSTOP") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250124162836.2332150-4-peter.maydell@linaro.org
2025-01-28tests/functional: Add a test for the arm microbit machineThomas Huth3-0/+33
We don't have any functional tests for this machine yet, thus let's add a test with a MicroPython binary that is available online (thanks to Joel Stanley for providing it, see: https://www.mail-archive.com/qemu-devel@nongnu.org/msg606064.html ). Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20250124101709.1591761-1-thuth@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-01-28rust: qemu-api: add sub-subclass to the integration testsZhao Liu1-3/+53
Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-01-28rust/zeroable: Implement Zeroable with const_zero macroZhao Liu1-76/+61
The `const_zero` crate provides a nice macro to zero type-specific constants, which doesn't need to enumerates the fields one by one. Introduce the `const_zero` macro to QEMU (along with its documentation), and use it to simplify the implementation of `Zeroable` trait. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Link: https://lore.kernel.org/r/20250123163143.679841-1-zhao1.liu@intel.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-01-28rust: qdev: make reset take a shared referencePaolo Bonzini2-3/+3
Because register reset is within a borrow_mut() call, reset does not need anymore a mut reference to the PL011State. Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-01-28rust: pl011: drop use of ControlFlowPaolo Bonzini1-21/+18
It is a poor match for what the code is doing, anyway. Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-01-28rust: pl011: pull device-specific code out of MemoryRegionOps callbacksPaolo Bonzini2-26/+15
read() can now return a simple u64. Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-01-28rust: pl011: remove duplicate definitionsPaolo Bonzini2-49/+29
Unify the "Interrupt" enum and the "INT_*" constants with a struct that contains the bits. The "int_level" and "int_enabled" fields could use a crate such as "bitflags". Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-01-28rust: pl011: wrap registers with BqlRefCellPaolo Bonzini2-22/+32
This is a step towards making memory ops use a shared reference to the device type; it's not yet possible due to the calls to character device functions. Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-01-27rust: pl011: extract PL011RegistersPaolo Bonzini2-127/+166
Pull all the mutable fields of PL011State into a separate struct. Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-01-27rust: pl011: pull interrupt updates out of read/write opsPaolo Bonzini1-36/+48
qemu_irqs are not part of the vmstate, therefore they will remain in PL011State. Update them if needed after regs_read()/regs_write(). Apply #[must_use] to functions that return whether the interrupt state could have changed, so that it's harder to forget the call to update(). Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-01-27rust: pl011: extract CharBackend receive logic into a separate functionPaolo Bonzini1-6/+9
Prepare for moving all references to the registers and the FIFO into a separate struct. Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-01-27rust: pl011: extract conversion to RegisterOffsetPaolo Bonzini2-60/+79
As an added bonus, this also makes the new function return u32 instead of u64, thus factoring some casts into a single place. Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-01-27hw/arm/stellaris: Map both I2C controllersPhilippe Mathieu-Daudé1-8/+13
There are 2 I2C controllers, map them both, removing the unimplemented one. Keep the OLED controller on the first I2C bus. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20250110160204.74997-7-philmd@linaro.org [PMM: tweak to appease maybe-use-uninitialized warning] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-01-27hw/arm/stellaris: Use DEVCAP macro to access DeviceCapability registersPhilippe Mathieu-Daudé1-8/+29
Add definitions (DCx_periph) for the DeviceCapability bits, replace direct bitmask checks with the DEV_CAP() macro, which use the extract/deposit API. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20250110160204.74997-6-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>