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2024-11-28tests/9p: fix Rreaddir response nameChristian Schoenebeck1-1/+1
All 9p response types are prefixed with an "R", therefore fix "READDIR" -> "RREADDIR" in function rmessage_name(). Fixes: 4829469fd9ff ("tests/virtio-9p: added readdir test") Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <daad7af58b403aaa2487c566032beca36664b30e.1732465720.git.qemu_oss@crudebyte.com>
2024-11-28tests/9p: add 'use-after-unlink' testChristian Schoenebeck1-0/+41
After removing a file from the file system, we should still be able to work with the file if we already had it open before removal. As a first step we verify that it is possible to write to an unlinked file, as this is what already works. This test is extended later on after having fixed other use cases after unlink that are not working yet. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <3d6449d4df25bcdd3e807eff169f46f1385e5257.1732465720.git.qemu_oss@crudebyte.com>
2024-11-289pfs: cleanup V9fsFidStateChristian Schoenebeck1-1/+0
Drop V9fsFidState's 'next' member, which is no longer used since: f5265c8f917e ('9pfs: use GHashTable for fid table') Fixes: f5265c8f917e ('9pfs: use GHashTable for fid table') Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <E1tE4v2-0051EH-Ni@kylie.crudebyte.com>
2024-11-27hw/pci: Remove unused pci_irq_pulse() methodPhilippe Mathieu-Daudé1-10/+0
Last use of pci_irq_pulse() was removed 7 years ago in commit 5e9aa92eb1 ("hw/block: Fix pin-based interrupt behaviour of NVMe"). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20241122103418.539-1-philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-11-27tests/functional: Remove sleep workarounds from sh4 testCédric Le Goater1-7/+3
These were introduced in the avocado tests to workaround read issues when interacting with console. They are no longer necessary and we can use the expected login string instead. Test always passes now. Remove skipUnless test on QEMU_TEST_FLAKY_TESTS. Signed-off-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20241122141827.2039984-1-clg@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-11-27.gitlab-ci.d/cirrus: Remove the wrong CPU and RAM settings from the macOS jobThomas Huth1-2/+0
The macOS runner ignores them and always uses 4 CPUs and 12 GiB of RAM, so remove our setting to avoid wrong expectations. Message-ID: <20241125124342.187594-1-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-11-27meson.build: Refuse XCode versions < v15.0Thomas Huth1-3/+3
According to our support policy, we only support the two latest major versions of macOS, and we already removed compatibility code for older versions. However, it's still possible that people install an older version of XCode on a recent version of macOS - which won't be able to compile QEMU anymore, see for example the ticket here: https://gitlab.com/qemu-project/qemu/-/issues/2694 Thus let's set the expectations right and refuse older versions of XCode that do not match the two latest versions of macOS anymore. Message-ID: <20241126081054.244365-1-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-11-27tests/functional: Fix the running test case causes loongarch64 to hangXianglai Li1-4/+4
There is a bug in the process of resolving the serial port base address in the fdt of the loongarch VM UEFI. When both serial port information and rng-seed information are chosen in the fdt, there is a probability that the serial port base address cannot be resolved correctly. This problem can be fixed by updating UEFI. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2686 Signed-off-by: Xianglai Li <lixianglai@loongson.cn> Message-ID: <20241127013438.2206426-1-lixianglai@loongson.cn> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-11-27docs: Document that hvf on Arm is supportedAkihiko Odaki1-1/+1
hvf on Arm is supported since commit a1477da3ddeb ("hvf: Add Apple Silicon support"). Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Alexander Graf <agraf@csgraf.de> Message-ID: <20241127-build-v1-1-65b8162733f0@daynix.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-11-27docs/devel/testing/functional: Clarify that we have to use the build folderThomas Huth1-2/+3
Make it clear that the commands have to be run from the folder with the build, and use the python3 from our pyvenv to make sure that the pycotap module is available. Message-ID: <20241112115302.470527-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-11-26Update version for v9.2.0-rc2 releasePeter Maydell1-1/+1
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-26vhost: fail device start if iotlb update failsPrasad Pandit1-1/+12
While starting a vhost device, updating iotlb entries via 'vhost_device_iotlb_miss' may return an error. qemu-kvm: vhost_device_iotlb_miss: 700871,700871: Fail to update device iotlb Fail device start when such an error occurs. Signed-off-by: Prasad Pandit <pjp@fedoraproject.org> Message-Id: <20241107113247.46532-1-ppandit@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
2024-11-26bios-tables-test: Add data for complex numa test (GI, GP etc)Jonathan Cameron6-5/+0
Given this is a new configuration, there are affects on APIC, CEDT and DSDT, but the key elements are in SRAT (plus related data in HMAT). The configuration has node to exercise many different combinations. 0) CPUs + Memory 1) GI only 2) GP only 3) CPUS only 4) Memory only 5) CPUs + HP memory GI node, GP Node, Memory only node, hotplug memory only node, latency and bandwidth such that in Linux Access0 (any initiator) and Access1 (CPU initiators only) given different answers. Following cropped to remove details of each entry. [000h 0000 004h] Signature : "SRAT" [System Resource Affinity Table] ... [030h 0048 001h] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] ... [032h 0050 001h] Proximity Domain Low(8) : 00 [033h 0051 001h] Apic ID : 00 ... [040h 0064 001h] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] ... [042h 0066 001h] Proximity Domain Low(8) : 03 [043h 0067 001h] Apic ID : 01 ... [050h 0080 001h] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] ... [052h 0082 001h] Proximity Domain Low(8) : 05 [053h 0083 001h] Apic ID : 02 ... [060h 0096 001h] Subtable Type : 01 [Memory Affinity] ... [062h 0098 004h] Proximity Domain : 00000000 ... [068h 0104 008h] Base Address : 0000000000000000 [070h 0112 008h] Address Length : 00000000000A0000 ... [088h 0136 001h] Subtable Type : 01 [Memory Affinity] ... [08Ah 0138 004h] Proximity Domain : 00000000 ... [090h 0144 008h] Base Address : 0000000000100000 [098h 0152 008h] Address Length : 0000000003F00000 ... [0B0h 0176 001h] Subtable Type : 01 [Memory Affinity] ... [0B2h 0178 004h] Proximity Domain : 00000004 ... [0B8h 0184 008h] Base Address : 0000000004000000 [0C0h 0192 008h] Address Length : 0000000004000000 ... some zero length entries follow... [1A0h 0416 001h] Subtable Type : 05 [Generic Initiator Affinity] [1A1h 0417 001h] Length : 20 [1A2h 0418 001h] Reserved1 : 00 [1A3h 0419 001h] Device Handle Type : 01 [1A4h 0420 004h] Proximity Domain : 00000001 [1A8h 0424 010h] Device Handle : 00 00 01 02 00 00 00 00 00 00 00 00 00 00 00 00 [1B8h 0440 004h] Flags (decoded below) : 00000001 Enabled : 1 Architectural Transactions : 0 [1BCh 0444 004h] Reserved2 : 00000000 [1C0h 0448 001h] Subtable Type : 06 [Generic Port Affinity] [1C1h 0449 001h] Length : 20 [1C2h 0450 001h] Reserved1 : 00 [1C3h 0451 001h] Device Handle Type : 00 [1C4h 0452 004h] Proximity Domain : 00000002 [1C8h 0456 010h] Device Handle : 41 43 50 49 30 30 31 36 40 00 00 00 00 00 00 00 [1D8h 0472 004h] Flags (decoded below) : 00000001 Enabled : 1 Architectural Transactions : 0 [1DCh 0476 004h] Reserved2 : 00000000 [1E0h 0480 001h] Subtable Type : 01 [Memory Affinity] ... [1E2h 0482 004h] Proximity Domain : 00000005 ... [1E8h 0488 008h] Base Address : 0000000100000000 [1F0h 0496 008h] Address Length : 0000000090000000 Example block from HMAT: [0F0h 0240 002h] Structure Type : 0001 [System Locality Latency and Bandwidth Information] [0F2h 0242 002h] Reserved : 0000 [0F4h 0244 004h] Length : 00000078 [0F8h 0248 001h] Flags (decoded below) : 00 Memory Hierarchy : 0 Use Minimum Transfer Size : 0 Non-sequential Transfers : 0 [0F9h 0249 001h] Data Type : 03 [0FAh 0250 001h] Minimum Transfer Size : 00 [0FBh 0251 001h] Reserved1 : 00 [0FCh 0252 004h] Initiator Proximity Domains # : 00000004 [100h 0256 004h] Target Proximity Domains # : 00000006 [104h 0260 004h] Reserved2 : 00000000 [108h 0264 008h] Entry Base Unit : 0000000000000004 [110h 0272 004h] Initiator Proximity Domain List : 00000000 [114h 0276 004h] Initiator Proximity Domain List : 00000001 [118h 0280 004h] Initiator Proximity Domain List : 00000003 [11Ch 0284 004h] Initiator Proximity Domain List : 00000005 [120h 0288 004h] Target Proximity Domain List : 00000000 [124h 0292 004h] Target Proximity Domain List : 00000001 [128h 0296 004h] Target Proximity Domain List : 00000002 [12Ch 0300 004h] Target Proximity Domain List : 00000003 [130h 0304 004h] Target Proximity Domain List : 00000004 [134h 0308 004h] Target Proximity Domain List : 00000005 [138h 0312 002h] Entry : 00C8 [13Ah 0314 002h] Entry : 0000 [13Ch 0316 002h] Entry : 0032 [13Eh 0318 002h] Entry : 0000 [140h 0320 002h] Entry : 0032 [142h 0322 002h] Entry : 0064 [144h 0324 002h] Entry : 0019 [146h 0326 002h] Entry : 0000 [148h 0328 002h] Entry : 0064 [14Ah 0330 002h] Entry : 0000 [14Ch 0332 002h] Entry : 00C8 [14Eh 0334 002h] Entry : 0019 [150h 0336 002h] Entry : 0064 [152h 0338 002h] Entry : 0000 [154h 0340 002h] Entry : 0032 [156h 0342 002h] Entry : 0000 [158h 0344 002h] Entry : 0032 [15Ah 0346 002h] Entry : 0064 [15Ch 0348 002h] Entry : 0064 [15Eh 0350 002h] Entry : 0000 [160h 0352 002h] Entry : 0032 [162h 0354 002h] Entry : 0000 [164h 0356 002h] Entry : 0032 [166h 0358 002h] Entry : 00C8 Note the zeros represent entries where the target node has no memory. These could be surpressed but it isn't 'wrong' to provide them and it is (probably) permissible under ACPI to hotplug memory into these nodes later. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20241107123446.902801-6-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-11-26bios-tables-test: Add complex SRAT / HMAT test for GI GPJonathan Cameron1-0/+97
Add a test with 6 nodes to exercise most interesting corner cases of SRAT and HMAT generation including the new Generic Initiator and Generic Port Affinity structures. More details of the set up in the following patch adding the table data. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20241107123446.902801-5-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-11-26bios-tables-test: Allow for new acpihmat-generic-x test data.Jonathan Cameron6-0/+5
The test to be added exercises many corner cases of the SRAT and HMAT table generation. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20241107123446.902801-4-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-11-26qapi/qom: Change Since entry for AcpiGenericPortProperties to 9.2Jonathan Cameron1-1/+1
This feature was only applied during the 9.2 cycle, so reflect that rather than 9.1. Reported-by: Daniel P. Berrangé <berrange@redhat.com> Closes: https://lore.kernel.org/qemu-devel/ZyngEiwmYeZ-DvCy@redhat.com/ Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20241107123446.902801-3-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2024-11-26hw/acpi: Fix size of HID in build_append_srat_acpi_device_handle()Jonathan Cameron1-1/+1
The size should always be 8 so hard code that. By coincidience the incorrect use of sizeof(char *) is 8 on 64 bit hosts, but was caught by CI testing with i686 as the host. Reported-by: Michael S. Tsirkin <mst@redhat.com> Closes: https://lore.kernel.org/qemu-devel/20241104110025-mutt-send-email-mst@kernel.org/ Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20241107123446.902801-2-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2024-11-26qapi: fix device-sync-config since-versionVladimir Sementsov-Ogievskiy1-1/+1
Actually it comes in 9.2, not 9.1. Fixes: 3f98408e2e ("qapi: introduce device-sync-config") Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Message-Id: <20241108071957.727286-1-vsementsov@yandex-team.ru> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-11-26hw/cxl: Check for zero length features in cmd_features_set_feature()Jonathan Cameron1-0/+4
Zero length data for features doesn't make any sense so exclude that case early. This fixes the undefined behavior reported by coverity for a zero length memcpy(). Resolves CID 1564900 and 1564901 Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20241108175814.1248278-1-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-11-26tests/acpi: update expected blobsIgor Mammedov42-41/+0
Expected AML return to the state before bf1ecc8dad606 (w/acpi: Update ACPI `_STA` method with QOM vCPU ACPI Hotplug states) droping not needed CPRS and _STA logic that broke cpu hotplug @@ -2887,7 +2887,6 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) CRMV, 1, CEJ0, 1, CEJF, 1, - CPRS, 1, Offset (0x05), CCMD, 8 } @@ -2922,16 +2921,9 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) \_SB.PCI0.PRES.CSEL = Arg0 Local0 = Zero - If ((\_SB.PCI0.PRES.CPRS == One)) + If ((\_SB.PCI0.PRES.CPEN == One)) { - If ((\_SB.PCI0.PRES.CPEN == One)) - { - Local0 = 0x0F - } - Else - { - Local0 = 0x0D - } + Local0 = 0x0F } Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20241112170258.2996640-5-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-11-26Revert "hw/acpi: Make CPUs ACPI `presence` conditional during vCPU hot-unplug"Igor Mammedov2-15/+1
This reverts commit 2d6cfbaf174b91dfa9a50065f7494634afb39c23. The patch is supposed to be part of ARM CPU hotplug series and has not value on its own without it. The series however is still in RFC stage and outside of scope 9.2 release. On top of that it introduces not needed callback that pokes directly into CPU state without any need for that. Instead properties and AML generator option should be used to configure static platform depended vCPU presence state. Drop the patch so that corrected version could be posted along with ARM CPU hotplug series and properly reviewed in relevant context. That also helps us to keep history cleaner with new patch being against original code vs a string of fixups on top of current mess. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20241112170258.2996640-4-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-11-26Revert "hw/acpi: Update ACPI `_STA` method with QOM vCPU ACPI Hotplug states"Igor Mammedov2-35/+4
This reverts commit bf1ecc8dad6061914730a2a2d57af6b37c3a4f8d which broke cpu hotplug in x86 after migration to older QEMU Fixes: bf1ecc8dad606 (w/acpi: Update ACPI `_STA` method with QOM vCPU ACPI Hotplug states) Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20241112170258.2996640-3-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-11-26qtest: allow ACPI DSDT Table changesSalil Mehta1-0/+41
list changed files in tests/qtest/bios-tables-test-allowed-diff.h Message-ID: <20241106100047.18901c9d@imammedo.users.ipa.redhat.com> Signed-off-by: Salil Mehta <salil.mehta@huawei.com> Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20241112170258.2996640-2-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-11-26vhost_net: fix assertion triggered by batch of host notifiers processingzuoboqun1-11/+24
When the backend of vhost_net restarts during the vm is running, vhost_net is stopped and started. The virtio_device_grab_ioeventfd() fucntion in vhost_net_enable_notifiers() will result in a call to virtio_bus_set_host_notifier()(assign=false). And now virtio_device_grab_ioeventfd() is batched in a single transaction with virtio_bus_set_host_notifier()(assign=true). This triggers the following assertion: kvm_mem_ioeventfd_del: error deleting ioeventfd: Bad file descriptor This patch moves virtio_device_grab_ioeventfd() out of the batch to fix this problem. To be noted that the for loop to release ioeventfd should start from i+1, not i, because the i-th ioeventfd has already been released in vhost_dev_disable_notifiers_nvqs(). Fixes: 6166799f6 ("vhost_net: configure all host notifiers in a single MR transaction") Signed-off-by: Zuo Boqun <zuoboqun@baidu.com> Reported-by: Gao Shiyuan <gaoshiyuan@baidu.com> Message-Id: <20241115080312.3184-1-zuoboqun@baidu.com> Acked-by: Stefano Garzarella <sgarzare@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-11-27hw/ppc/pegasos2: Fix IRQ routing from pci.0BALATON Zoltan2-1/+30
The MV64361 has two PCI buses one of which is used for AGP on PegasosII. So far we only emulated the PCI bus on pci.1 but some graphics cards are only recognised by some guests when connected to pci.0 corresponding to the AGP port. So far the interrupts were not routed from pci.0 so this patch fixes that allowing the use of both PCI buses. On real board only INTA and INTB are connected for AGP but to avoid surprises we connect all 4 PCI interrupt lines so pci.0 can be used for all PCI cards as well. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-11-27ppc/spapr: fix drc index mismatch for partially enabled vcpusHarsh Prateek Bora1-1/+1
In case when vcpus are explicitly enabled/disabled in a non-consecutive order within a libvirt xml, it results in a drc index mismatch during vcpu hotplug later because the existing logic uses vcpu id to derive the corresponding drc index which is not correct. Use env->core_index to derive a vcpu's drc index as appropriate to fix this issue. For ex, for the given libvirt xml config: <vcpus> <vcpu id='0' enabled='yes' hotpluggable='no'/> <vcpu id='1' enabled='yes' hotpluggable='yes'/> <vcpu id='2' enabled='no' hotpluggable='yes'/> <vcpu id='3' enabled='yes' hotpluggable='yes'/> <vcpu id='4' enabled='no' hotpluggable='yes'/> <vcpu id='5' enabled='yes' hotpluggable='yes'/> <vcpu id='6' enabled='no' hotpluggable='yes'/> <vcpu id='7' enabled='no' hotpluggable='yes'/> </vcpus> We see below error on guest console with "virsh setvcpus <domain> 5" : pseries-hotplug-cpu: CPU with drc index 10000002 already exists This patch fixes the issue by using correct drc index for explicitly enabled vcpus during init. Reported-by: Anushree Mathur <anushree.mathur@linux.vnet.ibm.com> Tested-by: Anushree Mathur <anushree.mathur@linux.vnet.ibm.com> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-11-27ppc/pnv: Add xscom- prefix to pervasive-control region nameNicholas Piggin1-1/+1
By convention, xscom regions get a xscom- prefix. Fixes: 1adf24708bf7 ("hw/ppc: Add pnv nest pervasive common chiplet model") Reviewed-by: Glenn Miles <milesg@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-11-27target/ppc: Fix THREAD_SIBLING_FOREACH for multi-socketGlenn Miles3-2/+8
The THREAD_SIBLING_FOREACH macro wasn't excluding threads from other chips. Add chip_index field to the thread state and add a check for the new field in the macro. Fixes: b769d4c8f4c6 ("target/ppc: Add initial flags and helpers for SMT support") Signed-off-by: Glenn Miles <milesg@linux.ibm.com> [npiggin: set chip_index for spapr too] Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-11-27ppc/pnv: Fix direct controls quiesceNicholas Piggin2-2/+8
powernv CPUs have a set of control registers that can stop, start, and do other things to control a thread's execution. Using this interface to stop a thread puts it into a particular state that can be queried, and is distinguishable from other things that might stop the CPU (e.g., going idle, or being debugged via gdb, or stopped by the monitor). Add a new flag that can speficially distinguish this state where it is stopped with control registers. This solves some hangs when rebooting powernv machines when skiboot is modified to allow QEMU to use the CPU control facility (that uses controls to bring all secondaries to a known state). Fixes: c8891955086 ("ppc/pnv: Implement POWER10 PC xscom registers for direct controls") Reviewed-by: Glenn Miles <milesg@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-11-27target/ppc: Fix non-maskable interrupt while haltedNicholas Piggin1-0/+7
The ppc (pnv and spapr) NMI injection code does not go through the asynchronous interrupt path and set a bit in env->pending_interrupts and raise an interrupt request that the cpu_exec() loop can see. Instead it injects the exception directly into registers. This can lead to cpu_exec() missing that the thread has work to do, if a NMI is injected while it was idle. Fix this by clearing halted when injecting the interrupt. Probably NMI injection should be reworked to use the interrupt request interface, but this seems to work as a minimal fix. Fixes: 3431648272d3 ("spapr: Add support for new NMI interface") Reviewed-by: Glenn Miles <milesg@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-11-26docs/system/arm/aspeed: add missing model supermicrox11spi-bmcPierrick Bouvier1-3/+4
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Message-id: 20241122225049.1617774-13-pierrick.bouvier@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-26docs/system/arm/fby35: update link to product pagePierrick Bouvier1-1/+1
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241122225049.1617774-8-pierrick.bouvier@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-26docs/system/arm/: add FEAT_DoubleLockPierrick Bouvier1-0/+1
We already implement FEAT_DoubleLock (see commit f94a6df5dd6a7) when the ID registers call for it. This feature is actually one that must *not* be implemented in v9.0, but since our documentation lists everything we can emulate, we should include FEAT_DoubleLock in the list. Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-id: 20241122225049.1617774-7-pierrick.bouvier@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: expand commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-26docs/system/arm/: add FEAT_MTE_ASYNCPierrick Bouvier1-0/+1
We already implement FEAT_MTE_ASYNC; we just forgot to list it in the documentation. Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241122225049.1617774-6-pierrick.bouvier@linaro.org [PMM: expand commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-26target/arm/tcg/: fix typo in FEAT namePierrick Bouvier1-1/+1
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241122225049.1617774-5-pierrick.bouvier@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-26docs/system/arm/emulation: add FEAT_SSBS2Pierrick Bouvier1-0/+1
We implemented this at the same times as FEAT_SSBS, but forgot to list it in the documentation. Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241122225049.1617774-4-pierrick.bouvier@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: improve commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-26docs/system/arm/emulation: fix typo in feature namePierrick Bouvier1-1/+1
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241122225049.1617774-3-pierrick.bouvier@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-26docs/system/arm/emulation: mention armv9Pierrick Bouvier1-3/+3
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241122225049.1617774-2-pierrick.bouvier@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-26target/arm/tcg/cpu32.c: swap ATCM and BTCM register namesMichael Tokarev1-2/+2
According to Cortex-R5 r1p2 manual, register with opcode2=0 is BTCM and with opcode2=1 is ATCM, - exactly the opposite from how qemu labels them. Just swap the labels to avoid confusion, - both registers are implemented as always-zero. Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241121171602.3273252-1-mjt@tls.msk.ru Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-26virtio-net: Add queues before loading themAkihiko Odaki3-0/+19
Call virtio_net_set_multiqueue() to add queues before loading their states. Otherwise the loaded queues will not have handlers and elements in them will not be processed. Cc: qemu-stable@nongnu.org Fixes: 8c49756825da ("virtio-net: Add only one queue pair when realizing") Reported-by: Laurent Vivier <lvivier@redhat.com> Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2024-11-25migration: Fix extra cleanup at postcopy listenFabiano Rosas1-1/+0
After fixing the loadvm cleanup race the qemu_loadvm_state_cleanup() is now being called twice in the postcopy listen thread. Fixes: 4ce5622908 ("migration/multifd: Fix rb->receivedmap cleanup race") Signed-off-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/r/20241125191128.9120-1-farosas@suse.de Signed-off-by: Peter Xu <peterx@redhat.com>
2024-11-25migration: Allow pipes to keep working for fd migrationsPeter Xu1-2/+25
Libvirt may still use pipes for old file migrations in fd: URI form, especially when loading old images dumped from Libvirt's compression algorithms. In that case, Libvirt needs to compress / uncompress the images on its own over the migration binary stream, and pipes are passed over to QEMU for outgoing / incoming migrations in "fd:" URIs. For future such use case, it should be suggested to use mapped-ram when saving such VM image. However there can still be old images that was compressed in such way, so libvirt needs to be able to load those images, uncompress them and use the same pipe mechanism to pass that over to QEMU. It means, even if new file migrations can be gradually moved over to mapped-ram (after Libvirt start supporting it), Libvirt still needs the uncompressor for the old images to be able to load like before. Meanwhile since Libvirt currently exposes the compression capability to guest images, it may needs its own lifecycle management to move that over to mapped-ram, maybe can be done after mapped-ram saved the image, however Dan and PeterK raised concern on temporary double disk space consumption. I suppose for now the easiest is to enable pipes for both sides of "fd:" migrations, until all things figured out from Libvirt side on how to move on. And for "channels" QMP interface support on "migrate" / "migrate-incoming" commands, we'll also need to move away from pipe. But let's leave that for later too. So far, still allow pipes to happen like before on both save/load sides, just like we would allow sockets to pass. Cc: qemu-stable <qemu-stable@nongnu.org> Cc: Fabiano Rosas <farosas@suse.de> Cc: Peter Krempa <pkrempa@redhat.com> Cc: Daniel P. Berrangé <berrange@redhat.com> Fixes: c55deb860c ("migration: Deprecate fd: for file migration") Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/r/20241120160132.3659735-1-peterx@redhat.com Signed-off-by: Peter Xu <peterx@redhat.com>
2024-11-25tests/functional: Remove sleep workarounds from Aspeed testsCédric Le Goater1-9/+7
These were introduced in the avocado tests to workaround read issues when interacting with console. They are no longer necessary and we can use the expected "login:" string or the command prompt now. Drop the last use of exec_command. Signed-off-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20241122090322.1934697-4-clg@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2024-11-25tests/functional: Convert Aspeed arm SDK testsCédric Le Goater2-124/+68
Drop the SSH connection which was introduced in the avocado tests to workaround read issues when interacting with console. EXTRA_BOOTARGS was introduced to reduce the console output at Linux boot time. This didn't have the desired effect as we still had issues when trying to match patterns on the console and we had to use the ssh connection as a workaround. While at it, remove the U-Boot EXTRA_BOOTARGS variable which has become useless. Signed-off-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20241122090322.1934697-3-clg@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2024-11-25tests/functional: Convert Aspeed aarch64 SDK testsCédric Le Goater3-78/+100
Drop the SSH connection which was introduced in the avocado tests to workaround read issues when interacting with console. Signed-off-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20241122090322.1934697-2-clg@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2024-11-25docs: explicitly permit a "commonly known identity" with SoBDaniel P. Berrangé2-2/+10
The docs for submitting a patch describe using your "Real Name" with the Signed-off-by line. Although somewhat ambiguous, this has often been interpreted to mean someone's legal name. In recent times, there's been a general push back[1] against the notion that use of Signed-off-by in a project automatically requires / implies the use of legal ("real") names and greater awareness of the downsides. Full discussion of the problems of such policies is beyond the scope of this commit message, but at a high level they are liable to marginalize, disadvantage, and potentially result in harm, to contributors. TL;DR: there are compelling reasons for a person to choose distinct identities in different contexts & a decision to override that choice should not be taken lightly. A number of key projects have responded to the issues raised by making it clear that a contributor is free to determine the identity used in SoB lines: * Linux has clarified[2] that they merely expect use of the contributor's "known identity", removing the previous explicit rejection of pseudonyms. * CNCF has clarified[3] that the real name is simply the identity the contributor chooses to use in the context of the community and does not have to be a legal name, nor birth name, nor appear on any government ID. Since we have no intention of ever routinely checking any form of ID documents for contributors[4], realistically we have no way of knowing anything about the name they are using, except through chance, or through the contributor volunteering the information. IOW, we almost certainly already have people using pseudonyms for contributions. This proposes to accept that reality and eliminate unnecessary friction, by following Linux & the CNCF in merely asking that a contributors' commonly known identity, of their choosing, be used with the SoB line. [1] Raised in many contexts at many times, but a decent overall summary can be read at https://drewdevault.com/2023/10/31/On-real-names.html [2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=d4563201f33a022fc0353033d9dfeb1606a88330 [3] https://github.com/cncf/foundation/blob/659fd32c86dc/dco-guidelines.md [4] Excluding the rare GPG key signing parties for regular maintainers Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Acked-by: Stefan Hajnoczi <stefanha@redhat.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241021190939.1482466-1-berrange@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20241121165806.476008-40-alex.bennee@linaro.org>
2024-11-25rust/pl011: Fix range checks for device ID accessesJunjie Mao1-1/+1
The peripheral and PrimeCell identification registers of pl011 are located at offset 0xFE0 - 0xFFC. To check if a read falls to such registers, the C implementation checks if the offset-shifted-by-2 (not the offset itself) is in the range 0x3F8 - 0x3FF. Use the same check in the Rust implementation. This fixes the timeout of the following avocado tests: * tests/avocado/boot_linux_console.py:BootLinuxConsole.test_arm_virt * tests/avocado/replay_kernel.py:ReplayKernelNormal.test_arm_virt * tests/avocado/replay_kernel.py:ReplayKernelNormal.test_arm_vexpressa9 Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Junjie Mao <junjie.mao@hotmail.com> Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <SY0P300MB102644C4AC34A3AAD75DC4D5955C2@SY0P300MB1026.AUSP300.PROD.OUTLOOK.COM> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20241121165806.476008-39-alex.bennee@linaro.org>
2024-11-25plugins: eradicate qemu-plugins.symbols static filePierrick Bouvier1-59/+0
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20241112212622.3590693-4-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20241121165806.476008-38-alex.bennee@linaro.org>
2024-11-25plugins: detect qemu plugin API symbols from headerPierrick Bouvier3-3/+55
Instead of using a static file (error prone and hard to keep in sync), we generate it using a script. Note: if a symbol is not exported, we'll now notice it when linking for Windows/MacOS platforms. Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20241112212622.3590693-3-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20241121165806.476008-37-alex.bennee@linaro.org>
2024-11-25plugins: add missing export for qemu_plugin_num_vcpusPierrick Bouvier1-0/+1
Fixes: 4a448b148ca ("plugins: add qemu_plugin_num_vcpus function") Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20241112212622.3590693-2-pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20241121165806.476008-36-alex.bennee@linaro.org>