From 9d82b5a792236db31a75b9db5c93af69ac07c7c5 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Fri, 16 Aug 2013 08:26:30 +0200 Subject: exec: make iotlb RCU-friendly After the previous patch, TLBs will be flushed on every change to the memory mapping. This patch augments that with synchronization of the MemoryRegionSections referred to in the iotlb array. With this change, it is guaranteed that iotlb_to_region will access the correct memory map, even once the TLB will be accessed outside the BQL. Reviewed-by: Fam Zheng Signed-off-by: Paolo Bonzini --- cputlb.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'cputlb.c') diff --git a/cputlb.c b/cputlb.c index 3b271d44d9..f92db5e183 100644 --- a/cputlb.c +++ b/cputlb.c @@ -265,8 +265,7 @@ void tlb_set_page(CPUState *cpu, target_ulong vaddr, } sz = size; - section = address_space_translate_for_iotlb(cpu->as, paddr, - &xlat, &sz); + section = address_space_translate_for_iotlb(cpu, paddr, &xlat, &sz); assert(sz >= TARGET_PAGE_SIZE); #if defined(DEBUG_TLB) @@ -347,7 +346,7 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr) cpu_ldub_code(env1, addr); } pd = env1->iotlb[mmu_idx][page_index] & ~TARGET_PAGE_MASK; - mr = iotlb_to_region(cpu->as, pd); + mr = iotlb_to_region(cpu, pd); if (memory_region_is_unassigned(mr)) { CPUClass *cc = CPU_GET_CLASS(cpu); -- cgit 1.4.1