From 208046768da78b7d841e5ef784c3161c4f76ba16 Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Wed, 19 Feb 2020 18:01:32 +0100 Subject: exec: Rename ram_ptr variable MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As we are going to use a different 'ptr' variable, rename the 'ram pointer' variable. Signed-off-by: Philippe Mathieu-Daudé --- exec.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'exec.c') diff --git a/exec.c b/exec.c index 8e9cc3b47c..08a30f6741 100644 --- a/exec.c +++ b/exec.c @@ -3151,7 +3151,7 @@ static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, hwaddr len, hwaddr addr1, hwaddr l, MemoryRegion *mr) { - uint8_t *ptr; + uint8_t *ram_ptr; uint64_t val; MemTxResult result = MEMTX_OK; bool release_lock = false; @@ -3167,8 +3167,8 @@ static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, size_memop(l), attrs); } else { /* RAM case */ - ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); - memcpy(ptr, buf, l); + ram_ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); + memcpy(ram_ptr, buf, l); invalidate_and_set_dirty(mr, addr1, l); } @@ -3215,7 +3215,7 @@ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, hwaddr len, hwaddr addr1, hwaddr l, MemoryRegion *mr) { - uint8_t *ptr; + uint8_t *ram_ptr; uint64_t val; MemTxResult result = MEMTX_OK; bool release_lock = false; @@ -3230,8 +3230,8 @@ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, stn_he_p(buf, l, val); } else { /* RAM case */ - ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); - memcpy(buf, ptr, l); + ram_ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); + memcpy(buf, ram_ptr, l); } if (release_lock) { @@ -3329,7 +3329,7 @@ static inline MemTxResult address_space_write_rom_internal(AddressSpace *as, enum write_rom_type type) { hwaddr l; - uint8_t *ptr; + uint8_t *ram_ptr; hwaddr addr1; MemoryRegion *mr; @@ -3343,14 +3343,14 @@ static inline MemTxResult address_space_write_rom_internal(AddressSpace *as, l = memory_access_size(mr, l, addr1); } else { /* ROM/RAM case */ - ptr = qemu_map_ram_ptr(mr->ram_block, addr1); + ram_ptr = qemu_map_ram_ptr(mr->ram_block, addr1); switch (type) { case WRITE_DATA: - memcpy(ptr, buf, l); + memcpy(ram_ptr, buf, l); invalidate_and_set_dirty(mr, addr1, l); break; case FLUSH_CACHE: - flush_icache_range((uintptr_t)ptr, (uintptr_t)ptr + l); + flush_icache_range((uintptr_t)ram_ptr, (uintptr_t)ram_ptr + l); break; } } -- cgit 1.4.1 From a152be43dcfc1b72c6987e561102776f197ccc8d Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Wed, 19 Feb 2020 19:52:44 +0100 Subject: exec: Let flatview API take void pointer arguments MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Only flatview_[read/write]_continue use a byte pointer to increment an offset. For the users, we are only dealing with a blob buffer. Use a void pointer argument. This will let us simplify the address_space API in the next commit. Signed-off-by: Philippe Mathieu-Daudé --- exec.c | 14 ++++++++------ include/exec/memory.h | 2 +- 2 files changed, 9 insertions(+), 7 deletions(-) (limited to 'exec.c') diff --git a/exec.c b/exec.c index 08a30f6741..17808e38cb 100644 --- a/exec.c +++ b/exec.c @@ -2780,9 +2780,9 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len, } static MemTxResult flatview_read(FlatView *fv, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, hwaddr len); + MemTxAttrs attrs, void *buf, hwaddr len); static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, hwaddr len); + const void *buf, hwaddr len); static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len, bool is_write, MemTxAttrs attrs); @@ -3147,7 +3147,7 @@ static bool prepare_mmio_access(MemoryRegion *mr) /* Called within RCU critical section. */ static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, + const void *ptr, hwaddr len, hwaddr addr1, hwaddr l, MemoryRegion *mr) { @@ -3155,6 +3155,7 @@ static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, uint64_t val; MemTxResult result = MEMTX_OK; bool release_lock = false; + const uint8_t *buf = ptr; for (;;) { if (!memory_access_is_direct(mr, true)) { @@ -3194,7 +3195,7 @@ static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, /* Called from RCU critical section. */ static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, hwaddr len) + const void *buf, hwaddr len) { hwaddr l; hwaddr addr1; @@ -3211,7 +3212,7 @@ static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, /* Called within RCU critical section. */ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, + MemTxAttrs attrs, void *ptr, hwaddr len, hwaddr addr1, hwaddr l, MemoryRegion *mr) { @@ -3219,6 +3220,7 @@ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, uint64_t val; MemTxResult result = MEMTX_OK; bool release_lock = false; + uint8_t *buf = ptr; for (;;) { if (!memory_access_is_direct(mr, false)) { @@ -3256,7 +3258,7 @@ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, /* Called from RCU critical section. */ static MemTxResult flatview_read(FlatView *fv, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, hwaddr len) + MemTxAttrs attrs, void *buf, hwaddr len) { hwaddr l; hwaddr addr1; diff --git a/include/exec/memory.h b/include/exec/memory.h index e85b7de99a..6f8084f45e 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -2336,7 +2336,7 @@ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, uint8_t *buf, hwaddr len); MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, + MemTxAttrs attrs, void *buf, hwaddr len, hwaddr addr1, hwaddr l, MemoryRegion *mr); void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr); -- cgit 1.4.1 From daa3dda43af90d1c88d439891c6c7129959ccc77 Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Wed, 19 Feb 2020 19:54:35 +0100 Subject: exec: Let the address_space API use void pointer arguments MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As we are only dealing with a blob buffer, use a void pointer argument. This will let us simplify other APIs. Signed-off-by: Philippe Mathieu-Daudé --- exec.c | 11 ++++++----- include/exec/memory.h | 12 ++++++------ 2 files changed, 12 insertions(+), 11 deletions(-) (limited to 'exec.c') diff --git a/exec.c b/exec.c index 17808e38cb..3d6ee06c41 100644 --- a/exec.c +++ b/exec.c @@ -3271,7 +3271,7 @@ static MemTxResult flatview_read(FlatView *fv, hwaddr addr, } MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, hwaddr len) + MemTxAttrs attrs, void *buf, hwaddr len) { MemTxResult result = MEMTX_OK; FlatView *fv; @@ -3287,7 +3287,7 @@ MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, MemTxResult address_space_write(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, hwaddr len) + const void *buf, hwaddr len) { MemTxResult result = MEMTX_OK; FlatView *fv; @@ -3302,7 +3302,7 @@ MemTxResult address_space_write(AddressSpace *as, hwaddr addr, } MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, - uint8_t *buf, hwaddr len, bool is_write) + void *buf, hwaddr len, bool is_write) { if (is_write) { return address_space_write(as, addr, attrs, buf, len); @@ -3326,7 +3326,7 @@ enum write_rom_type { static inline MemTxResult address_space_write_rom_internal(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, + const void *ptr, hwaddr len, enum write_rom_type type) { @@ -3334,6 +3334,7 @@ static inline MemTxResult address_space_write_rom_internal(AddressSpace *as, uint8_t *ram_ptr; hwaddr addr1; MemoryRegion *mr; + const uint8_t *buf = ptr; RCU_READ_LOCK_GUARD(); while (len > 0) { @@ -3366,7 +3367,7 @@ static inline MemTxResult address_space_write_rom_internal(AddressSpace *as, /* used for ROM loading : can write in RAM and ROM */ MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, hwaddr len) + const void *buf, hwaddr len) { return address_space_write_rom_internal(as, addr, attrs, buf, len, WRITE_DATA); diff --git a/include/exec/memory.h b/include/exec/memory.h index 6f8084f45e..afee185eae 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -2052,7 +2052,7 @@ void address_space_remove_listeners(AddressSpace *as); * @is_write: indicates the transfer direction */ MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, + MemTxAttrs attrs, void *buf, hwaddr len, bool is_write); /** @@ -2070,7 +2070,7 @@ MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, */ MemTxResult address_space_write(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, hwaddr len); + const void *buf, hwaddr len); /** * address_space_write_rom: write to address space, including ROM. @@ -2096,7 +2096,7 @@ MemTxResult address_space_write(AddressSpace *as, hwaddr addr, */ MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, hwaddr len); + const void *buf, hwaddr len); /* address_space_ld*: load from an address space * address_space_st*: store to an address space @@ -2334,7 +2334,7 @@ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, /* Internal functions, part of the implementation of address_space_read. */ MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, hwaddr len); + MemTxAttrs attrs, void *buf, hwaddr len); MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, MemTxAttrs attrs, void *buf, hwaddr len, hwaddr addr1, hwaddr l, @@ -2374,7 +2374,7 @@ static inline bool memory_access_is_direct(MemoryRegion *mr, bool is_write) */ static inline __attribute__((__always_inline__)) MemTxResult address_space_read(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, + MemTxAttrs attrs, void *buf, hwaddr len) { MemTxResult result = MEMTX_OK; @@ -2433,7 +2433,7 @@ address_space_read_cached(MemoryRegionCache *cache, hwaddr addr, */ static inline void address_space_write_cached(MemoryRegionCache *cache, hwaddr addr, - void *buf, hwaddr len) + const void *buf, hwaddr len) { assert(addr < cache->len && len <= cache->len - addr); if (likely(cache->ptr)) { -- cgit 1.4.1 From d7ef71ef421d7ea481587b11c4cb8d25718baa4b Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Wed, 19 Feb 2020 20:02:11 +0100 Subject: exec: Let the cpu_[physical]_memory API use void pointer arguments MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As we are only dealing with a blob buffer, use a void pointer argument. This will let us simplify other APIs. Signed-off-by: Philippe Mathieu-Daudé --- exec.c | 8 +++++--- include/exec/cpu-all.h | 2 +- include/exec/cpu-common.h | 2 +- 3 files changed, 7 insertions(+), 5 deletions(-) (limited to 'exec.c') diff --git a/exec.c b/exec.c index 3d6ee06c41..58664ac7c3 100644 --- a/exec.c +++ b/exec.c @@ -3019,11 +3019,12 @@ MemoryRegion *get_system_io(void) /* physical memory access (slow version, mainly for debug) */ #if defined(CONFIG_USER_ONLY) int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, - uint8_t *buf, target_ulong len, int is_write) + void *ptr, target_ulong len, int is_write) { int flags; target_ulong l, page; void * p; + uint8_t *buf = ptr; while (len > 0) { page = addr & TARGET_PAGE_MASK; @@ -3311,7 +3312,7 @@ MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, } } -void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf, +void cpu_physical_memory_rw(hwaddr addr, void *buf, hwaddr len, int is_write) { address_space_rw(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED, @@ -3789,10 +3790,11 @@ address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr, /* virtual memory access for debug (includes writing to ROM) */ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, - uint8_t *buf, target_ulong len, int is_write) + void *ptr, target_ulong len, int is_write) { hwaddr phys_addr; target_ulong l, page; + uint8_t *buf = ptr; cpu_synchronize_state(cpu); while (len > 0) { diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index e96781a455..49e96caa3f 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -388,7 +388,7 @@ void dump_opcount_info(void); #endif /* !CONFIG_USER_ONLY */ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, - uint8_t *buf, target_ulong len, int is_write); + void *ptr, target_ulong len, int is_write); int cpu_exec(CPUState *cpu); diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 81753bbb34..55e5740f8a 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -69,7 +69,7 @@ void qemu_ram_unset_migratable(RAMBlock *rb); size_t qemu_ram_pagesize(RAMBlock *block); size_t qemu_ram_pagesize_largest(void); -void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf, +void cpu_physical_memory_rw(hwaddr addr, void *buf, hwaddr len, int is_write); static inline void cpu_physical_memory_read(hwaddr addr, void *buf, hwaddr len) -- cgit 1.4.1 From ae5883abec539e63f0cf7bf7aa5f44c9b62568e2 Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Wed, 19 Feb 2020 20:12:01 +0100 Subject: exec: Let address_space_unmap() use a boolean 'is_write' argument MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The 'is_write' argument is either 0 or 1. Convert it to a boolean type. Signed-off-by: Philippe Mathieu-Daudé --- exec.c | 4 ++-- include/exec/memory.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'exec.c') diff --git a/exec.c b/exec.c index 58664ac7c3..239239d99d 100644 --- a/exec.c +++ b/exec.c @@ -3598,11 +3598,11 @@ void *address_space_map(AddressSpace *as, } /* Unmaps a memory region previously mapped by address_space_map(). - * Will also mark the memory as dirty if is_write == 1. access_len gives + * Will also mark the memory as dirty if is_write is true. access_len gives * the amount of memory that was actually read or written by the caller. */ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, - int is_write, hwaddr access_len) + bool is_write, hwaddr access_len) { if (buffer != bounce.buffer) { MemoryRegion *mr; diff --git a/include/exec/memory.h b/include/exec/memory.h index afee185eae..1614d9a02c 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -2329,7 +2329,7 @@ void *address_space_map(AddressSpace *as, hwaddr addr, * @is_write: indicates the transfer direction */ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, - int is_write, hwaddr access_len); + bool is_write, hwaddr access_len); /* Internal functions, part of the implementation of address_space_read. */ -- cgit 1.4.1 From 1ccda935d4fcc82a4371dc23d660197b0a6b6951 Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Wed, 19 Feb 2020 20:14:26 +0100 Subject: Let address_space_rw() calls pass a boolean 'is_write' argument MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since its introduction in commit ac1970fbe8, address_space_rw() takes a boolean 'is_write' argument. Fix the codebase by using an explicit boolean type. This commit was produced with the included Coccinelle script scripts/coccinelle/exec_rw_const. Inspired-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé --- exec.c | 4 ++-- hw/net/dp8393x.c | 27 ++++++++++++++------------- hw/net/i82596.c | 11 ++++++----- hw/net/lasi_i82596.c | 4 ++-- scripts/coccinelle/exec_rw_const.cocci | 12 ++++++++++++ target/i386/hvf/vmx.h | 2 +- target/i386/hvf/x86_mmu.c | 8 ++++---- 7 files changed, 41 insertions(+), 27 deletions(-) (limited to 'exec.c') diff --git a/exec.c b/exec.c index 239239d99d..90ac015cb1 100644 --- a/exec.c +++ b/exec.c @@ -3815,8 +3815,8 @@ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, address_space_write_rom(cpu->cpu_ases[asidx].as, phys_addr, attrs, buf, l); } else { - address_space_rw(cpu->cpu_ases[asidx].as, phys_addr, - attrs, buf, l, 0); + address_space_rw(cpu->cpu_ases[asidx].as, phys_addr, attrs, buf, + l, false); } len -= l; buf += l; diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index b461101ceb..b4363e3186 100644 --- a/hw/net/dp8393x.c +++ b/hw/net/dp8393x.c @@ -276,7 +276,7 @@ static void dp8393x_do_load_cam(dp8393xState *s) while (s->regs[SONIC_CDC] & 0x1f) { /* Fill current entry */ address_space_rw(&s->as, dp8393x_cdp(s), - MEMTXATTRS_UNSPECIFIED, s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, false); s->cam[index][0] = dp8393x_get(s, width, 1) & 0xff; s->cam[index][1] = dp8393x_get(s, width, 1) >> 8; s->cam[index][2] = dp8393x_get(s, width, 2) & 0xff; @@ -294,7 +294,7 @@ static void dp8393x_do_load_cam(dp8393xState *s) /* Read CAM enable */ address_space_rw(&s->as, dp8393x_cdp(s), - MEMTXATTRS_UNSPECIFIED, s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, false); s->regs[SONIC_CE] = dp8393x_get(s, width, 0); DPRINTF("load cam done. cam enable mask 0x%04x\n", s->regs[SONIC_CE]); @@ -312,7 +312,7 @@ static void dp8393x_do_read_rra(dp8393xState *s) width = (s->regs[SONIC_DCR] & SONIC_DCR_DW) ? 2 : 1; size = sizeof(uint16_t) * 4 * width; address_space_rw(&s->as, dp8393x_rrp(s), - MEMTXATTRS_UNSPECIFIED, s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, false); /* Update SONIC registers */ s->regs[SONIC_CRBA0] = dp8393x_get(s, width, 0); @@ -427,7 +427,7 @@ static void dp8393x_do_transmit_packets(dp8393xState *s) s->regs[SONIC_TTDA] = s->regs[SONIC_CTDA]; DPRINTF("Transmit packet at %08x\n", dp8393x_ttda(s)); address_space_rw(&s->as, dp8393x_ttda(s) + sizeof(uint16_t) * width, - MEMTXATTRS_UNSPECIFIED, s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, false); tx_len = 0; /* Update registers */ @@ -452,7 +452,8 @@ static void dp8393x_do_transmit_packets(dp8393xState *s) len = sizeof(s->tx_buffer) - tx_len; } address_space_rw(&s->as, dp8393x_tsa(s), - MEMTXATTRS_UNSPECIFIED, &s->tx_buffer[tx_len], len, 0); + MEMTXATTRS_UNSPECIFIED, + &s->tx_buffer[tx_len], len, false); tx_len += len; i++; @@ -461,7 +462,7 @@ static void dp8393x_do_transmit_packets(dp8393xState *s) size = sizeof(uint16_t) * 3 * width; address_space_rw(&s->as, dp8393x_ttda(s) + sizeof(uint16_t) * (4 + 3 * i) * width, - MEMTXATTRS_UNSPECIFIED, s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, false); s->regs[SONIC_TSA0] = dp8393x_get(s, width, 0); s->regs[SONIC_TSA1] = dp8393x_get(s, width, 1); s->regs[SONIC_TFS] = dp8393x_get(s, width, 2); @@ -496,7 +497,7 @@ static void dp8393x_do_transmit_packets(dp8393xState *s) size = sizeof(uint16_t) * width; address_space_rw(&s->as, dp8393x_ttda(s), - MEMTXATTRS_UNSPECIFIED, s->data, size, 1); + MEMTXATTRS_UNSPECIFIED, s->data, size, true); if (!(s->regs[SONIC_CR] & SONIC_CR_HTX)) { /* Read footer of packet */ @@ -505,7 +506,7 @@ static void dp8393x_do_transmit_packets(dp8393xState *s) dp8393x_ttda(s) + sizeof(uint16_t) * (4 + 3 * s->regs[SONIC_TFC]) * width, - MEMTXATTRS_UNSPECIFIED, s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, false); s->regs[SONIC_CTDA] = dp8393x_get(s, width, 0) & ~0x1; if (dp8393x_get(s, width, 0) & 0x1) { /* EOL detected */ @@ -768,7 +769,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, size = sizeof(uint16_t) * 1 * width; address = dp8393x_crda(s) + sizeof(uint16_t) * 5 * width; address_space_rw(&s->as, address, MEMTXATTRS_UNSPECIFIED, - s->data, size, 0); + s->data, size, false); if (dp8393x_get(s, width, 0) & 0x1) { /* Still EOL ; stop reception */ return -1; @@ -790,7 +791,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED, buf, rx_len); address += rx_len; address_space_rw(&s->as, address, - MEMTXATTRS_UNSPECIFIED, &checksum, 4, 1); + MEMTXATTRS_UNSPECIFIED, &checksum, 4, true); rx_len += 4; s->regs[SONIC_CRBA1] = address >> 16; s->regs[SONIC_CRBA0] = address & 0xffff; @@ -819,12 +820,12 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, dp8393x_put(s, width, 4, s->regs[SONIC_RSC]); /* seq_no */ size = sizeof(uint16_t) * 5 * width; address_space_rw(&s->as, dp8393x_crda(s), - MEMTXATTRS_UNSPECIFIED, s->data, size, 1); + MEMTXATTRS_UNSPECIFIED, s->data, size, true); /* Move to next descriptor */ size = sizeof(uint16_t) * width; address_space_rw(&s->as, dp8393x_crda(s) + sizeof(uint16_t) * 5 * width, - MEMTXATTRS_UNSPECIFIED, s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, false); s->regs[SONIC_LLFA] = dp8393x_get(s, width, 0); if (s->regs[SONIC_LLFA] & 0x1) { /* EOL detected */ @@ -838,7 +839,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, } s->data[0] = 0; address_space_rw(&s->as, offset, MEMTXATTRS_UNSPECIFIED, - s->data, sizeof(uint16_t), 1); + s->data, sizeof(uint16_t), true); s->regs[SONIC_CRDA] = s->regs[SONIC_LLFA]; s->regs[SONIC_ISR] |= SONIC_ISR_PKTRX; s->regs[SONIC_RSC] = (s->regs[SONIC_RSC] & 0xff00) | (((s->regs[SONIC_RSC] & 0x00ff) + 1) & 0x00ff); diff --git a/hw/net/i82596.c b/hw/net/i82596.c index a292984e06..11537f72d1 100644 --- a/hw/net/i82596.c +++ b/hw/net/i82596.c @@ -149,7 +149,7 @@ static void i82596_transmit(I82596State *s, uint32_t addr) if (s->nic && len) { assert(len <= sizeof(s->tx_buffer)); address_space_rw(&address_space_memory, tba, - MEMTXATTRS_UNSPECIFIED, s->tx_buffer, len, 0); + MEMTXATTRS_UNSPECIFIED, s->tx_buffer, len, false); DBG(PRINT_PKTHDR("Send", &s->tx_buffer)); DBG(printf("Sending %d bytes\n", len)); qemu_send_packet(qemu_get_queue(s->nic), s->tx_buffer, len); @@ -173,7 +173,7 @@ static void set_individual_address(I82596State *s, uint32_t addr) nc = qemu_get_queue(s->nic); m = s->conf.macaddr.a; address_space_rw(&address_space_memory, addr + 8, - MEMTXATTRS_UNSPECIFIED, m, ETH_ALEN, 0); + MEMTXATTRS_UNSPECIFIED, m, ETH_ALEN, false); qemu_format_nic_info_str(nc, m); trace_i82596_new_mac(nc->info_str); } @@ -192,7 +192,7 @@ static void set_multicast_list(I82596State *s, uint32_t addr) uint8_t multicast_addr[ETH_ALEN]; address_space_rw(&address_space_memory, addr + i * ETH_ALEN, MEMTXATTRS_UNSPECIFIED, - multicast_addr, ETH_ALEN, 0); + multicast_addr, ETH_ALEN, false); DBG(printf("Add multicast entry " MAC_FMT "\n", MAC_ARG(multicast_addr))); unsigned mcast_idx = (net_crc32(multicast_addr, ETH_ALEN) & @@ -261,7 +261,8 @@ static void command_loop(I82596State *s) byte_cnt = MIN(byte_cnt, sizeof(s->config)); /* copy byte_cnt max. */ address_space_rw(&address_space_memory, s->cmd_p + 8, - MEMTXATTRS_UNSPECIFIED, s->config, byte_cnt, 0); + MEMTXATTRS_UNSPECIFIED, s->config, byte_cnt, + false); /* config byte according to page 35ff */ s->config[2] &= 0x82; /* mask valid bits */ s->config[2] |= 0x40; @@ -647,7 +648,7 @@ ssize_t i82596_receive(NetClientState *nc, const uint8_t *buf, size_t sz) len -= num; if (len == 0) { /* copy crc */ address_space_rw(&address_space_memory, rba - 4, - MEMTXATTRS_UNSPECIFIED, crc_ptr, 4, 1); + MEMTXATTRS_UNSPECIFIED, crc_ptr, 4, true); } num |= 0x4000; /* set F BIT */ diff --git a/hw/net/lasi_i82596.c b/hw/net/lasi_i82596.c index 427b3fbf70..8bff419378 100644 --- a/hw/net/lasi_i82596.c +++ b/hw/net/lasi_i82596.c @@ -55,8 +55,8 @@ static void lasi_82596_mem_write(void *opaque, hwaddr addr, * Provided for SeaBIOS only. Write MAC of Network card to addr @val. * Needed for the PDC_LAN_STATION_ID_READ PDC call. */ - address_space_rw(&address_space_memory, val, - MEMTXATTRS_UNSPECIFIED, d->state.conf.macaddr.a, ETH_ALEN, 1); + address_space_rw(&address_space_memory, val, MEMTXATTRS_UNSPECIFIED, + d->state.conf.macaddr.a, ETH_ALEN, true); break; } } diff --git a/scripts/coccinelle/exec_rw_const.cocci b/scripts/coccinelle/exec_rw_const.cocci index 9c14165fc0..493d79cd13 100644 --- a/scripts/coccinelle/exec_rw_const.cocci +++ b/scripts/coccinelle/exec_rw_const.cocci @@ -9,6 +9,18 @@ --dir . */ +// Convert to boolean +@@ +expression E1, E2, E3, E4, E5; +@@ +( +- address_space_rw(E1, E2, E3, E4, E5, 0) ++ address_space_rw(E1, E2, E3, E4, E5, false) +| +- address_space_rw(E1, E2, E3, E4, E5, 1) ++ address_space_rw(E1, E2, E3, E4, E5, true) +) + // Use address_space_write instead of casting to non-const @@ type T; diff --git a/target/i386/hvf/vmx.h b/target/i386/hvf/vmx.h index a115ca1782..19af029133 100644 --- a/target/i386/hvf/vmx.h +++ b/target/i386/hvf/vmx.h @@ -128,7 +128,7 @@ static inline void macvm_set_cr0(hv_vcpuid_t vcpu, uint64_t cr0) address_space_rw(&address_space_memory, rvmcs(vcpu, VMCS_GUEST_CR3) & ~0x1f, MEMTXATTRS_UNSPECIFIED, - pdpte, 32, 0); + pdpte, 32, false); /* Only set PDPTE when appropriate. */ for (i = 0; i < 4; i++) { wvmcs(vcpu, VMCS_GUEST_PDPTE0 + i * 2, pdpte[i]); diff --git a/target/i386/hvf/x86_mmu.c b/target/i386/hvf/x86_mmu.c index 6a620643c1..451dcc983a 100644 --- a/target/i386/hvf/x86_mmu.c +++ b/target/i386/hvf/x86_mmu.c @@ -89,7 +89,7 @@ static bool get_pt_entry(struct CPUState *cpu, struct gpt_translation *pt, index = gpt_entry(pt->gva, level, pae); address_space_rw(&address_space_memory, gpa + index * pte_size(pae), - MEMTXATTRS_UNSPECIFIED, &pte, pte_size(pae), 0); + MEMTXATTRS_UNSPECIFIED, &pte, pte_size(pae), false); pt->pte[level - 1] = pte; @@ -238,8 +238,8 @@ void vmx_write_mem(struct CPUState *cpu, target_ulong gva, void *data, int bytes if (!mmu_gva_to_gpa(cpu, gva, &gpa)) { VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva); } else { - address_space_rw(&address_space_memory, gpa, MEMTXATTRS_UNSPECIFIED, - data, copy, 1); + address_space_rw(&address_space_memory, gpa, + MEMTXATTRS_UNSPECIFIED, data, copy, true); } bytes -= copy; @@ -260,7 +260,7 @@ void vmx_read_mem(struct CPUState *cpu, void *data, target_ulong gva, int bytes) VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva); } address_space_rw(&address_space_memory, gpa, MEMTXATTRS_UNSPECIFIED, - data, copy, 0); + data, copy, false); bytes -= copy; gva += copy; -- cgit 1.4.1 From 19f703477314a5db09ffc3c0f6be9c45645f8302 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Tue, 18 Feb 2020 11:24:57 +0000 Subject: Avoid address_space_rw() with a constant is_write argument MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The address_space_rw() function allows either reads or writes depending on the is_write argument passed to it; this is useful when the direction of the access is determined programmatically (as for instance when handling the KVM_EXIT_MMIO exit reason). Under the hood it just calls either address_space_write() or address_space_read_full(). We also use it a lot with a constant is_write argument, though, which has two issues: * when reading "address_space_rw(..., 1)" this is less immediately clear to the reader as being a write than "address_space_write(...)" * calling address_space_rw() bypasses the optimization in address_space_read() that fast-paths reads of a fixed length This commit was produced with the included Coccinelle script scripts/coccinelle/exec_rw_const.cocci. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias Reviewed-by: Laurent Vivier Reviewed-by: Cédric Le Goater Acked-by: Christian Borntraeger Reviewed-by: Cornelia Huck Reviewed-by: Alistair Francis Acked-by: David Gibson Message-Id: <20200218112457.22712-1-peter.maydell@linaro.org> [PMD: Update macvm_set_cr0() reported by Laurent Vivier] Signed-off-by: Philippe Mathieu-Daudé --- accel/kvm/kvm-all.c | 6 +-- dma-helpers.c | 4 +- exec.c | 4 +- hw/dma/xlnx-zdma.c | 11 ++---- hw/net/dp8393x.c | 70 ++++++++++++++++++---------------- hw/net/i82596.c | 22 +++++------ hw/net/lasi_i82596.c | 5 ++- hw/ppc/pnv_lpc.c | 8 ++-- hw/s390x/css.c | 12 +++--- qtest.c | 52 ++++++++++++------------- scripts/coccinelle/exec_rw_const.cocci | 13 +++++++ target/i386/hvf/vmx.h | 7 ++-- target/i386/hvf/x86_mmu.c | 12 +++--- 13 files changed, 119 insertions(+), 107 deletions(-) (limited to 'exec.c') diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index c111312dfd..0cfe6fd8de 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -2178,9 +2178,9 @@ void kvm_flush_coalesced_mmio_buffer(void) ent = &ring->coalesced_mmio[ring->first]; if (ent->pio == 1) { - address_space_rw(&address_space_io, ent->phys_addr, - MEMTXATTRS_UNSPECIFIED, ent->data, - ent->len, true); + address_space_write(&address_space_io, ent->phys_addr, + MEMTXATTRS_UNSPECIFIED, ent->data, + ent->len); } else { cpu_physical_memory_write(ent->phys_addr, ent->data, ent->len); } diff --git a/dma-helpers.c b/dma-helpers.c index d3871dc61e..e8a26e81e1 100644 --- a/dma-helpers.c +++ b/dma-helpers.c @@ -28,8 +28,8 @@ int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len) memset(fillbuf, c, FILLBUF_SIZE); while (len > 0) { l = len < FILLBUF_SIZE ? len : FILLBUF_SIZE; - error |= address_space_rw(as, addr, MEMTXATTRS_UNSPECIFIED, - fillbuf, l, true); + error |= address_space_write(as, addr, MEMTXATTRS_UNSPECIFIED, + fillbuf, l); len -= l; addr += l; } diff --git a/exec.c b/exec.c index 90ac015cb1..ec6e460384 100644 --- a/exec.c +++ b/exec.c @@ -3815,8 +3815,8 @@ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, address_space_write_rom(cpu->cpu_ases[asidx].as, phys_addr, attrs, buf, l); } else { - address_space_rw(cpu->cpu_ases[asidx].as, phys_addr, attrs, buf, - l, false); + address_space_read(cpu->cpu_ases[asidx].as, phys_addr, attrs, buf, + l); } len -= l; buf += l; diff --git a/hw/dma/xlnx-zdma.c b/hw/dma/xlnx-zdma.c index 683abbe53f..1c1b142293 100644 --- a/hw/dma/xlnx-zdma.c +++ b/hw/dma/xlnx-zdma.c @@ -311,8 +311,7 @@ static bool zdma_load_descriptor(XlnxZDMA *s, uint64_t addr, void *buf) return false; } - address_space_rw(s->dma_as, addr, s->attr, - buf, sizeof(XlnxZDMADescr), false); + address_space_read(s->dma_as, addr, s->attr, buf, sizeof(XlnxZDMADescr)); return true; } @@ -364,7 +363,7 @@ static uint64_t zdma_update_descr_addr(XlnxZDMA *s, bool type, } else { addr = zdma_get_regaddr64(s, basereg); addr += sizeof(s->dsc_dst); - address_space_rw(s->dma_as, addr, s->attr, &next, 8, false); + address_space_read(s->dma_as, addr, s->attr, &next, 8); zdma_put_regaddr64(s, basereg, next); } return next; @@ -416,8 +415,7 @@ static void zdma_write_dst(XlnxZDMA *s, uint8_t *buf, uint32_t len) } } - address_space_rw(s->dma_as, s->dsc_dst.addr, s->attr, buf, dlen, - true); + address_space_write(s->dma_as, s->dsc_dst.addr, s->attr, buf, dlen); if (burst_type == AXI_BURST_INCR) { s->dsc_dst.addr += dlen; } @@ -493,8 +491,7 @@ static void zdma_process_descr(XlnxZDMA *s) len = s->cfg.bus_width / 8; } } else { - address_space_rw(s->dma_as, src_addr, s->attr, s->buf, len, - false); + address_space_read(s->dma_as, src_addr, s->attr, s->buf, len); if (burst_type == AXI_BURST_INCR) { src_addr += len; } diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index b4363e3186..70451934ae 100644 --- a/hw/net/dp8393x.c +++ b/hw/net/dp8393x.c @@ -275,8 +275,8 @@ static void dp8393x_do_load_cam(dp8393xState *s) while (s->regs[SONIC_CDC] & 0x1f) { /* Fill current entry */ - address_space_rw(&s->as, dp8393x_cdp(s), - MEMTXATTRS_UNSPECIFIED, s->data, size, false); + address_space_read(&s->as, dp8393x_cdp(s), + MEMTXATTRS_UNSPECIFIED, s->data, size); s->cam[index][0] = dp8393x_get(s, width, 1) & 0xff; s->cam[index][1] = dp8393x_get(s, width, 1) >> 8; s->cam[index][2] = dp8393x_get(s, width, 2) & 0xff; @@ -293,8 +293,8 @@ static void dp8393x_do_load_cam(dp8393xState *s) } /* Read CAM enable */ - address_space_rw(&s->as, dp8393x_cdp(s), - MEMTXATTRS_UNSPECIFIED, s->data, size, false); + address_space_read(&s->as, dp8393x_cdp(s), + MEMTXATTRS_UNSPECIFIED, s->data, size); s->regs[SONIC_CE] = dp8393x_get(s, width, 0); DPRINTF("load cam done. cam enable mask 0x%04x\n", s->regs[SONIC_CE]); @@ -311,8 +311,8 @@ static void dp8393x_do_read_rra(dp8393xState *s) /* Read memory */ width = (s->regs[SONIC_DCR] & SONIC_DCR_DW) ? 2 : 1; size = sizeof(uint16_t) * 4 * width; - address_space_rw(&s->as, dp8393x_rrp(s), - MEMTXATTRS_UNSPECIFIED, s->data, size, false); + address_space_read(&s->as, dp8393x_rrp(s), + MEMTXATTRS_UNSPECIFIED, s->data, size); /* Update SONIC registers */ s->regs[SONIC_CRBA0] = dp8393x_get(s, width, 0); @@ -426,8 +426,8 @@ static void dp8393x_do_transmit_packets(dp8393xState *s) size = sizeof(uint16_t) * 6 * width; s->regs[SONIC_TTDA] = s->regs[SONIC_CTDA]; DPRINTF("Transmit packet at %08x\n", dp8393x_ttda(s)); - address_space_rw(&s->as, dp8393x_ttda(s) + sizeof(uint16_t) * width, - MEMTXATTRS_UNSPECIFIED, s->data, size, false); + address_space_read(&s->as, dp8393x_ttda(s) + sizeof(uint16_t) * width, + MEMTXATTRS_UNSPECIFIED, s->data, size); tx_len = 0; /* Update registers */ @@ -451,18 +451,19 @@ static void dp8393x_do_transmit_packets(dp8393xState *s) if (tx_len + len > sizeof(s->tx_buffer)) { len = sizeof(s->tx_buffer) - tx_len; } - address_space_rw(&s->as, dp8393x_tsa(s), - MEMTXATTRS_UNSPECIFIED, - &s->tx_buffer[tx_len], len, false); + address_space_read(&s->as, dp8393x_tsa(s), MEMTXATTRS_UNSPECIFIED, + &s->tx_buffer[tx_len], len); tx_len += len; i++; if (i != s->regs[SONIC_TFC]) { /* Read next fragment details */ size = sizeof(uint16_t) * 3 * width; - address_space_rw(&s->as, - dp8393x_ttda(s) + sizeof(uint16_t) * (4 + 3 * i) * width, - MEMTXATTRS_UNSPECIFIED, s->data, size, false); + address_space_read(&s->as, + dp8393x_ttda(s) + + sizeof(uint16_t) * width * (4 + 3 * i), + MEMTXATTRS_UNSPECIFIED, s->data, + size); s->regs[SONIC_TSA0] = dp8393x_get(s, width, 0); s->regs[SONIC_TSA1] = dp8393x_get(s, width, 1); s->regs[SONIC_TFS] = dp8393x_get(s, width, 2); @@ -495,18 +496,18 @@ static void dp8393x_do_transmit_packets(dp8393xState *s) dp8393x_put(s, width, 0, s->regs[SONIC_TCR] & 0x0fff); /* status */ size = sizeof(uint16_t) * width; - address_space_rw(&s->as, - dp8393x_ttda(s), - MEMTXATTRS_UNSPECIFIED, s->data, size, true); + address_space_write(&s->as, dp8393x_ttda(s), + MEMTXATTRS_UNSPECIFIED, s->data, size); if (!(s->regs[SONIC_CR] & SONIC_CR_HTX)) { /* Read footer of packet */ size = sizeof(uint16_t) * width; - address_space_rw(&s->as, - dp8393x_ttda(s) + - sizeof(uint16_t) * - (4 + 3 * s->regs[SONIC_TFC]) * width, - MEMTXATTRS_UNSPECIFIED, s->data, size, false); + address_space_read(&s->as, + dp8393x_ttda(s) + + sizeof(uint16_t) * width + * (4 + 3 * s->regs[SONIC_TFC]), + MEMTXATTRS_UNSPECIFIED, s->data, + size); s->regs[SONIC_CTDA] = dp8393x_get(s, width, 0) & ~0x1; if (dp8393x_get(s, width, 0) & 0x1) { /* EOL detected */ @@ -768,8 +769,8 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, /* Are we still in resource exhaustion? */ size = sizeof(uint16_t) * 1 * width; address = dp8393x_crda(s) + sizeof(uint16_t) * 5 * width; - address_space_rw(&s->as, address, MEMTXATTRS_UNSPECIFIED, - s->data, size, false); + address_space_read(&s->as, address, MEMTXATTRS_UNSPECIFIED, + s->data, size); if (dp8393x_get(s, width, 0) & 0x1) { /* Still EOL ; stop reception */ return -1; @@ -788,10 +789,11 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, /* Put packet into RBA */ DPRINTF("Receive packet at %08x\n", dp8393x_crba(s)); address = dp8393x_crba(s); - address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED, buf, rx_len); + address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED, + buf, rx_len); address += rx_len; - address_space_rw(&s->as, address, - MEMTXATTRS_UNSPECIFIED, &checksum, 4, true); + address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED, + &checksum, 4); rx_len += 4; s->regs[SONIC_CRBA1] = address >> 16; s->regs[SONIC_CRBA0] = address & 0xffff; @@ -819,13 +821,15 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, dp8393x_put(s, width, 3, s->regs[SONIC_TRBA1]); /* pkt_ptr1 */ dp8393x_put(s, width, 4, s->regs[SONIC_RSC]); /* seq_no */ size = sizeof(uint16_t) * 5 * width; - address_space_rw(&s->as, dp8393x_crda(s), - MEMTXATTRS_UNSPECIFIED, s->data, size, true); + address_space_write(&s->as, dp8393x_crda(s), + MEMTXATTRS_UNSPECIFIED, + s->data, size); /* Move to next descriptor */ size = sizeof(uint16_t) * width; - address_space_rw(&s->as, dp8393x_crda(s) + sizeof(uint16_t) * 5 * width, - MEMTXATTRS_UNSPECIFIED, s->data, size, false); + address_space_read(&s->as, + dp8393x_crda(s) + sizeof(uint16_t) * 5 * width, + MEMTXATTRS_UNSPECIFIED, s->data, size); s->regs[SONIC_LLFA] = dp8393x_get(s, width, 0); if (s->regs[SONIC_LLFA] & 0x1) { /* EOL detected */ @@ -838,8 +842,8 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, offset += sizeof(uint16_t); } s->data[0] = 0; - address_space_rw(&s->as, offset, MEMTXATTRS_UNSPECIFIED, - s->data, sizeof(uint16_t), true); + address_space_write(&s->as, offset, MEMTXATTRS_UNSPECIFIED, + s->data, sizeof(uint16_t)); s->regs[SONIC_CRDA] = s->regs[SONIC_LLFA]; s->regs[SONIC_ISR] |= SONIC_ISR_PKTRX; s->regs[SONIC_RSC] = (s->regs[SONIC_RSC] & 0xff00) | (((s->regs[SONIC_RSC] & 0x00ff) + 1) & 0x00ff); diff --git a/hw/net/i82596.c b/hw/net/i82596.c index 11537f72d1..fe9f2390a9 100644 --- a/hw/net/i82596.c +++ b/hw/net/i82596.c @@ -148,8 +148,8 @@ static void i82596_transmit(I82596State *s, uint32_t addr) if (s->nic && len) { assert(len <= sizeof(s->tx_buffer)); - address_space_rw(&address_space_memory, tba, - MEMTXATTRS_UNSPECIFIED, s->tx_buffer, len, false); + address_space_read(&address_space_memory, tba, + MEMTXATTRS_UNSPECIFIED, s->tx_buffer, len); DBG(PRINT_PKTHDR("Send", &s->tx_buffer)); DBG(printf("Sending %d bytes\n", len)); qemu_send_packet(qemu_get_queue(s->nic), s->tx_buffer, len); @@ -172,8 +172,8 @@ static void set_individual_address(I82596State *s, uint32_t addr) nc = qemu_get_queue(s->nic); m = s->conf.macaddr.a; - address_space_rw(&address_space_memory, addr + 8, - MEMTXATTRS_UNSPECIFIED, m, ETH_ALEN, false); + address_space_read(&address_space_memory, addr + 8, + MEMTXATTRS_UNSPECIFIED, m, ETH_ALEN); qemu_format_nic_info_str(nc, m); trace_i82596_new_mac(nc->info_str); } @@ -190,9 +190,8 @@ static void set_multicast_list(I82596State *s, uint32_t addr) } for (i = 0; i < mc_count; i++) { uint8_t multicast_addr[ETH_ALEN]; - address_space_rw(&address_space_memory, - addr + i * ETH_ALEN, MEMTXATTRS_UNSPECIFIED, - multicast_addr, ETH_ALEN, false); + address_space_read(&address_space_memory, addr + i * ETH_ALEN, + MEMTXATTRS_UNSPECIFIED, multicast_addr, ETH_ALEN); DBG(printf("Add multicast entry " MAC_FMT "\n", MAC_ARG(multicast_addr))); unsigned mcast_idx = (net_crc32(multicast_addr, ETH_ALEN) & @@ -260,9 +259,8 @@ static void command_loop(I82596State *s) byte_cnt = MAX(byte_cnt, 4); byte_cnt = MIN(byte_cnt, sizeof(s->config)); /* copy byte_cnt max. */ - address_space_rw(&address_space_memory, s->cmd_p + 8, - MEMTXATTRS_UNSPECIFIED, s->config, byte_cnt, - false); + address_space_read(&address_space_memory, s->cmd_p + 8, + MEMTXATTRS_UNSPECIFIED, s->config, byte_cnt); /* config byte according to page 35ff */ s->config[2] &= 0x82; /* mask valid bits */ s->config[2] |= 0x40; @@ -647,8 +645,8 @@ ssize_t i82596_receive(NetClientState *nc, const uint8_t *buf, size_t sz) buf += num; len -= num; if (len == 0) { /* copy crc */ - address_space_rw(&address_space_memory, rba - 4, - MEMTXATTRS_UNSPECIFIED, crc_ptr, 4, true); + address_space_write(&address_space_memory, rba - 4, + MEMTXATTRS_UNSPECIFIED, crc_ptr, 4); } num |= 0x4000; /* set F BIT */ diff --git a/hw/net/lasi_i82596.c b/hw/net/lasi_i82596.c index 8bff419378..52637a562d 100644 --- a/hw/net/lasi_i82596.c +++ b/hw/net/lasi_i82596.c @@ -55,8 +55,9 @@ static void lasi_82596_mem_write(void *opaque, hwaddr addr, * Provided for SeaBIOS only. Write MAC of Network card to addr @val. * Needed for the PDC_LAN_STATION_ID_READ PDC call. */ - address_space_rw(&address_space_memory, val, MEMTXATTRS_UNSPECIFIED, - d->state.conf.macaddr.a, ETH_ALEN, true); + address_space_write(&address_space_memory, val, + MEMTXATTRS_UNSPECIFIED, d->state.conf.macaddr.a, + ETH_ALEN); break; } } diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c index 5989d723c5..f150deca34 100644 --- a/hw/ppc/pnv_lpc.c +++ b/hw/ppc/pnv_lpc.c @@ -238,16 +238,16 @@ static bool opb_read(PnvLpcController *lpc, uint32_t addr, uint8_t *data, int sz) { /* XXX Handle access size limits and FW read caching here */ - return !address_space_rw(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED, - data, sz, false); + return !address_space_read(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED, + data, sz); } static bool opb_write(PnvLpcController *lpc, uint32_t addr, uint8_t *data, int sz) { /* XXX Handle access size limits here */ - return !address_space_rw(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED, - data, sz, true); + return !address_space_write(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED, + data, sz); } #define ECCB_CTL_READ PPC_BIT(15) diff --git a/hw/s390x/css.c b/hw/s390x/css.c index f27f8c45a5..5d8e08667e 100644 --- a/hw/s390x/css.c +++ b/hw/s390x/css.c @@ -874,18 +874,18 @@ static inline int ida_read_next_idaw(CcwDataStream *cds) if (idaw_addr & 0x07 || !cds_ccw_addrs_ok(idaw_addr, 0, ccw_fmt1)) { return -EINVAL; /* channel program check */ } - ret = address_space_rw(&address_space_memory, idaw_addr, - MEMTXATTRS_UNSPECIFIED, &idaw.fmt2, - sizeof(idaw.fmt2), false); + ret = address_space_read(&address_space_memory, idaw_addr, + MEMTXATTRS_UNSPECIFIED, &idaw.fmt2, + sizeof(idaw.fmt2)); cds->cda = be64_to_cpu(idaw.fmt2); } else { idaw_addr = cds->cda_orig + sizeof(idaw.fmt1) * cds->at_idaw; if (idaw_addr & 0x03 || !cds_ccw_addrs_ok(idaw_addr, 0, ccw_fmt1)) { return -EINVAL; /* channel program check */ } - ret = address_space_rw(&address_space_memory, idaw_addr, - MEMTXATTRS_UNSPECIFIED, &idaw.fmt1, - sizeof(idaw.fmt1), false); + ret = address_space_read(&address_space_memory, idaw_addr, + MEMTXATTRS_UNSPECIFIED, &idaw.fmt1, + sizeof(idaw.fmt1)); cds->cda = be64_to_cpu(idaw.fmt1); if (cds->cda & 0x80000000) { return -EINVAL; /* channel program check */ diff --git a/qtest.c b/qtest.c index 65e33b80e3..dcb57498ad 100644 --- a/qtest.c +++ b/qtest.c @@ -429,23 +429,23 @@ static void qtest_process_command(CharBackend *chr, gchar **words) if (words[0][5] == 'b') { uint8_t data = value; - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 1, true); + address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, + &data, 1); } else if (words[0][5] == 'w') { uint16_t data = value; tswap16s(&data); - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 2, true); + address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, + &data, 2); } else if (words[0][5] == 'l') { uint32_t data = value; tswap32s(&data); - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 4, true); + address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, + &data, 4); } else if (words[0][5] == 'q') { uint64_t data = value; tswap64s(&data); - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 8, true); + address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, + &data, 8); } qtest_send_prefix(chr); qtest_send(chr, "OK\n"); @@ -463,22 +463,22 @@ static void qtest_process_command(CharBackend *chr, gchar **words) if (words[0][4] == 'b') { uint8_t data; - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 1, false); + address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, + &data, 1); value = data; } else if (words[0][4] == 'w') { uint16_t data; - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 2, false); + address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, + &data, 2); value = tswap16(data); } else if (words[0][4] == 'l') { uint32_t data; - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 4, false); + address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, + &data, 4); value = tswap32(data); } else if (words[0][4] == 'q') { - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &value, 8, false); + address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, + &value, 8); tswap64s(&value); } qtest_send_prefix(chr); @@ -498,8 +498,8 @@ static void qtest_process_command(CharBackend *chr, gchar **words) g_assert(len); data = g_malloc(len); - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - data, len, false); + address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data, + len); enc = g_malloc(2 * len + 1); for (i = 0; i < len; i++) { @@ -524,8 +524,8 @@ static void qtest_process_command(CharBackend *chr, gchar **words) g_assert(ret == 0); data = g_malloc(len); - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - data, len, false); + address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data, + len); b64_data = g_base64_encode(data, len); qtest_send_prefix(chr); qtest_sendf(chr, "OK %s\n", b64_data); @@ -559,8 +559,8 @@ static void qtest_process_command(CharBackend *chr, gchar **words) data[i] = 0; } } - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - data, len, true); + address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data, + len); g_free(data); qtest_send_prefix(chr); @@ -582,8 +582,8 @@ static void qtest_process_command(CharBackend *chr, gchar **words) if (len) { data = g_malloc(len); memset(data, pattern, len); - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - data, len, true); + address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, + data, len); g_free(data); } @@ -616,8 +616,8 @@ static void qtest_process_command(CharBackend *chr, gchar **words) out_len = MIN(out_len, len); } - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - data, len, true); + address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data, + len); qtest_send_prefix(chr); qtest_send(chr, "OK\n"); diff --git a/scripts/coccinelle/exec_rw_const.cocci b/scripts/coccinelle/exec_rw_const.cocci index 493d79cd13..4f0e634b3c 100644 --- a/scripts/coccinelle/exec_rw_const.cocci +++ b/scripts/coccinelle/exec_rw_const.cocci @@ -35,6 +35,19 @@ expression E1, E2, E3, E4; + address_space_write(E1, E2, E3, V, E4) ) +// Avoid uses of address_space_rw() with a constant is_write argument. +@@ +expression E1, E2, E3, E4, E5; +symbol true, false; +@@ +( +- address_space_rw(E1, E2, E3, E4, E5, false) ++ address_space_read(E1, E2, E3, E4, E5) +| +- address_space_rw(E1, E2, E3, E4, E5, true) ++ address_space_write(E1, E2, E3, E4, E5) +) + // Remove useless cast @@ expression E1, E2, E3, E4, E5, E6; diff --git a/target/i386/hvf/vmx.h b/target/i386/hvf/vmx.h index 19af029133..03d2c79b9c 100644 --- a/target/i386/hvf/vmx.h +++ b/target/i386/hvf/vmx.h @@ -125,10 +125,9 @@ static inline void macvm_set_cr0(hv_vcpuid_t vcpu, uint64_t cr0) if ((cr0 & CR0_PG) && (rvmcs(vcpu, VMCS_GUEST_CR4) & CR4_PAE) && !(efer & MSR_EFER_LME)) { - address_space_rw(&address_space_memory, - rvmcs(vcpu, VMCS_GUEST_CR3) & ~0x1f, - MEMTXATTRS_UNSPECIFIED, - pdpte, 32, false); + address_space_read(&address_space_memory, + rvmcs(vcpu, VMCS_GUEST_CR3) & ~0x1f, + MEMTXATTRS_UNSPECIFIED, pdpte, 32); /* Only set PDPTE when appropriate. */ for (i = 0; i < 4; i++) { wvmcs(vcpu, VMCS_GUEST_PDPTE0 + i * 2, pdpte[i]); diff --git a/target/i386/hvf/x86_mmu.c b/target/i386/hvf/x86_mmu.c index 451dcc983a..65d4603dbf 100644 --- a/target/i386/hvf/x86_mmu.c +++ b/target/i386/hvf/x86_mmu.c @@ -88,8 +88,8 @@ static bool get_pt_entry(struct CPUState *cpu, struct gpt_translation *pt, } index = gpt_entry(pt->gva, level, pae); - address_space_rw(&address_space_memory, gpa + index * pte_size(pae), - MEMTXATTRS_UNSPECIFIED, &pte, pte_size(pae), false); + address_space_read(&address_space_memory, gpa + index * pte_size(pae), + MEMTXATTRS_UNSPECIFIED, &pte, pte_size(pae)); pt->pte[level - 1] = pte; @@ -238,8 +238,8 @@ void vmx_write_mem(struct CPUState *cpu, target_ulong gva, void *data, int bytes if (!mmu_gva_to_gpa(cpu, gva, &gpa)) { VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva); } else { - address_space_rw(&address_space_memory, gpa, - MEMTXATTRS_UNSPECIFIED, data, copy, true); + address_space_write(&address_space_memory, gpa, + MEMTXATTRS_UNSPECIFIED, data, copy); } bytes -= copy; @@ -259,8 +259,8 @@ void vmx_read_mem(struct CPUState *cpu, void *data, target_ulong gva, int bytes) if (!mmu_gva_to_gpa(cpu, gva, &gpa)) { VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva); } - address_space_rw(&address_space_memory, gpa, MEMTXATTRS_UNSPECIFIED, - data, copy, false); + address_space_read(&address_space_memory, gpa, MEMTXATTRS_UNSPECIFIED, + data, copy); bytes -= copy; gva += copy; -- cgit 1.4.1 From 28c80bfe8b9c2343d5b6a488cf013352d8ea59d1 Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Wed, 19 Feb 2020 20:32:30 +0100 Subject: exec: Let cpu_[physical]_memory API use a boolean 'is_write' argument MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The 'is_write' argument is either 0 or 1. Convert it to a boolean type. Signed-off-by: Philippe Mathieu-Daudé --- exec.c | 10 +++++----- include/exec/cpu-all.h | 2 +- include/exec/cpu-common.h | 6 +++--- 3 files changed, 9 insertions(+), 9 deletions(-) (limited to 'exec.c') diff --git a/exec.c b/exec.c index ec6e460384..758af30cdf 100644 --- a/exec.c +++ b/exec.c @@ -3019,7 +3019,7 @@ MemoryRegion *get_system_io(void) /* physical memory access (slow version, mainly for debug) */ #if defined(CONFIG_USER_ONLY) int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, - void *ptr, target_ulong len, int is_write) + void *ptr, target_ulong len, bool is_write) { int flags; target_ulong l, page; @@ -3313,7 +3313,7 @@ MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, } void cpu_physical_memory_rw(hwaddr addr, void *buf, - hwaddr len, int is_write) + hwaddr len, bool is_write) { address_space_rw(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED, buf, len, is_write); @@ -3632,14 +3632,14 @@ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, void *cpu_physical_memory_map(hwaddr addr, hwaddr *plen, - int is_write) + bool is_write) { return address_space_map(&address_space_memory, addr, plen, is_write, MEMTXATTRS_UNSPECIFIED); } void cpu_physical_memory_unmap(void *buffer, hwaddr len, - int is_write, hwaddr access_len) + bool is_write, hwaddr access_len) { return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len); } @@ -3790,7 +3790,7 @@ address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr, /* virtual memory access for debug (includes writing to ROM) */ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, - void *ptr, target_ulong len, int is_write) + void *ptr, target_ulong len, bool is_write) { hwaddr phys_addr; target_ulong l, page; diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 49e96caa3f..49384bb66a 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -388,7 +388,7 @@ void dump_opcount_info(void); #endif /* !CONFIG_USER_ONLY */ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, - void *ptr, target_ulong len, int is_write); + void *ptr, target_ulong len, bool is_write); int cpu_exec(CPUState *cpu); diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 55e5740f8a..d127d8497a 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -70,7 +70,7 @@ size_t qemu_ram_pagesize(RAMBlock *block); size_t qemu_ram_pagesize_largest(void); void cpu_physical_memory_rw(hwaddr addr, void *buf, - hwaddr len, int is_write); + hwaddr len, bool is_write); static inline void cpu_physical_memory_read(hwaddr addr, void *buf, hwaddr len) { @@ -83,9 +83,9 @@ static inline void cpu_physical_memory_write(hwaddr addr, } void *cpu_physical_memory_map(hwaddr addr, hwaddr *plen, - int is_write); + bool is_write); void cpu_physical_memory_unmap(void *buffer, hwaddr len, - int is_write, hwaddr access_len); + bool is_write, hwaddr access_len); void cpu_register_map_client(QEMUBH *bh); void cpu_unregister_map_client(QEMUBH *bh); -- cgit 1.4.1