From 84142184899322c2dca931e36abca7a35a2827cd Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Sat, 6 Sep 2025 06:09:44 +0200 Subject: accel/tcg: Move post-load tb_flush to vm_change_state hook MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We need not call tb_flush once per cpu, only once per vmload. By moving the call from cpu_common_post_load to a tcg-specific vm_change_state_handler, we do even better than that: we only flush when called from HMP triggered loadvm, when we had old state to flush. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- hw/core/cpu-system.c | 9 --------- 1 file changed, 9 deletions(-) (limited to 'hw/core/cpu-system.c') diff --git a/hw/core/cpu-system.c b/hw/core/cpu-system.c index 09c928c1f9..f601a083d1 100644 --- a/hw/core/cpu-system.c +++ b/hw/core/cpu-system.c @@ -23,7 +23,6 @@ #include "system/address-spaces.h" #include "exec/cputlb.h" #include "system/memory.h" -#include "exec/tb-flush.h" #include "qemu/target-info.h" #include "hw/qdev-core.h" #include "hw/qdev-properties.h" @@ -207,14 +206,6 @@ static int cpu_common_post_load(void *opaque, int version_id) cpu_reset_interrupt(cpu, 0x01); tlb_flush(cpu); - - /* - * loadvm has just updated the content of RAM, bypassing the - * usual mechanisms that ensure we flush TBs for writes to - * memory we've translated code from. So we must flush all TBs, - * which will now be stale. - */ - tb_flush(cpu); } return 0; -- cgit 1.4.1