From ae3b3ba15c73320f75c121b08266a25a9e5d4edb Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Fri, 8 Apr 2022 15:15:31 +0100 Subject: hw/intc/arm_gicv3: Implement GICv4's new redistributor frame The GICv4 extends the redistributor register map -- where GICv3 had two 64KB frames per CPU, GICv4 has four frames. Add support for the extra frame by using a new gicv3_redist_size() function in the places in the GIC implementation which currently use a fixed constant size for the redistributor register block. (Until we implement the extra registers they will RAZ/WI.) Any board that wants to use a GICv4 will need to also adjust to handle the different sized redistributor register block; that will be done separately. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-23-peter.maydell@linaro.org --- hw/intc/arm_gicv3_common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'hw/intc/arm_gicv3_common.c') diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index dcc5ce28c6..18999e3c8b 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -295,7 +295,7 @@ void gicv3_init_irqs_and_mmio(GICv3State *s, qemu_irq_handler handler, memory_region_init_io(®ion->iomem, OBJECT(s), ops ? &ops[1] : NULL, region, name, - s->redist_region_count[i] * GICV3_REDIST_SIZE); + s->redist_region_count[i] * gicv3_redist_size(s)); sysbus_init_mmio(sbd, ®ion->iomem); g_free(name); } -- cgit 1.4.1