From 367b9f527becdd20ddf116e17a3c0c2bbc486920 Mon Sep 17 00:00:00 2001 From: Vijaya Kumar K Date: Thu, 23 Feb 2017 17:21:11 +0530 Subject: hw/intc/arm_gicv3_kvm: Implement get/put functions This actually implements pre_save and post_load methods for in-kernel vGICv3. Signed-off-by: Pavel Fedin Signed-off-by: Peter Maydell Reviewed-by: Peter Maydell Signed-off-by: Vijaya Kumar K Message-id: 1487850673-26455-4-git-send-email-vijay.kilari@gmail.com [PMM: * use decimal, not 0bnnn * fixed typo in names of ICC_APR0R_EL1 and ICC_AP1R_EL1 * completely rearranged the get and put functions to read and write the state in a natural order, rather than mixing distributor and redistributor state together] Signed-off-by: Vijaya Kumar K [Vijay: * Update macro KVM_VGIC_ATTR * Use 32 bit access for gicd and gicr * GICD_IROUTER, GICD_TYPER, GICR_PROPBASER and GICR_PENDBASER reg access are changed from 64-bit to 32-bit access * Add ICC_SRE_EL1 save and restore * Dropped translate_fn mechanism and coded functions to handle save and restore of edge_trigger and priority * Number of APnR register saved/restored based on number of priority bits supported] Reviewed-by: Peter Maydell --- hw/intc/gicv3_internal.h | 1 + 1 file changed, 1 insertion(+) (limited to 'hw/intc/gicv3_internal.h') diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index aeb801d133..457118ed39 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -138,6 +138,7 @@ #define ICC_CTLR_EL1_EOIMODE (1U << 1) #define ICC_CTLR_EL1_PMHE (1U << 6) #define ICC_CTLR_EL1_PRIBITS_SHIFT 8 +#define ICC_CTLR_EL1_PRIBITS_MASK (7U << ICC_CTLR_EL1_PRIBITS_SHIFT) #define ICC_CTLR_EL1_IDBITS_SHIFT 11 #define ICC_CTLR_EL1_SEIS (1U << 14) #define ICC_CTLR_EL1_A3V (1U << 15) -- cgit 1.4.1 From d3a3e529626fbee5cf0fb33414a85c9493adc280 Mon Sep 17 00:00:00 2001 From: Vijaya Kumar K Date: Thu, 23 Feb 2017 17:21:12 +0530 Subject: target-arm: Add GICv3CPUState in CPUARMState struct Add gicv3state void pointer to CPUARMState struct to store GICv3CPUState. In case of usecase like CPU reset, we need to reset GICv3CPUState of the CPU. In such scenario, this pointer becomes handy. Signed-off-by: Vijaya Kumar K Reviewed-by: Peter Maydell Reviewed-by: Eric Auger Message-id: 1487850673-26455-5-git-send-email-vijay.kilari@gmail.com Signed-off-by: Peter Maydell --- hw/intc/arm_gicv3_common.c | 2 ++ hw/intc/arm_gicv3_cpuif.c | 8 ++++++++ hw/intc/gicv3_internal.h | 2 ++ target/arm/cpu.h | 2 ++ 4 files changed, 14 insertions(+) (limited to 'hw/intc/gicv3_internal.h') diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index 5b0e456383..c6493d6c07 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -252,6 +252,8 @@ static void arm_gicv3_common_realize(DeviceState *dev, Error **errp) s->cpu[i].cpu = cpu; s->cpu[i].gic = s; + /* Store GICv3CPUState in CPUARMState gicv3state pointer */ + gicv3_set_gicv3state(cpu, &s->cpu[i]); /* Pre-construct the GICR_TYPER: * For our implementation: diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c index f775aba507..0b208560bd 100644 --- a/hw/intc/arm_gicv3_cpuif.c +++ b/hw/intc/arm_gicv3_cpuif.c @@ -19,6 +19,14 @@ #include "gicv3_internal.h" #include "cpu.h" +void gicv3_set_gicv3state(CPUState *cpu, GICv3CPUState *s) +{ + ARMCPU *arm_cpu = ARM_CPU(cpu); + CPUARMState *env = &arm_cpu->env; + + env->gicv3state = (void *)s; +}; + static GICv3CPUState *icc_cs_from_env(CPUARMState *env) { /* Given the CPU, find the right GICv3CPUState struct. diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index 457118ed39..05303a55c8 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -408,4 +408,6 @@ static inline void gicv3_cache_all_target_cpustates(GICv3State *s) } } +void gicv3_set_gicv3state(CPUState *cpu, GICv3CPUState *s); + #endif /* QEMU_ARM_GICV3_INTERNAL_H */ diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 9e7b2dfc83..25ceaabb5d 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -521,6 +521,8 @@ typedef struct CPUARMState { void *nvic; const struct arm_boot_info *boot_info; + /* Store GICv3CPUState to access from this struct */ + void *gicv3state; } CPUARMState; /** -- cgit 1.4.1