From e5074b384792caf33b1115168740c9067bd82055 Mon Sep 17 00:00:00 2001 From: Peter Xu Date: Mon, 9 Jan 2017 16:55:51 +0800 Subject: x86: ioapic: add traces for ioapic From time to time, there are issues with ioapic, either on guest side or on hypervisor side. Good to have some persistent traces for better triaging and debugging. Signed-off-by: Peter Xu Message-Id: <1483952153-7221-2-git-send-email-peterx@redhat.com> Signed-off-by: Paolo Bonzini --- hw/intc/ioapic.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) (limited to 'hw/intc/ioapic.c') diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c index ea7ea0bce8..d1254f860e 100644 --- a/hw/intc/ioapic.c +++ b/hw/intc/ioapic.c @@ -33,6 +33,7 @@ #include "target/i386/cpu.h" #include "hw/i386/apic-msidef.h" #include "hw/i386/x86-iommu.h" +#include "trace.h" //#define DEBUG_IOAPIC @@ -115,6 +116,7 @@ static void ioapic_service(IOAPICCommonState *s) s->irr &= ~mask; } else { coalesce = s->ioredtbl[i] & IOAPIC_LVT_REMOTE_IRR; + trace_ioapic_set_remote_irr(i); s->ioredtbl[i] |= IOAPIC_LVT_REMOTE_IRR; } @@ -220,6 +222,8 @@ void ioapic_eoi_broadcast(int vector) uint64_t entry; int i, n; + trace_ioapic_eoi_broadcast(vector); + for (i = 0; i < MAX_IOAPICS; i++) { s = ioapics[i]; if (!s) { @@ -229,6 +233,7 @@ void ioapic_eoi_broadcast(int vector) entry = s->ioredtbl[n]; if ((entry & IOAPIC_LVT_REMOTE_IRR) && (entry & IOAPIC_VECTOR_MASK) == vector) { + trace_ioapic_clear_remote_irr(n, vector); s->ioredtbl[n] = entry & ~IOAPIC_LVT_REMOTE_IRR; if (!(entry & IOAPIC_LVT_MASKED) && (s->irr & (1 << n))) { ioapic_service(s); @@ -256,7 +261,9 @@ ioapic_mem_read(void *opaque, hwaddr addr, unsigned int size) int index; uint32_t val = 0; - switch (addr & 0xff) { + addr &= 0xff; + + switch (addr) { case IOAPIC_IOREGSEL: val = s->ioregsel; break; @@ -286,6 +293,9 @@ ioapic_mem_read(void *opaque, hwaddr addr, unsigned int size) DPRINTF("read: %08x = %08x\n", s->ioregsel, val); break; } + + trace_ioapic_mem_read(addr, size, val); + return val; } @@ -324,7 +334,10 @@ ioapic_mem_write(void *opaque, hwaddr addr, uint64_t val, IOAPICCommonState *s = opaque; int index; - switch (addr & 0xff) { + addr &= 0xff; + trace_ioapic_mem_write(addr, size, val); + + switch (addr) { case IOAPIC_IOREGSEL: s->ioregsel = val; break; -- cgit 1.4.1 From 0f254b1ae04b36e2ab2d91528297ed60d40c8c08 Mon Sep 17 00:00:00 2001 From: Peter Xu Date: Mon, 9 Jan 2017 16:55:53 +0800 Subject: x86: ioapic: fix fail migration when irqchip=split Split irqchip works based on the fact that we kept the first 24 gsi routing entries inside KVM for userspace ioapic's use. When system boot, we'll reserve these MSI routing entries before hand. However, after migration, we forgot to re-configure it up in the destination side. The result is, we'll get invalid gsi routing entries after migration (all empty), and we get interrupts with vector=0, then strange things happen, like keyboard hang. The solution is simple - we update them after migration, which is a one line fix. Signed-off-by: Peter Xu Message-Id: <1483952153-7221-4-git-send-email-peterx@redhat.com> Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini --- hw/intc/ioapic.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'hw/intc/ioapic.c') diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c index d1254f860e..9047b8950a 100644 --- a/hw/intc/ioapic.c +++ b/hw/intc/ioapic.c @@ -439,6 +439,11 @@ static void ioapic_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); k->realize = ioapic_realize; + /* + * If APIC is in kernel, we need to update the kernel cache after + * migration, otherwise first 24 gsi routes will be invalid. + */ + k->post_load = ioapic_update_kvm_routes; dc->reset = ioapic_reset_common; dc->props = ioapic_properties; } -- cgit 1.4.1