From c2658b0de5cb24b6eb49751c92380d30f1d9258f Mon Sep 17 00:00:00 2001 From: Bibo Mao Date: Wed, 7 May 2025 10:31:36 +0800 Subject: hw/intc/loongarch_pch: Set version information at initial stage Register PCH_PIC_INT_ID constains version and supported irq number information, and it is read only register. The detailed value can be set at initial stage, rather than read callback. Signed-off-by: Bibo Mao Reviewed-by: Song Gao Message-Id: <20250507023148.1877287-5-maobibo@loongson.cn> Signed-off-by: Song Gao --- hw/intc/loongarch_pic_common.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'hw/intc/loongarch_pic_common.c') diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c index 6dccacc741..de170501cf 100644 --- a/hw/intc/loongarch_pic_common.c +++ b/hw/intc/loongarch_pic_common.c @@ -49,6 +49,19 @@ static void loongarch_pic_common_reset_hold(Object *obj, ResetType type) LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(obj); int i; + /* + * With Loongson 7A1000 user manual + * Chapter 5.2 "Description of Interrupt-related Registers" + * + * Interrupt controller identification register 1 + * Bit 24-31 Interrupt Controller ID + * Interrupt controller identification register 2 + * Bit 0-7 Interrupt Controller version number + * Bit 16-23 The number of interrupt sources supported + */ + s->id.desc.id = PCH_PIC_INT_ID_VAL; + s->id.desc.version = PCH_PIC_INT_ID_VER; + s->id.desc.irq_num = s->irq_num - 1; s->int_mask = UINT64_MAX; s->htmsi_en = 0x0; s->intedge = 0x0; -- cgit 1.4.1