From 490aaae935b6461cfe30660e819317521b255321 Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Tue, 25 Mar 2025 23:21:17 +0100 Subject: hw/misc/pll: Do not expose as user-creatable MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit All these devices are part of SoC components and can not be created manually. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Message-Id: <20250325224310.8785-9-philmd@linaro.org> --- hw/misc/stm32l4x5_rcc.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'hw/misc/stm32l4x5_rcc.c') diff --git a/hw/misc/stm32l4x5_rcc.c b/hw/misc/stm32l4x5_rcc.c index fd8466dff3..158b743cae 100644 --- a/hw/misc/stm32l4x5_rcc.c +++ b/hw/misc/stm32l4x5_rcc.c @@ -150,6 +150,8 @@ static void clock_mux_class_init(ObjectClass *klass, void *data) rc->phases.hold = clock_mux_reset_hold; rc->phases.exit = clock_mux_reset_exit; dc->vmsd = &clock_mux_vmstate; + /* Reason: Part of Stm32l4x5RccState component */ + dc->user_creatable = false; } static void clock_mux_set_enable(RccClockMuxState *mux, bool enabled) @@ -302,6 +304,8 @@ static void pll_class_init(ObjectClass *klass, void *data) rc->phases.hold = pll_reset_hold; rc->phases.exit = pll_reset_exit; dc->vmsd = &pll_vmstate; + /* Reason: Part of Stm32l4x5RccState component */ + dc->user_creatable = false; } static void pll_set_vco_multiplier(RccPllState *pll, uint32_t vco_multiplier) -- cgit 1.4.1