From 4d309c96635b7a961e3e86e2605a97ef945aeee2 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Tue, 6 Mar 2018 20:30:45 +0000 Subject: uninorth: trivial style fixups MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This makes sure we keep patchew/checkpatch happy during the remainder of this patchset. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: David Gibson --- hw/pci-host/uninorth.c | 29 +++++++++++++++++++---------- 1 file changed, 19 insertions(+), 10 deletions(-) (limited to 'hw/pci-host/uninorth.c') diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index 66991da975..710818e355 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -272,7 +272,6 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic, UNINState *d; /* Uninorth AGP bus */ - dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE); qdev_init_nofail(dev); s = SYS_BUS_DEVICE(dev); @@ -302,16 +301,23 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic, static void unin_main_pci_host_realize(PCIDevice *d, Error **errp) { - d->config[0x0C] = 0x08; // cache_line_size - d->config[0x0D] = 0x10; // latency_timer - d->config[0x34] = 0x00; // capabilities_pointer + /* cache_line_size */ + d->config[0x0C] = 0x08; + /* latency_timer */ + d->config[0x0D] = 0x10; + /* capabilities_pointer */ + d->config[0x34] = 0x00; } static void unin_agp_pci_host_realize(PCIDevice *d, Error **errp) { - d->config[0x0C] = 0x08; // cache_line_size - d->config[0x0D] = 0x10; // latency_timer - // d->config[0x34] = 0x80; // capabilities_pointer + /* cache_line_size */ + d->config[0x0C] = 0x08; + /* latency_timer */ + d->config[0x0D] = 0x10; + /* capabilities_pointer + d->config[0x34] = 0x80; */ + /* * Set kMacRISCPCIAddressSelect (0x48) register to indicate PCI * memory space with base 0x80000000, size 0x10000000 for Apple's @@ -333,9 +339,12 @@ static void u3_agp_pci_host_realize(PCIDevice *d, Error **errp) static void unin_internal_pci_host_realize(PCIDevice *d, Error **errp) { - d->config[0x0C] = 0x08; // cache_line_size - d->config[0x0D] = 0x10; // latency_timer - d->config[0x34] = 0x00; // capabilities_pointer + /* cache_line_size */ + d->config[0x0C] = 0x08; + /* latency_timer */ + d->config[0x0D] = 0x10; + /* capabilities_pointer */ + d->config[0x34] = 0x00; } static void unin_main_pci_host_class_init(ObjectClass *klass, void *data) -- cgit 1.4.1 From 0203459943ebcb366f68ff65f2191c18ee7533d9 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Tue, 6 Mar 2018 20:30:47 +0000 Subject: uninorth: QOMify PCI and AGP host bridges Signed-off-by: Mark Cave-Ayland Signed-off-by: David Gibson --- hw/pci-host/uninorth.c | 79 ++++++++++++++++++++------------------------------ 1 file changed, 32 insertions(+), 47 deletions(-) (limited to 'hw/pci-host/uninorth.c') diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index 710818e355..1d4d3f5705 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -129,72 +129,61 @@ static const MemoryRegionOps unin_data_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; -static int pci_unin_main_init_device(SysBusDevice *dev) +static void pci_unin_main_init(Object *obj) { - PCIHostState *h; + SysBusDevice *sbd = SYS_BUS_DEVICE(obj); + PCIHostState *h = PCI_HOST_BRIDGE(obj); /* Use values found on a real PowerMac */ /* Uninorth main bus */ - h = PCI_HOST_BRIDGE(dev); - memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, - dev, "pci-conf-idx", 0x1000); - memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, dev, + obj, "pci-conf-idx", 0x1000); + memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, obj, "pci-conf-data", 0x1000); - sysbus_init_mmio(dev, &h->conf_mem); - sysbus_init_mmio(dev, &h->data_mem); - - return 0; + sysbus_init_mmio(sbd, &h->conf_mem); + sysbus_init_mmio(sbd, &h->data_mem); } - -static int pci_u3_agp_init_device(SysBusDevice *dev) +static void pci_u3_agp_init(Object *obj) { - PCIHostState *h; + SysBusDevice *sbd = SYS_BUS_DEVICE(obj); + PCIHostState *h = PCI_HOST_BRIDGE(obj); /* Uninorth U3 AGP bus */ - h = PCI_HOST_BRIDGE(dev); - memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, - dev, "pci-conf-idx", 0x1000); - memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, dev, + obj, "pci-conf-idx", 0x1000); + memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, obj, "pci-conf-data", 0x1000); - sysbus_init_mmio(dev, &h->conf_mem); - sysbus_init_mmio(dev, &h->data_mem); - - return 0; + sysbus_init_mmio(sbd, &h->conf_mem); + sysbus_init_mmio(sbd, &h->data_mem); } -static int pci_unin_agp_init_device(SysBusDevice *dev) +static void pci_unin_agp_init(Object *obj) { - PCIHostState *h; + SysBusDevice *sbd = SYS_BUS_DEVICE(obj); + PCIHostState *h = PCI_HOST_BRIDGE(obj); /* Uninorth AGP bus */ - h = PCI_HOST_BRIDGE(dev); - memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, - dev, "pci-conf-idx", 0x1000); + obj, "pci-conf-idx", 0x1000); memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops, - dev, "pci-conf-data", 0x1000); - sysbus_init_mmio(dev, &h->conf_mem); - sysbus_init_mmio(dev, &h->data_mem); - return 0; + obj, "pci-conf-data", 0x1000); + sysbus_init_mmio(sbd, &h->conf_mem); + sysbus_init_mmio(sbd, &h->data_mem); } -static int pci_unin_internal_init_device(SysBusDevice *dev) +static void pci_unin_internal_init(Object *obj) { - PCIHostState *h; + SysBusDevice *sbd = SYS_BUS_DEVICE(obj); + PCIHostState *h = PCI_HOST_BRIDGE(obj); /* Uninorth internal bus */ - h = PCI_HOST_BRIDGE(dev); - memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, - dev, "pci-conf-idx", 0x1000); + obj, "pci-conf-idx", 0x1000); memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops, - dev, "pci-conf-data", 0x1000); - sysbus_init_mmio(dev, &h->conf_mem); - sysbus_init_mmio(dev, &h->data_mem); - return 0; + obj, "pci-conf-data", 0x1000); + sysbus_init_mmio(sbd, &h->conf_mem); + sysbus_init_mmio(sbd, &h->data_mem); } PCIBus *pci_pmac_init(qemu_irq *pic, @@ -461,10 +450,8 @@ static const TypeInfo unin_internal_pci_host_info = { static void pci_unin_main_class_init(ObjectClass *klass, void *data) { - SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); - sbc->init = pci_unin_main_init_device; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); } @@ -472,15 +459,14 @@ static const TypeInfo pci_unin_main_info = { .name = TYPE_UNI_NORTH_PCI_HOST_BRIDGE, .parent = TYPE_PCI_HOST_BRIDGE, .instance_size = sizeof(UNINState), + .instance_init = pci_unin_main_init, .class_init = pci_unin_main_class_init, }; static void pci_u3_agp_class_init(ObjectClass *klass, void *data) { - SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); - sbc->init = pci_u3_agp_init_device; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); } @@ -488,15 +474,14 @@ static const TypeInfo pci_u3_agp_info = { .name = TYPE_U3_AGP_HOST_BRIDGE, .parent = TYPE_PCI_HOST_BRIDGE, .instance_size = sizeof(UNINState), + .instance_init = pci_u3_agp_init, .class_init = pci_u3_agp_class_init, }; static void pci_unin_agp_class_init(ObjectClass *klass, void *data) { - SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); - sbc->init = pci_unin_agp_init_device; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); } @@ -504,15 +489,14 @@ static const TypeInfo pci_unin_agp_info = { .name = TYPE_UNI_NORTH_AGP_HOST_BRIDGE, .parent = TYPE_PCI_HOST_BRIDGE, .instance_size = sizeof(UNINState), + .instance_init = pci_unin_agp_init, .class_init = pci_unin_agp_class_init, }; static void pci_unin_internal_class_init(ObjectClass *klass, void *data) { - SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); - sbc->init = pci_unin_internal_init_device; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); } @@ -520,6 +504,7 @@ static const TypeInfo pci_unin_internal_info = { .name = TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE, .parent = TYPE_PCI_HOST_BRIDGE, .instance_size = sizeof(UNINState), + .instance_init = pci_unin_internal_init, .class_init = pci_unin_internal_class_init, }; -- cgit 1.4.1 From 5d2eaa02501c9a75a221caa443553d3cc6077cfd Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Tue, 6 Mar 2018 20:30:49 +0000 Subject: uninorth: move uninorth definitions into uninorth.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Mark Cave-Ayland [dwg: Added hw/hw.h #include as suggested by Philippe Mathieu-Daudé] Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: David Gibson --- hw/pci-host/uninorth.c | 22 +----------------- include/hw/pci-host/uninorth.h | 51 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 52 insertions(+), 21 deletions(-) create mode 100644 include/hw/pci-host/uninorth.h (limited to 'hw/pci-host/uninorth.c') diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index 1d4d3f5705..600d675573 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -26,31 +26,11 @@ #include "hw/ppc/mac.h" #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" +#include "hw/pci-host/uninorth.h" #include "trace.h" static const int unin_irq_line[] = { 0x1b, 0x1c, 0x1d, 0x1e }; -#define TYPE_UNI_NORTH_PCI_HOST_BRIDGE "uni-north-pci-pcihost" -#define TYPE_UNI_NORTH_AGP_HOST_BRIDGE "uni-north-agp-pcihost" -#define TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE "uni-north-internal-pci-pcihost" -#define TYPE_U3_AGP_HOST_BRIDGE "u3-agp-pcihost" - -#define UNI_NORTH_PCI_HOST_BRIDGE(obj) \ - OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_PCI_HOST_BRIDGE) -#define UNI_NORTH_AGP_HOST_BRIDGE(obj) \ - OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_AGP_HOST_BRIDGE) -#define UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj) \ - OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE) -#define U3_AGP_HOST_BRIDGE(obj) \ - OBJECT_CHECK(UNINState, (obj), TYPE_U3_AGP_HOST_BRIDGE) - -typedef struct UNINState { - PCIHostState parent_obj; - - MemoryRegion pci_mmio; - MemoryRegion pci_hole; -} UNINState; - static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num) { return (irq_num + (pci_dev->devfn >> 3)) & 3; diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h new file mode 100644 index 0000000000..0366376a3b --- /dev/null +++ b/include/hw/pci-host/uninorth.h @@ -0,0 +1,51 @@ +/* + * QEMU Uninorth PCI host (for all Mac99 and newer machines) + * + * Copyright (c) 2006 Fabrice Bellard + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef UNINORTH_H +#define UNINORTH_H + +#include "hw/hw.h" + +#define TYPE_UNI_NORTH_PCI_HOST_BRIDGE "uni-north-pci-pcihost" +#define TYPE_UNI_NORTH_AGP_HOST_BRIDGE "uni-north-agp-pcihost" +#define TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE "uni-north-internal-pci-pcihost" +#define TYPE_U3_AGP_HOST_BRIDGE "u3-agp-pcihost" + +#define UNI_NORTH_PCI_HOST_BRIDGE(obj) \ + OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_PCI_HOST_BRIDGE) +#define UNI_NORTH_AGP_HOST_BRIDGE(obj) \ + OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_AGP_HOST_BRIDGE) +#define UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj) \ + OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE) +#define U3_AGP_HOST_BRIDGE(obj) \ + OBJECT_CHECK(UNINState, (obj), TYPE_U3_AGP_HOST_BRIDGE) + +typedef struct UNINState { + PCIHostState parent_obj; + + MemoryRegion pci_mmio; + MemoryRegion pci_hole; +} UNINState; + +#endif /* UNINORTH_H */ -- cgit 1.4.1 From 0f4b5415c31ed1fee02f5826fe0d2d585806fa95 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Tue, 6 Mar 2018 20:30:50 +0000 Subject: uninorth: alter pci_pmac_init() and pci_pmac_u3_init() to return uninorth device MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is in preparation for moving the device wiring into the New World machine. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: David Gibson --- hw/pci-host/uninorth.c | 16 ++++++++-------- hw/ppc/mac.h | 10 ++++++---- hw/ppc/mac_newworld.c | 10 ++++++++-- 3 files changed, 22 insertions(+), 14 deletions(-) (limited to 'hw/pci-host/uninorth.c') diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index 600d675573..b081e3c153 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -166,9 +166,9 @@ static void pci_unin_internal_init(Object *obj) sysbus_init_mmio(sbd, &h->data_mem); } -PCIBus *pci_pmac_init(qemu_irq *pic, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io) +UNINState *pci_pmac_init(qemu_irq *pic, + MemoryRegion *address_space_mem, + MemoryRegion *address_space_io) { DeviceState *dev; SysBusDevice *s; @@ -228,12 +228,12 @@ PCIBus *pci_pmac_init(qemu_irq *pic, sysbus_mmio_map(s, 1, 0xf4c00000); #endif - return h->bus; + return d; } -PCIBus *pci_pmac_u3_init(qemu_irq *pic, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io) +UNINState *pci_pmac_u3_init(qemu_irq *pic, + MemoryRegion *address_space_mem, + MemoryRegion *address_space_io) { DeviceState *dev; SysBusDevice *s; @@ -265,7 +265,7 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic, pci_create_simple(h->bus, 11 << 3, "u3-agp"); - return h->bus; + return d; } static void unin_main_pci_host_realize(PCIDevice *d, Error **errp) diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h index a02f797598..fcf13cb757 100644 --- a/hw/ppc/mac.h +++ b/hw/ppc/mac.h @@ -31,6 +31,8 @@ #include "hw/ide/internal.h" #include "hw/input/adb.h" #include "hw/misc/mos6522.h" +#include "hw/pci/pci_host.h" +#include "hw/pci-host/uninorth.h" /* SMP is not enabled, for now */ #define MAX_CPUS 1 @@ -86,12 +88,12 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic, MemoryRegion *address_space_io); /* UniNorth PCI */ -PCIBus *pci_pmac_init(qemu_irq *pic, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io); -PCIBus *pci_pmac_u3_init(qemu_irq *pic, +UNINState *pci_pmac_init(qemu_irq *pic, MemoryRegion *address_space_mem, MemoryRegion *address_space_io); +UNINState *pci_pmac_u3_init(qemu_irq *pic, + MemoryRegion *address_space_mem, + MemoryRegion *address_space_io); /* Mac NVRAM */ #define TYPE_MACIO_NVRAM "macio-nvram" diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index 4ff1c293a8..ccf34ee36c 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -151,6 +151,7 @@ static void ppc_core99_init(MachineState *machine) MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1); hwaddr kernel_base, initrd_base, cmdline_base = 0; long kernel_size, initrd_size; + UNINState *uninorth_pci; PCIBus *pci_bus; NewWorldMacIOState *macio; MACIOIDEState *macio_ide; @@ -344,10 +345,12 @@ static void ppc_core99_init(MachineState *machine) if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) { /* 970 gets a U3 bus */ - pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io()); + uninorth_pci = pci_pmac_u3_init(pic, get_system_memory(), + get_system_io()); machine_arch = ARCH_MAC99_U3; } else { - pci_bus = pci_pmac_init(pic, get_system_memory(), get_system_io()); + uninorth_pci = pci_pmac_init(pic, get_system_memory(), + get_system_io()); machine_arch = ARCH_MAC99; } @@ -360,6 +363,9 @@ static void ppc_core99_init(MachineState *machine) tbfreq = TBFREQ; } + /* init basic PC hardware */ + pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus; + /* MacIO */ macio = NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO)); dev = DEVICE(macio); -- cgit 1.4.1 From 132e9906d64beb8873ca5efe028a052dec6c4550 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Tue, 6 Mar 2018 20:30:51 +0000 Subject: uninorth: move PCI mmio memory region initialisation into init function Whilst we are here, rename the memory regions to better reflect whether they belong to either a PCI or an AGP bus. Signed-off-by: Mark Cave-Ayland Signed-off-by: David Gibson --- hw/pci-host/uninorth.c | 28 ++++++++++++++++++---------- 1 file changed, 18 insertions(+), 10 deletions(-) (limited to 'hw/pci-host/uninorth.c') diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index b081e3c153..5b8fc3aa16 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -111,29 +111,39 @@ static const MemoryRegionOps unin_data_ops = { static void pci_unin_main_init(Object *obj) { + UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(obj); SysBusDevice *sbd = SYS_BUS_DEVICE(obj); PCIHostState *h = PCI_HOST_BRIDGE(obj); /* Use values found on a real PowerMac */ /* Uninorth main bus */ memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, - obj, "pci-conf-idx", 0x1000); + obj, "unin-pci-conf-idx", 0x1000); memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, obj, - "pci-conf-data", 0x1000); + "unin-pci-conf-data", 0x1000); + + memory_region_init(&s->pci_mmio, OBJECT(s), "unin-pci-mmio", + 0x100000000ULL); + sysbus_init_mmio(sbd, &h->conf_mem); sysbus_init_mmio(sbd, &h->data_mem); } static void pci_u3_agp_init(Object *obj) { + UNINState *s = U3_AGP_HOST_BRIDGE(obj); SysBusDevice *sbd = SYS_BUS_DEVICE(obj); PCIHostState *h = PCI_HOST_BRIDGE(obj); /* Uninorth U3 AGP bus */ memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, - obj, "pci-conf-idx", 0x1000); + obj, "unin-pci-conf-idx", 0x1000); memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, obj, - "pci-conf-data", 0x1000); + "unin-pci-conf-data", 0x1000); + + memory_region_init(&s->pci_mmio, OBJECT(s), "unin-pci-mmio", + 0x100000000ULL); + sysbus_init_mmio(sbd, &h->conf_mem); sysbus_init_mmio(sbd, &h->data_mem); } @@ -145,9 +155,9 @@ static void pci_unin_agp_init(Object *obj) /* Uninorth AGP bus */ memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, - obj, "pci-conf-idx", 0x1000); + obj, "unin-agp-conf-idx", 0x1000); memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops, - obj, "pci-conf-data", 0x1000); + obj, "unin-agp-conf-data", 0x1000); sysbus_init_mmio(sbd, &h->conf_mem); sysbus_init_mmio(sbd, &h->data_mem); } @@ -159,9 +169,9 @@ static void pci_unin_internal_init(Object *obj) /* Uninorth internal bus */ memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, - obj, "pci-conf-idx", 0x1000); + obj, "unin-pci-conf-idx", 0x1000); memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops, - obj, "pci-conf-data", 0x1000); + obj, "unin-pci-conf-data", 0x1000); sysbus_init_mmio(sbd, &h->conf_mem); sysbus_init_mmio(sbd, &h->data_mem); } @@ -182,7 +192,6 @@ UNINState *pci_pmac_init(qemu_irq *pic, s = SYS_BUS_DEVICE(dev); h = PCI_HOST_BRIDGE(s); d = UNI_NORTH_PCI_HOST_BRIDGE(dev); - memory_region_init(&d->pci_mmio, OBJECT(d), "pci-mmio", 0x100000000ULL); memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio, 0x80000000ULL, 0x10000000ULL); memory_region_add_subregion(address_space_mem, 0x80000000ULL, @@ -247,7 +256,6 @@ UNINState *pci_pmac_u3_init(qemu_irq *pic, h = PCI_HOST_BRIDGE(dev); d = U3_AGP_HOST_BRIDGE(dev); - memory_region_init(&d->pci_mmio, OBJECT(d), "pci-mmio", 0x100000000ULL); memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio, 0x80000000ULL, 0x70000000ULL); memory_region_add_subregion(address_space_mem, 0x80000000ULL, -- cgit 1.4.1 From 0b065209549fdd503fe109b09d78500bb05c9f7f Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Tue, 6 Mar 2018 20:30:52 +0000 Subject: uninorth: introduce temporary pic_irqs device property This is in preparation for moving the PCI bus wiring inside the uninorth host bridge devices. In the future it will be possible to remove this once the PICs have been switched to use qdev GPIOs. Signed-off-by: Mark Cave-Ayland Signed-off-by: David Gibson --- hw/pci-host/uninorth.c | 25 +++++++++++++++++++++++-- include/hw/pci-host/uninorth.h | 1 + 2 files changed, 24 insertions(+), 2 deletions(-) (limited to 'hw/pci-host/uninorth.c') diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index 5b8fc3aa16..fc59698f06 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -188,6 +188,7 @@ UNINState *pci_pmac_init(qemu_irq *pic, /* Use values found on a real PowerMac */ /* Uninorth main bus */ dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE); + qdev_prop_set_ptr(dev, "pic-irqs", pic); qdev_init_nofail(dev); s = SYS_BUS_DEVICE(dev); h = PCI_HOST_BRIDGE(s); @@ -199,7 +200,7 @@ UNINState *pci_pmac_init(qemu_irq *pic, h->bus = pci_register_root_bus(dev, NULL, pci_unin_set_irq, pci_unin_map_irq, - pic, + d->pic_irqs, &d->pci_mmio, address_space_io, PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); @@ -220,6 +221,7 @@ UNINState *pci_pmac_init(qemu_irq *pic, /* Uninorth AGP bus */ pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp"); dev = qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE); + qdev_prop_set_ptr(dev, "pic-irqs", pic); qdev_init_nofail(dev); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, 0xf0800000); @@ -251,6 +253,7 @@ UNINState *pci_pmac_u3_init(qemu_irq *pic, /* Uninorth AGP bus */ dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE); + qdev_prop_set_ptr(dev, "pic-irqs", pic); qdev_init_nofail(dev); s = SYS_BUS_DEVICE(dev); h = PCI_HOST_BRIDGE(dev); @@ -263,7 +266,7 @@ UNINState *pci_pmac_u3_init(qemu_irq *pic, h->bus = pci_register_root_bus(dev, NULL, pci_unin_set_irq, pci_unin_map_irq, - pic, + d->pic_irqs, &d->pci_mmio, address_space_io, PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); @@ -436,10 +439,16 @@ static const TypeInfo unin_internal_pci_host_info = { }, }; +static Property pci_unin_main_properties[] = { + DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs), + DEFINE_PROP_END_OF_LIST(), +}; + static void pci_unin_main_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + dc->props = pci_unin_main_properties; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); } @@ -451,10 +460,16 @@ static const TypeInfo pci_unin_main_info = { .class_init = pci_unin_main_class_init, }; +static Property pci_u3_agp_properties[] = { + DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs), + DEFINE_PROP_END_OF_LIST(), +}; + static void pci_u3_agp_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + dc->props = pci_u3_agp_properties; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); } @@ -466,10 +481,16 @@ static const TypeInfo pci_u3_agp_info = { .class_init = pci_u3_agp_class_init, }; +static Property pci_unin_agp_class_properties[] = { + DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs), + DEFINE_PROP_END_OF_LIST(), +}; + static void pci_unin_agp_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + dc->props = pci_unin_agp_class_properties; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); } diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h index 0366376a3b..e4fa11c145 100644 --- a/include/hw/pci-host/uninorth.h +++ b/include/hw/pci-host/uninorth.h @@ -44,6 +44,7 @@ typedef struct UNINState { PCIHostState parent_obj; + void *pic_irqs; MemoryRegion pci_mmio; MemoryRegion pci_hole; } UNINState; -- cgit 1.4.1 From 32cde6154cd252bfa23d05f43a165797e2430ff4 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Tue, 6 Mar 2018 20:30:53 +0000 Subject: uninorth: move PCI host bridge bus initialisation into device realize MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since the IO address space is fixed to use the standard system IO address space then we can also use the opportunity to remove the address_space_io parameter from pci_pmac_init() and pci_pmac_u3_init(). Note we also move the default mac99 PCI bus to the end of the initialisation list so that it becomes the default destination for any devices specified via -device without an explicit PCI bus provided. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: David Gibson --- hw/pci-host/uninorth.c | 117 ++++++++++++++++++++++++++++--------------------- hw/ppc/mac.h | 6 +-- hw/ppc/mac_newworld.c | 6 +-- 3 files changed, 72 insertions(+), 57 deletions(-) (limited to 'hw/pci-host/uninorth.c') diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index fc59698f06..426b3c4e33 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -109,6 +109,27 @@ static const MemoryRegionOps unin_data_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; +static void pci_unin_main_realize(DeviceState *dev, Error **errp) +{ + UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(dev); + PCIHostState *h = PCI_HOST_BRIDGE(dev); + + h->bus = pci_register_root_bus(dev, NULL, + pci_unin_set_irq, pci_unin_map_irq, + s->pic_irqs, + &s->pci_mmio, + get_system_io(), + PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); + + pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp"); + + /* DEC 21154 bridge */ +#if 0 + /* XXX: not activated as PPC BIOS doesn't handle multiple buses properly */ + pci_create_simple(h->bus, PCI_DEVFN(12, 0), "dec-21154"); +#endif +} + static void pci_unin_main_init(Object *obj) { UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(obj); @@ -129,6 +150,21 @@ static void pci_unin_main_init(Object *obj) sysbus_init_mmio(sbd, &h->data_mem); } +static void pci_u3_agp_realize(DeviceState *dev, Error **errp) +{ + UNINState *s = U3_AGP_HOST_BRIDGE(dev); + PCIHostState *h = PCI_HOST_BRIDGE(dev); + + h->bus = pci_register_root_bus(dev, NULL, + pci_unin_set_irq, pci_unin_map_irq, + s->pic_irqs, + &s->pci_mmio, + get_system_io(), + PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); + + pci_create_simple(h->bus, PCI_DEVFN(11, 0), "u3-agp"); +} + static void pci_u3_agp_init(Object *obj) { UNINState *s = U3_AGP_HOST_BRIDGE(obj); @@ -148,6 +184,19 @@ static void pci_u3_agp_init(Object *obj) sysbus_init_mmio(sbd, &h->data_mem); } +static void pci_unin_agp_realize(DeviceState *dev, Error **errp) +{ + UNINState *s = UNI_NORTH_AGP_HOST_BRIDGE(dev); + PCIHostState *h = PCI_HOST_BRIDGE(dev); + + h->bus = pci_register_root_bus(dev, NULL, + pci_unin_set_irq, pci_unin_map_irq, + s->pic_irqs, + &s->pci_mmio, + get_system_io(), + PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); +} + static void pci_unin_agp_init(Object *obj) { SysBusDevice *sbd = SYS_BUS_DEVICE(obj); @@ -177,49 +226,14 @@ static void pci_unin_internal_init(Object *obj) } UNINState *pci_pmac_init(qemu_irq *pic, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io) + MemoryRegion *address_space_mem) { DeviceState *dev; SysBusDevice *s; - PCIHostState *h; UNINState *d; /* Use values found on a real PowerMac */ - /* Uninorth main bus */ - dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE); - qdev_prop_set_ptr(dev, "pic-irqs", pic); - qdev_init_nofail(dev); - s = SYS_BUS_DEVICE(dev); - h = PCI_HOST_BRIDGE(s); - d = UNI_NORTH_PCI_HOST_BRIDGE(dev); - memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio, - 0x80000000ULL, 0x10000000ULL); - memory_region_add_subregion(address_space_mem, 0x80000000ULL, - &d->pci_hole); - - h->bus = pci_register_root_bus(dev, NULL, - pci_unin_set_irq, pci_unin_map_irq, - d->pic_irqs, - &d->pci_mmio, - address_space_io, - PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); - -#if 0 - pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north"); -#endif - - sysbus_mmio_map(s, 0, 0xf2800000); - sysbus_mmio_map(s, 1, 0xf2c00000); - - /* DEC 21154 bridge */ -#if 0 - /* XXX: not activated as PPC BIOS doesn't handle multiple buses properly */ - pci_create_simple(h->bus, PCI_DEVFN(12, 0), "dec-21154"); -#endif - /* Uninorth AGP bus */ - pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp"); dev = qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE); qdev_prop_set_ptr(dev, "pic-irqs", pic); qdev_init_nofail(dev); @@ -239,16 +253,28 @@ UNINState *pci_pmac_init(qemu_irq *pic, sysbus_mmio_map(s, 1, 0xf4c00000); #endif + /* Uninorth main bus */ + dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE); + qdev_prop_set_ptr(dev, "pic-irqs", pic); + qdev_init_nofail(dev); + s = SYS_BUS_DEVICE(dev); + d = UNI_NORTH_PCI_HOST_BRIDGE(dev); + memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio, + 0x80000000ULL, 0x10000000ULL); + memory_region_add_subregion(address_space_mem, 0x80000000ULL, + &d->pci_hole); + + sysbus_mmio_map(s, 0, 0xf2800000); + sysbus_mmio_map(s, 1, 0xf2c00000); + return d; } UNINState *pci_pmac_u3_init(qemu_irq *pic, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io) + MemoryRegion *address_space_mem) { DeviceState *dev; SysBusDevice *s; - PCIHostState *h; UNINState *d; /* Uninorth AGP bus */ @@ -256,7 +282,6 @@ UNINState *pci_pmac_u3_init(qemu_irq *pic, qdev_prop_set_ptr(dev, "pic-irqs", pic); qdev_init_nofail(dev); s = SYS_BUS_DEVICE(dev); - h = PCI_HOST_BRIDGE(dev); d = U3_AGP_HOST_BRIDGE(dev); memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio, @@ -264,18 +289,9 @@ UNINState *pci_pmac_u3_init(qemu_irq *pic, memory_region_add_subregion(address_space_mem, 0x80000000ULL, &d->pci_hole); - h->bus = pci_register_root_bus(dev, NULL, - pci_unin_set_irq, pci_unin_map_irq, - d->pic_irqs, - &d->pci_mmio, - address_space_io, - PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); - sysbus_mmio_map(s, 0, 0xf0800000); sysbus_mmio_map(s, 1, 0xf0c00000); - pci_create_simple(h->bus, 11 << 3, "u3-agp"); - return d; } @@ -448,6 +464,7 @@ static void pci_unin_main_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + dc->realize = pci_unin_main_realize; dc->props = pci_unin_main_properties; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); } @@ -469,6 +486,7 @@ static void pci_u3_agp_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + dc->realize = pci_u3_agp_realize; dc->props = pci_u3_agp_properties; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); } @@ -490,6 +508,7 @@ static void pci_unin_agp_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + dc->realize = pci_unin_agp_realize; dc->props = pci_unin_agp_class_properties; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); } diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h index c5a33e96cb..1ab2a3b354 100644 --- a/hw/ppc/mac.h +++ b/hw/ppc/mac.h @@ -90,11 +90,9 @@ void macio_init(PCIDevice *dev, /* UniNorth PCI */ UNINState *pci_pmac_init(qemu_irq *pic, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io); + MemoryRegion *address_space_mem); UNINState *pci_pmac_u3_init(qemu_irq *pic, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io); + MemoryRegion *address_space_mem); /* Mac NVRAM */ #define TYPE_MACIO_NVRAM "macio-nvram" diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index ccf34ee36c..3367d7bb93 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -345,12 +345,10 @@ static void ppc_core99_init(MachineState *machine) if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) { /* 970 gets a U3 bus */ - uninorth_pci = pci_pmac_u3_init(pic, get_system_memory(), - get_system_io()); + uninorth_pci = pci_pmac_u3_init(pic, get_system_memory()); machine_arch = ARCH_MAC99_U3; } else { - uninorth_pci = pci_pmac_init(pic, get_system_memory(), - get_system_io()); + uninorth_pci = pci_pmac_init(pic, get_system_memory()); machine_arch = ARCH_MAC99; } -- cgit 1.4.1 From c1d66d378c6dd1f112b753c98a308688dd0af24e Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Tue, 6 Mar 2018 20:30:54 +0000 Subject: uninorth: fix PCI and AGP bus mixup Somewhere in the history of time, the initialisation of the PCI buses for the AGP and PCI host bridges got mixed up in that the PCI host bridge was creating an instance of the AGP PCI bus, and the AGP PCI bus was missing. Swap the PCI host bridge over to use the correct PCI bus (including setting the kMacRISCPCIAddressSelect register used by MacOS X) and add the missing reference to the AGP PCI bus. Signed-off-by: Mark Cave-Ayland Signed-off-by: David Gibson --- hw/pci-host/uninorth.c | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) (limited to 'hw/pci-host/uninorth.c') diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index 426b3c4e33..1f6752c294 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -121,7 +121,7 @@ static void pci_unin_main_realize(DeviceState *dev, Error **errp) get_system_io(), PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); - pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp"); + pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-pci"); /* DEC 21154 bridge */ #if 0 @@ -195,6 +195,8 @@ static void pci_unin_agp_realize(DeviceState *dev, Error **errp) &s->pci_mmio, get_system_io(), PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); + + pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp"); } static void pci_unin_agp_init(Object *obj) @@ -303,16 +305,6 @@ static void unin_main_pci_host_realize(PCIDevice *d, Error **errp) d->config[0x0D] = 0x10; /* capabilities_pointer */ d->config[0x34] = 0x00; -} - -static void unin_agp_pci_host_realize(PCIDevice *d, Error **errp) -{ - /* cache_line_size */ - d->config[0x0C] = 0x08; - /* latency_timer */ - d->config[0x0D] = 0x10; - /* capabilities_pointer - d->config[0x34] = 0x80; */ /* * Set kMacRISCPCIAddressSelect (0x48) register to indicate PCI @@ -325,6 +317,16 @@ static void unin_agp_pci_host_realize(PCIDevice *d, Error **errp) d->config[0x4b] = 0x1; } +static void unin_agp_pci_host_realize(PCIDevice *d, Error **errp) +{ + /* cache_line_size */ + d->config[0x0C] = 0x08; + /* latency_timer */ + d->config[0x0D] = 0x10; + /* capabilities_pointer + d->config[0x34] = 0x80; */ +} + static void u3_agp_pci_host_realize(PCIDevice *d, Error **errp) { /* cache line size */ -- cgit 1.4.1 From 1ff861d289bf2bef65cb5ef20303583bd72ec930 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Tue, 6 Mar 2018 20:30:55 +0000 Subject: uninorth: enable internal PCI host bridge Signed-off-by: Mark Cave-Ayland Signed-off-by: David Gibson --- hw/pci-host/uninorth.c | 28 +++++++++++++++++++++++----- 1 file changed, 23 insertions(+), 5 deletions(-) (limited to 'hw/pci-host/uninorth.c') diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index 1f6752c294..ccde332fa9 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -213,6 +213,21 @@ static void pci_unin_agp_init(Object *obj) sysbus_init_mmio(sbd, &h->data_mem); } +static void pci_unin_internal_realize(DeviceState *dev, Error **errp) +{ + UNINState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(dev); + PCIHostState *h = PCI_HOST_BRIDGE(dev); + + h->bus = pci_register_root_bus(dev, NULL, + pci_unin_set_irq, pci_unin_map_irq, + s->pic_irqs, + &s->pci_mmio, + get_system_io(), + PCI_DEVFN(14, 0), 4, TYPE_PCI_BUS); + + pci_create_simple(h->bus, PCI_DEVFN(14, 0), "uni-north-internal-pci"); +} + static void pci_unin_internal_init(Object *obj) { SysBusDevice *sbd = SYS_BUS_DEVICE(obj); @@ -244,16 +259,12 @@ UNINState *pci_pmac_init(qemu_irq *pic, sysbus_mmio_map(s, 1, 0xf0c00000); /* Uninorth internal bus */ -#if 0 - /* XXX: not needed for now */ - pci_create_simple(h->bus, PCI_DEVFN(14, 0), - "uni-north-internal-pci"); dev = qdev_create(NULL, TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE); + qdev_prop_set_ptr(dev, "pic-irqs", pic); qdev_init_nofail(dev); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, 0xf4800000); sysbus_mmio_map(s, 1, 0xf4c00000); -#endif /* Uninorth main bus */ dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE); @@ -523,10 +534,17 @@ static const TypeInfo pci_unin_agp_info = { .class_init = pci_unin_agp_class_init, }; +static Property pci_unin_internal_class_properties[] = { + DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs), + DEFINE_PROP_END_OF_LIST(), +}; + static void pci_unin_internal_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + dc->realize = pci_unin_internal_realize; + dc->props = pci_unin_internal_class_properties; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); } -- cgit 1.4.1 From 7b19318bee746628b8cd9795d7a944c26779d60f Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Tue, 6 Mar 2018 20:30:56 +0000 Subject: uninorth: remove obsolete pci_pmac_init() function Instead wire up the PCI/AGP host bridges in mac_newworld.c. Now this is complete it is possible to move the initialisation of the PCI hole alias into pci_unin_main_init(). Signed-off-by: Mark Cave-Ayland Signed-off-by: David Gibson --- hw/pci-host/uninorth.c | 46 +++++----------------------------------------- hw/ppc/mac_newworld.c | 30 +++++++++++++++++++++++++++++- 2 files changed, 34 insertions(+), 42 deletions(-) (limited to 'hw/pci-host/uninorth.c') diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index ccde332fa9..8e4e9b3d35 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -146,8 +146,13 @@ static void pci_unin_main_init(Object *obj) memory_region_init(&s->pci_mmio, OBJECT(s), "unin-pci-mmio", 0x100000000ULL); + memory_region_init_alias(&s->pci_hole, OBJECT(s), + "unin-pci-hole", &s->pci_mmio, + 0x80000000ULL, 0x10000000ULL); + sysbus_init_mmio(sbd, &h->conf_mem); sysbus_init_mmio(sbd, &h->data_mem); + sysbus_init_mmio(sbd, &s->pci_hole); } static void pci_u3_agp_realize(DeviceState *dev, Error **errp) @@ -242,47 +247,6 @@ static void pci_unin_internal_init(Object *obj) sysbus_init_mmio(sbd, &h->data_mem); } -UNINState *pci_pmac_init(qemu_irq *pic, - MemoryRegion *address_space_mem) -{ - DeviceState *dev; - SysBusDevice *s; - UNINState *d; - - /* Use values found on a real PowerMac */ - /* Uninorth AGP bus */ - dev = qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE); - qdev_prop_set_ptr(dev, "pic-irqs", pic); - qdev_init_nofail(dev); - s = SYS_BUS_DEVICE(dev); - sysbus_mmio_map(s, 0, 0xf0800000); - sysbus_mmio_map(s, 1, 0xf0c00000); - - /* Uninorth internal bus */ - dev = qdev_create(NULL, TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE); - qdev_prop_set_ptr(dev, "pic-irqs", pic); - qdev_init_nofail(dev); - s = SYS_BUS_DEVICE(dev); - sysbus_mmio_map(s, 0, 0xf4800000); - sysbus_mmio_map(s, 1, 0xf4c00000); - - /* Uninorth main bus */ - dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE); - qdev_prop_set_ptr(dev, "pic-irqs", pic); - qdev_init_nofail(dev); - s = SYS_BUS_DEVICE(dev); - d = UNI_NORTH_PCI_HOST_BRIDGE(dev); - memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio, - 0x80000000ULL, 0x10000000ULL); - memory_region_add_subregion(address_space_mem, 0x80000000ULL, - &d->pci_hole); - - sysbus_mmio_map(s, 0, 0xf2800000); - sysbus_mmio_map(s, 1, 0xf2c00000); - - return d; -} - UNINState *pci_pmac_u3_init(qemu_irq *pic, MemoryRegion *address_space_mem) { diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index 3367d7bb93..3033fc0d7e 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -348,7 +348,35 @@ static void ppc_core99_init(MachineState *machine) uninorth_pci = pci_pmac_u3_init(pic, get_system_memory()); machine_arch = ARCH_MAC99_U3; } else { - uninorth_pci = pci_pmac_init(pic, get_system_memory()); + /* Use values found on a real PowerMac */ + /* Uninorth AGP bus */ + dev = qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE); + qdev_prop_set_ptr(dev, "pic-irqs", pic); + qdev_init_nofail(dev); + s = SYS_BUS_DEVICE(dev); + sysbus_mmio_map(s, 0, 0xf0800000); + sysbus_mmio_map(s, 1, 0xf0c00000); + + /* Uninorth internal bus */ + dev = qdev_create(NULL, TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE); + qdev_prop_set_ptr(dev, "pic-irqs", pic); + qdev_init_nofail(dev); + s = SYS_BUS_DEVICE(dev); + sysbus_mmio_map(s, 0, 0xf4800000); + sysbus_mmio_map(s, 1, 0xf4c00000); + + /* Uninorth main bus */ + dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE); + qdev_prop_set_ptr(dev, "pic-irqs", pic); + qdev_init_nofail(dev); + uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev); + s = SYS_BUS_DEVICE(dev); + /* PCI hole */ + memory_region_add_subregion(get_system_memory(), 0x80000000ULL, + sysbus_mmio_get_region(s, 2)); + sysbus_mmio_map(s, 0, 0xf2800000); + sysbus_mmio_map(s, 1, 0xf2c00000); + machine_arch = ARCH_MAC99; } -- cgit 1.4.1 From 8ce3f743c78f422ff87da76553c9421391f3adbf Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Tue, 6 Mar 2018 20:30:57 +0000 Subject: uninorth: remove obsolete pci_pmac_u3_init() function Instead wire up the PCI/AGP host bridges in mac_newworld.c. Now this is complete it is possible to move the initialisation of the PCI hole alias into pci_u3_agp_init(). Signed-off-by: Mark Cave-Ayland Signed-off-by: David Gibson --- hw/pci-host/uninorth.c | 30 +++++------------------------- hw/ppc/mac_newworld.c | 13 ++++++++++++- 2 files changed, 17 insertions(+), 26 deletions(-) (limited to 'hw/pci-host/uninorth.c') diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index 8e4e9b3d35..ec6e529d66 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -185,8 +185,13 @@ static void pci_u3_agp_init(Object *obj) memory_region_init(&s->pci_mmio, OBJECT(s), "unin-pci-mmio", 0x100000000ULL); + memory_region_init_alias(&s->pci_hole, OBJECT(s), + "unin-pci-hole", &s->pci_mmio, + 0x80000000ULL, 0x70000000ULL); + sysbus_init_mmio(sbd, &h->conf_mem); sysbus_init_mmio(sbd, &h->data_mem); + sysbus_init_mmio(sbd, &s->pci_hole); } static void pci_unin_agp_realize(DeviceState *dev, Error **errp) @@ -247,31 +252,6 @@ static void pci_unin_internal_init(Object *obj) sysbus_init_mmio(sbd, &h->data_mem); } -UNINState *pci_pmac_u3_init(qemu_irq *pic, - MemoryRegion *address_space_mem) -{ - DeviceState *dev; - SysBusDevice *s; - UNINState *d; - - /* Uninorth AGP bus */ - dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE); - qdev_prop_set_ptr(dev, "pic-irqs", pic); - qdev_init_nofail(dev); - s = SYS_BUS_DEVICE(dev); - d = U3_AGP_HOST_BRIDGE(dev); - - memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio, - 0x80000000ULL, 0x70000000ULL); - memory_region_add_subregion(address_space_mem, 0x80000000ULL, - &d->pci_hole); - - sysbus_mmio_map(s, 0, 0xf0800000); - sysbus_mmio_map(s, 1, 0xf0c00000); - - return d; -} - static void unin_main_pci_host_realize(PCIDevice *d, Error **errp) { /* cache_line_size */ diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index 3033fc0d7e..2360b24a12 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -345,7 +345,18 @@ static void ppc_core99_init(MachineState *machine) if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) { /* 970 gets a U3 bus */ - uninorth_pci = pci_pmac_u3_init(pic, get_system_memory()); + /* Uninorth AGP bus */ + dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE); + qdev_prop_set_ptr(dev, "pic-irqs", pic); + qdev_init_nofail(dev); + uninorth_pci = U3_AGP_HOST_BRIDGE(dev); + s = SYS_BUS_DEVICE(dev); + /* PCI hole */ + memory_region_add_subregion(get_system_memory(), 0x80000000ULL, + sysbus_mmio_get_region(s, 2)); + sysbus_mmio_map(s, 0, 0xf0800000); + sysbus_mmio_map(s, 1, 0xf0c00000); + machine_arch = ARCH_MAC99_U3; } else { /* Use values found on a real PowerMac */ -- cgit 1.4.1 From e7755cc1142db474bfa47247a92c59996af0502a Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Tue, 6 Mar 2018 20:30:58 +0000 Subject: uninorth: use object link to pass OpenPIC object to uninorth Now that the OpenPIC is wired up via the board, we can now remove our temporary PIC qdev pointer property and replace it with an object link instead. Signed-off-by: Mark Cave-Ayland Signed-off-by: David Gibson --- hw/pci-host/uninorth.c | 73 +++++++++++++++++++++++++----------------- hw/ppc/mac_newworld.c | 12 ++++--- include/hw/pci-host/uninorth.h | 5 ++- 3 files changed, 55 insertions(+), 35 deletions(-) (limited to 'hw/pci-host/uninorth.c') diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index ec6e529d66..e2278fd0f0 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -38,10 +38,10 @@ static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num) static void pci_unin_set_irq(void *opaque, int irq_num, int level) { - qemu_irq *pic = opaque; + UNINState *s = opaque; trace_unin_set_irq(unin_irq_line[irq_num], level); - qemu_set_irq(pic[unin_irq_line[irq_num]], level); + qemu_set_irq(s->irqs[irq_num], level); } static uint32_t unin_get_config_reg(uint32_t reg, uint32_t addr) @@ -109,6 +109,15 @@ static const MemoryRegionOps unin_data_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; +static void pci_unin_init_irqs(UNINState *s) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(s->irqs); i++) { + s->irqs[i] = qdev_get_gpio_in(DEVICE(s->pic), unin_irq_line[i]); + } +} + static void pci_unin_main_realize(DeviceState *dev, Error **errp) { UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(dev); @@ -116,12 +125,13 @@ static void pci_unin_main_realize(DeviceState *dev, Error **errp) h->bus = pci_register_root_bus(dev, NULL, pci_unin_set_irq, pci_unin_map_irq, - s->pic_irqs, + s, &s->pci_mmio, get_system_io(), PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-pci"); + pci_unin_init_irqs(s); /* DEC 21154 bridge */ #if 0 @@ -150,6 +160,11 @@ static void pci_unin_main_init(Object *obj) "unin-pci-hole", &s->pci_mmio, 0x80000000ULL, 0x10000000ULL); + object_property_add_link(obj, "pic", TYPE_OPENPIC, + (Object **) &s->pic, + qdev_prop_allow_set_link_before_realize, + 0, NULL); + sysbus_init_mmio(sbd, &h->conf_mem); sysbus_init_mmio(sbd, &h->data_mem); sysbus_init_mmio(sbd, &s->pci_hole); @@ -162,12 +177,13 @@ static void pci_u3_agp_realize(DeviceState *dev, Error **errp) h->bus = pci_register_root_bus(dev, NULL, pci_unin_set_irq, pci_unin_map_irq, - s->pic_irqs, + s, &s->pci_mmio, get_system_io(), PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); pci_create_simple(h->bus, PCI_DEVFN(11, 0), "u3-agp"); + pci_unin_init_irqs(s); } static void pci_u3_agp_init(Object *obj) @@ -189,6 +205,11 @@ static void pci_u3_agp_init(Object *obj) "unin-pci-hole", &s->pci_mmio, 0x80000000ULL, 0x70000000ULL); + object_property_add_link(obj, "pic", TYPE_OPENPIC, + (Object **) &s->pic, + qdev_prop_allow_set_link_before_realize, + 0, NULL); + sysbus_init_mmio(sbd, &h->conf_mem); sysbus_init_mmio(sbd, &h->data_mem); sysbus_init_mmio(sbd, &s->pci_hole); @@ -201,16 +222,18 @@ static void pci_unin_agp_realize(DeviceState *dev, Error **errp) h->bus = pci_register_root_bus(dev, NULL, pci_unin_set_irq, pci_unin_map_irq, - s->pic_irqs, + s, &s->pci_mmio, get_system_io(), PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp"); + pci_unin_init_irqs(s); } static void pci_unin_agp_init(Object *obj) { + UNINState *s = UNI_NORTH_AGP_HOST_BRIDGE(obj); SysBusDevice *sbd = SYS_BUS_DEVICE(obj); PCIHostState *h = PCI_HOST_BRIDGE(obj); @@ -219,6 +242,12 @@ static void pci_unin_agp_init(Object *obj) obj, "unin-agp-conf-idx", 0x1000); memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops, obj, "unin-agp-conf-data", 0x1000); + + object_property_add_link(obj, "pic", TYPE_OPENPIC, + (Object **) &s->pic, + qdev_prop_allow_set_link_before_realize, + 0, NULL); + sysbus_init_mmio(sbd, &h->conf_mem); sysbus_init_mmio(sbd, &h->data_mem); } @@ -230,16 +259,18 @@ static void pci_unin_internal_realize(DeviceState *dev, Error **errp) h->bus = pci_register_root_bus(dev, NULL, pci_unin_set_irq, pci_unin_map_irq, - s->pic_irqs, + s, &s->pci_mmio, get_system_io(), PCI_DEVFN(14, 0), 4, TYPE_PCI_BUS); pci_create_simple(h->bus, PCI_DEVFN(14, 0), "uni-north-internal-pci"); + pci_unin_init_irqs(s); } static void pci_unin_internal_init(Object *obj) { + UNINState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj); SysBusDevice *sbd = SYS_BUS_DEVICE(obj); PCIHostState *h = PCI_HOST_BRIDGE(obj); @@ -248,6 +279,12 @@ static void pci_unin_internal_init(Object *obj) obj, "unin-pci-conf-idx", 0x1000); memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops, obj, "unin-pci-conf-data", 0x1000); + + object_property_add_link(obj, "pic", TYPE_OPENPIC, + (Object **) &s->pic, + qdev_prop_allow_set_link_before_realize, + 0, NULL); + sysbus_init_mmio(sbd, &h->conf_mem); sysbus_init_mmio(sbd, &h->data_mem); } @@ -412,17 +449,11 @@ static const TypeInfo unin_internal_pci_host_info = { }, }; -static Property pci_unin_main_properties[] = { - DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs), - DEFINE_PROP_END_OF_LIST(), -}; - static void pci_unin_main_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); dc->realize = pci_unin_main_realize; - dc->props = pci_unin_main_properties; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); } @@ -434,17 +465,11 @@ static const TypeInfo pci_unin_main_info = { .class_init = pci_unin_main_class_init, }; -static Property pci_u3_agp_properties[] = { - DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs), - DEFINE_PROP_END_OF_LIST(), -}; - static void pci_u3_agp_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); dc->realize = pci_u3_agp_realize; - dc->props = pci_u3_agp_properties; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); } @@ -456,17 +481,11 @@ static const TypeInfo pci_u3_agp_info = { .class_init = pci_u3_agp_class_init, }; -static Property pci_unin_agp_class_properties[] = { - DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs), - DEFINE_PROP_END_OF_LIST(), -}; - static void pci_unin_agp_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); dc->realize = pci_unin_agp_realize; - dc->props = pci_unin_agp_class_properties; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); } @@ -478,17 +497,11 @@ static const TypeInfo pci_unin_agp_info = { .class_init = pci_unin_agp_class_init, }; -static Property pci_unin_internal_class_properties[] = { - DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs), - DEFINE_PROP_END_OF_LIST(), -}; - static void pci_unin_internal_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); dc->realize = pci_unin_internal_realize; - dc->props = pci_unin_internal_class_properties; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); } diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index 2360b24a12..e05aa26c3d 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -347,7 +347,8 @@ static void ppc_core99_init(MachineState *machine) /* 970 gets a U3 bus */ /* Uninorth AGP bus */ dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE); - qdev_prop_set_ptr(dev, "pic-irqs", pic); + object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", + &error_abort); qdev_init_nofail(dev); uninorth_pci = U3_AGP_HOST_BRIDGE(dev); s = SYS_BUS_DEVICE(dev); @@ -362,7 +363,8 @@ static void ppc_core99_init(MachineState *machine) /* Use values found on a real PowerMac */ /* Uninorth AGP bus */ dev = qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE); - qdev_prop_set_ptr(dev, "pic-irqs", pic); + object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", + &error_abort); qdev_init_nofail(dev); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, 0xf0800000); @@ -370,7 +372,8 @@ static void ppc_core99_init(MachineState *machine) /* Uninorth internal bus */ dev = qdev_create(NULL, TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE); - qdev_prop_set_ptr(dev, "pic-irqs", pic); + object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", + &error_abort); qdev_init_nofail(dev); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, 0xf4800000); @@ -378,7 +381,8 @@ static void ppc_core99_init(MachineState *machine) /* Uninorth main bus */ dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE); - qdev_prop_set_ptr(dev, "pic-irqs", pic); + object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", + &error_abort); qdev_init_nofail(dev); uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev); s = SYS_BUS_DEVICE(dev); diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h index e4fa11c145..e048fd56e8 100644 --- a/include/hw/pci-host/uninorth.h +++ b/include/hw/pci-host/uninorth.h @@ -27,6 +27,8 @@ #include "hw/hw.h" +#include "hw/ppc/openpic.h" + #define TYPE_UNI_NORTH_PCI_HOST_BRIDGE "uni-north-pci-pcihost" #define TYPE_UNI_NORTH_AGP_HOST_BRIDGE "uni-north-agp-pcihost" #define TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE "uni-north-internal-pci-pcihost" @@ -44,7 +46,8 @@ typedef struct UNINState { PCIHostState parent_obj; - void *pic_irqs; + OpenPICState *pic; + qemu_irq irqs[4]; MemoryRegion pci_mmio; MemoryRegion pci_hole; } UNINState; -- cgit 1.4.1 From e226efbb262468241c2c8828373a84ffd93992ac Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Tue, 6 Mar 2018 20:30:59 +0000 Subject: uninorth: move PCI IO (ISA) memory region into the uninorth device MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Do this for both the uninorth main and uninorth u3 AGP buses, using the main PCI bus for each machine (this ensures the IO addresses still match those used by OpenBIOS). Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: David Gibson --- hw/pci-host/uninorth.c | 14 ++++++++++---- hw/ppc/mac_newworld.c | 12 ++++++------ include/hw/pci-host/uninorth.h | 1 + 3 files changed, 17 insertions(+), 10 deletions(-) (limited to 'hw/pci-host/uninorth.c') diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index e2278fd0f0..3a29a4410e 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -127,7 +127,7 @@ static void pci_unin_main_realize(DeviceState *dev, Error **errp) pci_unin_set_irq, pci_unin_map_irq, s, &s->pci_mmio, - get_system_io(), + &s->pci_io, PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-pci"); @@ -155,6 +155,8 @@ static void pci_unin_main_init(Object *obj) memory_region_init(&s->pci_mmio, OBJECT(s), "unin-pci-mmio", 0x100000000ULL); + memory_region_init_io(&s->pci_io, OBJECT(s), &unassigned_io_ops, obj, + "unin-pci-isa-mmio", 0x00800000); memory_region_init_alias(&s->pci_hole, OBJECT(s), "unin-pci-hole", &s->pci_mmio, @@ -168,6 +170,7 @@ static void pci_unin_main_init(Object *obj) sysbus_init_mmio(sbd, &h->conf_mem); sysbus_init_mmio(sbd, &h->data_mem); sysbus_init_mmio(sbd, &s->pci_hole); + sysbus_init_mmio(sbd, &s->pci_io); } static void pci_u3_agp_realize(DeviceState *dev, Error **errp) @@ -179,7 +182,7 @@ static void pci_u3_agp_realize(DeviceState *dev, Error **errp) pci_unin_set_irq, pci_unin_map_irq, s, &s->pci_mmio, - get_system_io(), + &s->pci_io, PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); pci_create_simple(h->bus, PCI_DEVFN(11, 0), "u3-agp"); @@ -200,6 +203,8 @@ static void pci_u3_agp_init(Object *obj) memory_region_init(&s->pci_mmio, OBJECT(s), "unin-pci-mmio", 0x100000000ULL); + memory_region_init_io(&s->pci_io, OBJECT(s), &unassigned_io_ops, obj, + "unin-pci-isa-mmio", 0x00800000); memory_region_init_alias(&s->pci_hole, OBJECT(s), "unin-pci-hole", &s->pci_mmio, @@ -213,6 +218,7 @@ static void pci_u3_agp_init(Object *obj) sysbus_init_mmio(sbd, &h->conf_mem); sysbus_init_mmio(sbd, &h->data_mem); sysbus_init_mmio(sbd, &s->pci_hole); + sysbus_init_mmio(sbd, &s->pci_io); } static void pci_unin_agp_realize(DeviceState *dev, Error **errp) @@ -224,7 +230,7 @@ static void pci_unin_agp_realize(DeviceState *dev, Error **errp) pci_unin_set_irq, pci_unin_map_irq, s, &s->pci_mmio, - get_system_io(), + &s->pci_io, PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp"); @@ -261,7 +267,7 @@ static void pci_unin_internal_realize(DeviceState *dev, Error **errp) pci_unin_set_irq, pci_unin_map_irq, s, &s->pci_mmio, - get_system_io(), + &s->pci_io, PCI_DEVFN(14, 0), 4, TYPE_PCI_BUS); pci_create_simple(h->bus, PCI_DEVFN(14, 0), "uni-north-internal-pci"); diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index e05aa26c3d..bd7ffdb0fb 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -145,7 +145,6 @@ static void ppc_core99_init(MachineState *machine) CPUPPCState *env = NULL; char *filename; qemu_irq *pic, **openpic_irqs; - MemoryRegion *isa = g_new(MemoryRegion, 1); MemoryRegion *unin_memory = g_new(MemoryRegion, 1); int linux_boot, i, j, k; MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1); @@ -273,11 +272,6 @@ static void ppc_core99_init(MachineState *machine) } } - /* Register 8 MB of ISA IO space */ - memory_region_init_alias(isa, NULL, "isa_mmio", - get_system_io(), 0, 0x00800000); - memory_region_add_subregion(get_system_memory(), 0xf2000000, isa); - /* UniN init: XXX should be a real device */ memory_region_init_io(unin_memory, NULL, &unin_ops, token, "unin", 0x1000); memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory); @@ -355,6 +349,9 @@ static void ppc_core99_init(MachineState *machine) /* PCI hole */ memory_region_add_subregion(get_system_memory(), 0x80000000ULL, sysbus_mmio_get_region(s, 2)); + /* Register 8 MB of ISA IO space */ + memory_region_add_subregion(get_system_memory(), 0xf2000000, + sysbus_mmio_get_region(s, 3)); sysbus_mmio_map(s, 0, 0xf0800000); sysbus_mmio_map(s, 1, 0xf0c00000); @@ -389,6 +386,9 @@ static void ppc_core99_init(MachineState *machine) /* PCI hole */ memory_region_add_subregion(get_system_memory(), 0x80000000ULL, sysbus_mmio_get_region(s, 2)); + /* Register 8 MB of ISA IO space */ + memory_region_add_subregion(get_system_memory(), 0xf2000000, + sysbus_mmio_get_region(s, 3)); sysbus_mmio_map(s, 0, 0xf2800000); sysbus_mmio_map(s, 1, 0xf2c00000); diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h index e048fd56e8..a953b5e9b1 100644 --- a/include/hw/pci-host/uninorth.h +++ b/include/hw/pci-host/uninorth.h @@ -50,6 +50,7 @@ typedef struct UNINState { qemu_irq irqs[4]; MemoryRegion pci_mmio; MemoryRegion pci_hole; + MemoryRegion pci_io; } UNINState; #endif /* UNINORTH_H */ -- cgit 1.4.1 From c90c393c2dca764bf2a062b3769ac0de32f5fe28 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Tue, 6 Mar 2018 20:31:00 +0000 Subject: uninorth: rename UNINState to UNINHostState MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The existing UNINState actually represents the PCI/AGP host bridge stage so rename it accordingly. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: David Gibson --- hw/pci-host/uninorth.c | 32 ++++++++++++++++---------------- hw/ppc/mac.h | 8 ++++---- hw/ppc/mac_newworld.c | 2 +- include/hw/pci-host/uninorth.h | 12 ++++++------ 4 files changed, 27 insertions(+), 27 deletions(-) (limited to 'hw/pci-host/uninorth.c') diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index 3a29a4410e..fada0ffd5f 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -38,7 +38,7 @@ static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num) static void pci_unin_set_irq(void *opaque, int irq_num, int level) { - UNINState *s = opaque; + UNINHostState *s = opaque; trace_unin_set_irq(unin_irq_line[irq_num], level); qemu_set_irq(s->irqs[irq_num], level); @@ -81,7 +81,7 @@ static uint32_t unin_get_config_reg(uint32_t reg, uint32_t addr) static void unin_data_write(void *opaque, hwaddr addr, uint64_t val, unsigned len) { - UNINState *s = opaque; + UNINHostState *s = opaque; PCIHostState *phb = PCI_HOST_BRIDGE(s); trace_unin_data_write(addr, len, val); pci_data_write(phb->bus, @@ -92,7 +92,7 @@ static void unin_data_write(void *opaque, hwaddr addr, static uint64_t unin_data_read(void *opaque, hwaddr addr, unsigned len) { - UNINState *s = opaque; + UNINHostState *s = opaque; PCIHostState *phb = PCI_HOST_BRIDGE(s); uint32_t val; @@ -109,7 +109,7 @@ static const MemoryRegionOps unin_data_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; -static void pci_unin_init_irqs(UNINState *s) +static void pci_unin_init_irqs(UNINHostState *s) { int i; @@ -120,7 +120,7 @@ static void pci_unin_init_irqs(UNINState *s) static void pci_unin_main_realize(DeviceState *dev, Error **errp) { - UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(dev); + UNINHostState *s = UNI_NORTH_PCI_HOST_BRIDGE(dev); PCIHostState *h = PCI_HOST_BRIDGE(dev); h->bus = pci_register_root_bus(dev, NULL, @@ -142,7 +142,7 @@ static void pci_unin_main_realize(DeviceState *dev, Error **errp) static void pci_unin_main_init(Object *obj) { - UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(obj); + UNINHostState *s = UNI_NORTH_PCI_HOST_BRIDGE(obj); SysBusDevice *sbd = SYS_BUS_DEVICE(obj); PCIHostState *h = PCI_HOST_BRIDGE(obj); @@ -175,7 +175,7 @@ static void pci_unin_main_init(Object *obj) static void pci_u3_agp_realize(DeviceState *dev, Error **errp) { - UNINState *s = U3_AGP_HOST_BRIDGE(dev); + UNINHostState *s = U3_AGP_HOST_BRIDGE(dev); PCIHostState *h = PCI_HOST_BRIDGE(dev); h->bus = pci_register_root_bus(dev, NULL, @@ -191,7 +191,7 @@ static void pci_u3_agp_realize(DeviceState *dev, Error **errp) static void pci_u3_agp_init(Object *obj) { - UNINState *s = U3_AGP_HOST_BRIDGE(obj); + UNINHostState *s = U3_AGP_HOST_BRIDGE(obj); SysBusDevice *sbd = SYS_BUS_DEVICE(obj); PCIHostState *h = PCI_HOST_BRIDGE(obj); @@ -223,7 +223,7 @@ static void pci_u3_agp_init(Object *obj) static void pci_unin_agp_realize(DeviceState *dev, Error **errp) { - UNINState *s = UNI_NORTH_AGP_HOST_BRIDGE(dev); + UNINHostState *s = UNI_NORTH_AGP_HOST_BRIDGE(dev); PCIHostState *h = PCI_HOST_BRIDGE(dev); h->bus = pci_register_root_bus(dev, NULL, @@ -239,7 +239,7 @@ static void pci_unin_agp_realize(DeviceState *dev, Error **errp) static void pci_unin_agp_init(Object *obj) { - UNINState *s = UNI_NORTH_AGP_HOST_BRIDGE(obj); + UNINHostState *s = UNI_NORTH_AGP_HOST_BRIDGE(obj); SysBusDevice *sbd = SYS_BUS_DEVICE(obj); PCIHostState *h = PCI_HOST_BRIDGE(obj); @@ -260,7 +260,7 @@ static void pci_unin_agp_init(Object *obj) static void pci_unin_internal_realize(DeviceState *dev, Error **errp) { - UNINState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(dev); + UNINHostState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(dev); PCIHostState *h = PCI_HOST_BRIDGE(dev); h->bus = pci_register_root_bus(dev, NULL, @@ -276,7 +276,7 @@ static void pci_unin_internal_realize(DeviceState *dev, Error **errp) static void pci_unin_internal_init(Object *obj) { - UNINState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj); + UNINHostState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj); SysBusDevice *sbd = SYS_BUS_DEVICE(obj); PCIHostState *h = PCI_HOST_BRIDGE(obj); @@ -466,7 +466,7 @@ static void pci_unin_main_class_init(ObjectClass *klass, void *data) static const TypeInfo pci_unin_main_info = { .name = TYPE_UNI_NORTH_PCI_HOST_BRIDGE, .parent = TYPE_PCI_HOST_BRIDGE, - .instance_size = sizeof(UNINState), + .instance_size = sizeof(UNINHostState), .instance_init = pci_unin_main_init, .class_init = pci_unin_main_class_init, }; @@ -482,7 +482,7 @@ static void pci_u3_agp_class_init(ObjectClass *klass, void *data) static const TypeInfo pci_u3_agp_info = { .name = TYPE_U3_AGP_HOST_BRIDGE, .parent = TYPE_PCI_HOST_BRIDGE, - .instance_size = sizeof(UNINState), + .instance_size = sizeof(UNINHostState), .instance_init = pci_u3_agp_init, .class_init = pci_u3_agp_class_init, }; @@ -498,7 +498,7 @@ static void pci_unin_agp_class_init(ObjectClass *klass, void *data) static const TypeInfo pci_unin_agp_info = { .name = TYPE_UNI_NORTH_AGP_HOST_BRIDGE, .parent = TYPE_PCI_HOST_BRIDGE, - .instance_size = sizeof(UNINState), + .instance_size = sizeof(UNINHostState), .instance_init = pci_unin_agp_init, .class_init = pci_unin_agp_class_init, }; @@ -514,7 +514,7 @@ static void pci_unin_internal_class_init(ObjectClass *klass, void *data) static const TypeInfo pci_unin_internal_info = { .name = TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE, .parent = TYPE_PCI_HOST_BRIDGE, - .instance_size = sizeof(UNINState), + .instance_size = sizeof(UNINHostState), .instance_init = pci_unin_internal_init, .class_init = pci_unin_internal_class_init, }; diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h index 1ab2a3b354..892dd03789 100644 --- a/hw/ppc/mac.h +++ b/hw/ppc/mac.h @@ -89,10 +89,10 @@ void macio_init(PCIDevice *dev, #define TYPE_GRACKLE_PCI_HOST_BRIDGE "grackle-pcihost" /* UniNorth PCI */ -UNINState *pci_pmac_init(qemu_irq *pic, - MemoryRegion *address_space_mem); -UNINState *pci_pmac_u3_init(qemu_irq *pic, - MemoryRegion *address_space_mem); +UNINHostState *pci_pmac_init(qemu_irq *pic, + MemoryRegion *address_space_mem); +UNINHostState *pci_pmac_u3_init(qemu_irq *pic, + MemoryRegion *address_space_mem); /* Mac NVRAM */ #define TYPE_MACIO_NVRAM "macio-nvram" diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index bd7ffdb0fb..29bd3838bf 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -150,7 +150,7 @@ static void ppc_core99_init(MachineState *machine) MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1); hwaddr kernel_base, initrd_base, cmdline_base = 0; long kernel_size, initrd_size; - UNINState *uninorth_pci; + UNINHostState *uninorth_pci; PCIBus *pci_bus; NewWorldMacIOState *macio; MACIOIDEState *macio_ide; diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h index a953b5e9b1..f0e6836c76 100644 --- a/include/hw/pci-host/uninorth.h +++ b/include/hw/pci-host/uninorth.h @@ -35,15 +35,15 @@ #define TYPE_U3_AGP_HOST_BRIDGE "u3-agp-pcihost" #define UNI_NORTH_PCI_HOST_BRIDGE(obj) \ - OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_PCI_HOST_BRIDGE) + OBJECT_CHECK(UNINHostState, (obj), TYPE_UNI_NORTH_PCI_HOST_BRIDGE) #define UNI_NORTH_AGP_HOST_BRIDGE(obj) \ - OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_AGP_HOST_BRIDGE) + OBJECT_CHECK(UNINHostState, (obj), TYPE_UNI_NORTH_AGP_HOST_BRIDGE) #define UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj) \ - OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE) + OBJECT_CHECK(UNINHostState, (obj), TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE) #define U3_AGP_HOST_BRIDGE(obj) \ - OBJECT_CHECK(UNINState, (obj), TYPE_U3_AGP_HOST_BRIDGE) + OBJECT_CHECK(UNINHostState, (obj), TYPE_U3_AGP_HOST_BRIDGE) -typedef struct UNINState { +typedef struct UNINHostState { PCIHostState parent_obj; OpenPICState *pic; @@ -51,6 +51,6 @@ typedef struct UNINState { MemoryRegion pci_mmio; MemoryRegion pci_hole; MemoryRegion pci_io; -} UNINState; +} UNINHostState; #endif /* UNINORTH_H */ -- cgit 1.4.1