From 9b29697fefa59431984aed9118e6fc062da0ee10 Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Sat, 20 May 2023 07:45:06 +0200 Subject: hw/riscv/opentitan: Rename machine_[class]_init() functions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Follow QOM style which declares FOO_init() as instance initializer and FOO_class_init() as class initializer: rename the OpenTitan machine class/instance init() accordingly. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Message-Id: <20230520054510.68822-2-philmd@linaro.org> Signed-off-by: Alistair Francis --- hw/riscv/opentitan.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'hw/riscv/opentitan.c') diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index bc678766e7..2d21ee39c5 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -75,7 +75,7 @@ static const MemMapEntry ibex_memmap[] = { [IBEX_DEV_FLASH_VIRTUAL] = { 0x80000000, 0x80000 }, }; -static void opentitan_board_init(MachineState *machine) +static void opentitan_machine_init(MachineState *machine) { MachineClass *mc = MACHINE_GET_CLASS(machine); const MemMapEntry *memmap = ibex_memmap; @@ -108,17 +108,17 @@ static void opentitan_board_init(MachineState *machine) } } -static void opentitan_machine_init(MachineClass *mc) +static void opentitan_machine_class_init(MachineClass *mc) { mc->desc = "RISC-V Board compatible with OpenTitan"; - mc->init = opentitan_board_init; + mc->init = opentitan_machine_init; mc->max_cpus = 1; mc->default_cpu_type = TYPE_RISCV_CPU_IBEX; mc->default_ram_id = "riscv.lowrisc.ibex.ram"; mc->default_ram_size = ibex_memmap[IBEX_DEV_RAM].size; } -DEFINE_MACHINE("opentitan", opentitan_machine_init) +DEFINE_MACHINE("opentitan", opentitan_machine_class_init) static void lowrisc_ibex_soc_init(Object *obj) { -- cgit 1.4.1 From e0782b11bd7ef0c8e5cb9b5e83c32736a143deee Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Sat, 20 May 2023 07:45:07 +0200 Subject: hw/riscv/opentitan: Declare QOM types using DEFINE_TYPES() macro MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When multiple QOM types are registered in the same file, it is simpler to use the the DEFINE_TYPES() macro. Replace the type_init() / type_register_static() combination. This is in preparation of adding the OpenTitan machine type to this array in a pair of commits. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Message-Id: <20230520054510.68822-3-philmd@linaro.org> Signed-off-by: Alistair Francis --- hw/riscv/opentitan.c | 21 +++++++++------------ 1 file changed, 9 insertions(+), 12 deletions(-) (limited to 'hw/riscv/opentitan.c') diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index 2d21ee39c5..294955eeea 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -320,17 +320,14 @@ static void lowrisc_ibex_soc_class_init(ObjectClass *oc, void *data) dc->user_creatable = false; } -static const TypeInfo lowrisc_ibex_soc_type_info = { - .name = TYPE_RISCV_IBEX_SOC, - .parent = TYPE_DEVICE, - .instance_size = sizeof(LowRISCIbexSoCState), - .instance_init = lowrisc_ibex_soc_init, - .class_init = lowrisc_ibex_soc_class_init, +static const TypeInfo open_titan_types[] = { + { + .name = TYPE_RISCV_IBEX_SOC, + .parent = TYPE_DEVICE, + .instance_size = sizeof(LowRISCIbexSoCState), + .instance_init = lowrisc_ibex_soc_init, + .class_init = lowrisc_ibex_soc_class_init, + } }; -static void lowrisc_ibex_soc_register_types(void) -{ - type_register_static(&lowrisc_ibex_soc_type_info); -} - -type_init(lowrisc_ibex_soc_register_types) +DEFINE_TYPES(open_titan_types) -- cgit 1.4.1 From 264495f9486ac17ea0275b0de1510b5de32d142b Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Sat, 20 May 2023 07:45:08 +0200 Subject: hw/riscv/opentitan: Add TYPE_OPENTITAN_MACHINE definition MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit QOM type names are usually defined as TYPE_FOO. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Message-Id: <20230520054510.68822-4-philmd@linaro.org> Signed-off-by: Alistair Francis --- hw/riscv/opentitan.c | 2 +- include/hw/riscv/opentitan.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) (limited to 'hw/riscv/opentitan.c') diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index 294955eeea..7d7159ea30 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -118,7 +118,7 @@ static void opentitan_machine_class_init(MachineClass *mc) mc->default_ram_size = ibex_memmap[IBEX_DEV_RAM].size; } -DEFINE_MACHINE("opentitan", opentitan_machine_class_init) +DEFINE_MACHINE(TYPE_OPENTITAN_MACHINE, opentitan_machine_class_init) static void lowrisc_ibex_soc_init(Object *obj) { diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h index c40b05052a..fd70226ed8 100644 --- a/include/hw/riscv/opentitan.h +++ b/include/hw/riscv/opentitan.h @@ -53,6 +53,8 @@ struct LowRISCIbexSoCState { MemoryRegion flash_alias; }; +#define TYPE_OPENTITAN_MACHINE "opentitan" + typedef struct OpenTitanState { /*< private >*/ SysBusDevice parent_obj; -- cgit 1.4.1 From 8696b74a6fed86a9d2bd7e947d0490c2459a8aa6 Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Sat, 20 May 2023 07:45:09 +0200 Subject: hw/riscv/opentitan: Explicit machine type definition MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Expand the DEFINE_MACHINE() macro, converting the class_init() handler. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Message-Id: <20230520054510.68822-5-philmd@linaro.org> Signed-off-by: Alistair Francis --- hw/riscv/opentitan.c | 10 +++++++--- include/hw/riscv/opentitan.h | 3 ++- 2 files changed, 9 insertions(+), 4 deletions(-) (limited to 'hw/riscv/opentitan.c') diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index 7d7159ea30..9535308197 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -108,8 +108,10 @@ static void opentitan_machine_init(MachineState *machine) } } -static void opentitan_machine_class_init(MachineClass *mc) +static void opentitan_machine_class_init(ObjectClass *oc, void *data) { + MachineClass *mc = MACHINE_CLASS(oc); + mc->desc = "RISC-V Board compatible with OpenTitan"; mc->init = opentitan_machine_init; mc->max_cpus = 1; @@ -118,8 +120,6 @@ static void opentitan_machine_class_init(MachineClass *mc) mc->default_ram_size = ibex_memmap[IBEX_DEV_RAM].size; } -DEFINE_MACHINE(TYPE_OPENTITAN_MACHINE, opentitan_machine_class_init) - static void lowrisc_ibex_soc_init(Object *obj) { LowRISCIbexSoCState *s = RISCV_IBEX_SOC(obj); @@ -327,6 +327,10 @@ static const TypeInfo open_titan_types[] = { .instance_size = sizeof(LowRISCIbexSoCState), .instance_init = lowrisc_ibex_soc_init, .class_init = lowrisc_ibex_soc_class_init, + }, { + .name = TYPE_OPENTITAN_MACHINE, + .parent = TYPE_MACHINE, + .class_init = opentitan_machine_class_init, } }; diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h index fd70226ed8..806ff73528 100644 --- a/include/hw/riscv/opentitan.h +++ b/include/hw/riscv/opentitan.h @@ -24,6 +24,7 @@ #include "hw/char/ibex_uart.h" #include "hw/timer/ibex_timer.h" #include "hw/ssi/ibex_spi_host.h" +#include "hw/boards.h" #include "qom/object.h" #define TYPE_RISCV_IBEX_SOC "riscv.lowrisc.ibex.soc" @@ -53,7 +54,7 @@ struct LowRISCIbexSoCState { MemoryRegion flash_alias; }; -#define TYPE_OPENTITAN_MACHINE "opentitan" +#define TYPE_OPENTITAN_MACHINE MACHINE_TYPE_NAME("opentitan") typedef struct OpenTitanState { /*< private >*/ -- cgit 1.4.1 From a828ba9d46972e32c135f386dd08c02aa7eb8f1d Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Sat, 20 May 2023 07:45:10 +0200 Subject: hw/riscv/opentitan: Correct OpenTitanState parent type/size MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit OpenTitanState is the 'machine' (or 'board') state: it isn't a SysBus device, but inherits from the MachineState type. Correct the instance size. Doing so we avoid leaking an OpenTitanState pointer in opentitan_machine_init(). Fixes: fe0fe4735e ("riscv: Initial commit of OpenTitan machine") Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Message-Id: <20230520054510.68822-6-philmd@linaro.org> Signed-off-by: Alistair Francis --- hw/riscv/opentitan.c | 3 ++- include/hw/riscv/opentitan.h | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) (limited to 'hw/riscv/opentitan.c') diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index 9535308197..6a2fcc4ade 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -78,8 +78,8 @@ static const MemMapEntry ibex_memmap[] = { static void opentitan_machine_init(MachineState *machine) { MachineClass *mc = MACHINE_GET_CLASS(machine); + OpenTitanState *s = OPENTITAN_MACHINE(machine); const MemMapEntry *memmap = ibex_memmap; - OpenTitanState *s = g_new0(OpenTitanState, 1); MemoryRegion *sys_mem = get_system_memory(); if (machine->ram_size != mc->default_ram_size) { @@ -330,6 +330,7 @@ static const TypeInfo open_titan_types[] = { }, { .name = TYPE_OPENTITAN_MACHINE, .parent = TYPE_MACHINE, + .instance_size = sizeof(OpenTitanState), .class_init = opentitan_machine_class_init, } }; diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h index 806ff73528..609473d07b 100644 --- a/include/hw/riscv/opentitan.h +++ b/include/hw/riscv/opentitan.h @@ -55,10 +55,11 @@ struct LowRISCIbexSoCState { }; #define TYPE_OPENTITAN_MACHINE MACHINE_TYPE_NAME("opentitan") +OBJECT_DECLARE_SIMPLE_TYPE(OpenTitanState, OPENTITAN_MACHINE) typedef struct OpenTitanState { /*< private >*/ - SysBusDevice parent_obj; + MachineState parent_obj; /*< public >*/ LowRISCIbexSoCState soc; -- cgit 1.4.1