From 3ea8fb521d6161a64879b6f43fac46b4d80d2e39 Mon Sep 17 00:00:00 2001 From: Jason Chien Date: Sun, 2 Mar 2025 01:37:51 +0800 Subject: hw/riscv/riscv-iommu: Fix process directory table walk The PPN field in a non-leaf PDT entry is positioned differently from that in a leaf PDT entry. The original implementation incorrectly used the leaf entry's PPN mask to extract the PPN from a non-leaf entry, leading to an erroneous page table walk. This commit introduces new macros to properly define the fields for non-leaf PDT entries and corrects the page table walk. Signed-off-by: Jason Chien Reviewed-by: Daniel Henrique Barboza Message-ID: <20250301173751.9446-1-jason.chien@sifive.com> Signed-off-by: Alistair Francis --- hw/riscv/riscv-iommu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'hw/riscv/riscv-iommu.c') diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c index d46beb2d64..76e0fcd873 100644 --- a/hw/riscv/riscv-iommu.c +++ b/hw/riscv/riscv-iommu.c @@ -1042,10 +1042,10 @@ static int riscv_iommu_ctx_fetch(RISCVIOMMUState *s, RISCVIOMMUContext *ctx) return RISCV_IOMMU_FQ_CAUSE_PDT_LOAD_FAULT; } le64_to_cpus(&de); - if (!(de & RISCV_IOMMU_PC_TA_V)) { + if (!(de & RISCV_IOMMU_PDTE_VALID)) { return RISCV_IOMMU_FQ_CAUSE_PDT_INVALID; } - addr = PPN_PHYS(get_field(de, RISCV_IOMMU_PC_FSC_PPN)); + addr = PPN_PHYS(get_field(de, RISCV_IOMMU_PDTE_PPN)); } riscv_iommu_hpm_incr_ctr(s, ctx, RISCV_IOMMU_HPMEVENT_PD_WALK); -- cgit 1.4.1