From 43cf723adca9a5e188c664c3b606a585192a599c Mon Sep 17 00:00:00 2001 From: Atish Patra Date: Wed, 1 Jul 2020 11:39:46 -0700 Subject: riscv: Unify Qemu's reset vector code path Currently, all riscv machines except sifive_u have identical reset vector code implementations with memory addresses being different for all machines. They can be easily combined into a single function in common code. Move it to common function and let all the machines use the common function. Signed-off-by: Atish Patra Reviewed-by: Alistair Francis Reviewed-by: Bin Meng Tested-by: Bin Meng Message-Id: <20200701183949.398134-2-atish.patra@wdc.com> Signed-off-by: Alistair Francis --- hw/riscv/sifive_u.c | 1 - 1 file changed, 1 deletion(-) (limited to 'hw/riscv/sifive_u.c') diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 7851326988..0695c93d2c 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -56,7 +56,6 @@ #include "sysemu/device_tree.h" #include "sysemu/runstate.h" #include "sysemu/sysemu.h" -#include "exec/address-spaces.h" #include -- cgit 1.4.1