From b4132a9e62978e247bce66e70499c4e2cad8d870 Mon Sep 17 00:00:00 2001 From: Jim Shu Date: Wed, 20 Nov 2024 23:39:33 +0800 Subject: hw/riscv: Support to load DTB after 3GB memory on 64-bit system. Larger initrd image will overlap the DTB at 3GB address. Since 64-bit system doesn't have 32-bit addressable issue, we just load DTB to the end of dram in 64-bit system. Signed-off-by: Jim Shu Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Message-ID: <20241120153935.24706-2-jim.shu@sifive.com> [ Changes by AF - Store fdt_load_addr_hi32 in the reset vector ] Signed-off-by: Alistair Francis --- hw/riscv/virt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'hw/riscv/virt.c') diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 43a1c86c33..98da79a5be 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1492,7 +1492,7 @@ static void virt_machine_done(Notifier *notifier, void *data) fdt_load_addr = riscv_compute_fdt_addr(memmap[VIRT_DRAM].base, memmap[VIRT_DRAM].size, - machine); + machine, &s->soc[0]); riscv_load_fdt(fdt_load_addr, machine->fdt); /* load the reset vector */ -- cgit 1.4.1