From be9c5ddeabb73e9dee2d6922c03ffee4e1f4c8ec Mon Sep 17 00:00:00 2001 From: Sai Pavan Boddu Date: Mon, 7 Sep 2015 23:36:40 +0530 Subject: sdhci: use PRIx64 for uint64_t type Fix compile time warnings, because of type mismatch for unsigned long long type. Signed-off-by: Sai Pavan Boddu Reviewed-by: Peter Crosthwaite Signed-off-by: Michael Tokarev --- hw/sd/sdhci.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'hw/sd/sdhci.c') diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 65304cff5e..436448c4fc 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -22,6 +22,7 @@ * with this program; if not, see . */ +#include #include "hw/hw.h" #include "sysemu/block-backend.h" #include "sysemu/blockdev.h" @@ -719,7 +720,8 @@ static void sdhci_do_adma(SDHCIState *s) break; case SDHC_ADMA_ATTR_ACT_LINK: /* link to next descriptor table */ s->admasysaddr = dscr.addr; - DPRINT_L1("ADMA link: admasysaddr=0x%lx\n", s->admasysaddr); + DPRINT_L1("ADMA link: admasysaddr=0x%" PRIx64 "\n", + s->admasysaddr); break; default: s->admasysaddr += dscr.incr; @@ -727,7 +729,8 @@ static void sdhci_do_adma(SDHCIState *s) } if (dscr.attr & SDHC_ADMA_ATTR_INT) { - DPRINT_L1("ADMA interrupt: admasysaddr=0x%lx\n", s->admasysaddr); + DPRINT_L1("ADMA interrupt: admasysaddr=0x%" PRIx64 "\n", + s->admasysaddr); if (s->norintstsen & SDHC_NISEN_DMA) { s->norintsts |= SDHC_NIS_DMA; } -- cgit 1.4.1 From 7af0fc994e85c0ff16eda6d7e328427b02a01008 Mon Sep 17 00:00:00 2001 From: Sai Pavan Boddu Date: Mon, 7 Sep 2015 23:36:41 +0530 Subject: sdhci: Change debug prints to compile unconditionally Conditional compilation hides few type mismatch warnings, fix it to compile unconditionally. Signed-off-by: Sai Pavan Boddu Suggested-by: Eric Blake Reviewed-by: Peter Crosthwaite Signed-off-by: Michael Tokarev --- hw/sd/sdhci.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) (limited to 'hw/sd/sdhci.c') diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 436448c4fc..8b0f9f0df5 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -37,24 +37,24 @@ #define SDHC_DEBUG 0 #endif -#if SDHC_DEBUG == 0 - #define DPRINT_L1(fmt, args...) do { } while (0) - #define DPRINT_L2(fmt, args...) do { } while (0) - #define ERRPRINT(fmt, args...) do { } while (0) -#elif SDHC_DEBUG == 1 - #define DPRINT_L1(fmt, args...) \ - do {fprintf(stderr, "QEMU SDHC: "fmt, ## args); } while (0) - #define DPRINT_L2(fmt, args...) do { } while (0) - #define ERRPRINT(fmt, args...) \ - do {fprintf(stderr, "QEMU SDHC ERROR: "fmt, ## args); } while (0) -#else - #define DPRINT_L1(fmt, args...) \ - do {fprintf(stderr, "QEMU SDHC: "fmt, ## args); } while (0) - #define DPRINT_L2(fmt, args...) \ - do {fprintf(stderr, "QEMU SDHC: "fmt, ## args); } while (0) - #define ERRPRINT(fmt, args...) \ - do {fprintf(stderr, "QEMU SDHC ERROR: "fmt, ## args); } while (0) -#endif +#define DPRINT_L1(fmt, args...) \ + do { \ + if (SDHC_DEBUG) { \ + fprintf(stderr, "QEMU SDHC: " fmt, ## args); \ + } \ + } while (0) +#define DPRINT_L2(fmt, args...) \ + do { \ + if (SDHC_DEBUG > 1) { \ + fprintf(stderr, "QEMU SDHC: " fmt, ## args); \ + } \ + } while (0) +#define ERRPRINT(fmt, args...) \ + do { \ + if (SDHC_DEBUG) { \ + fprintf(stderr, "QEMU SDHC ERROR: " fmt, ## args); \ + } \ + } while (0) /* Default SD/MMC host controller features information, which will be * presented in CAPABILITIES register of generic SD host controller at reset. -- cgit 1.4.1