From abe098e4f93a80b0756c0e8e728bc78c47a91127 Mon Sep 17 00:00:00 2001 From: "Peter A. G. Crosthwaite" Date: Wed, 13 Jun 2012 14:46:43 +1000 Subject: xilinx_timer: changed nr_timers to one_timer_only The configurable property for this IP in the Xilinx tools is a boolean switch "one-timer-only" that flicks this timer from being dual channel to single. Updated QEMU to work the same way for better match with the IP core and its TRM. Signed-off-by: Peter A. G. Crosthwaite Signed-off-by: Edgar E. Iglesias --- hw/xilinx.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'hw/xilinx.h') diff --git a/hw/xilinx.h b/hw/xilinx.h index 70d15cfcf9..97afa4552b 100644 --- a/hw/xilinx.h +++ b/hw/xilinx.h @@ -16,12 +16,12 @@ xilinx_intc_create(target_phys_addr_t base, qemu_irq irq, int kind_of_intr) /* OPB Timer/Counter. */ static inline DeviceState * -xilinx_timer_create(target_phys_addr_t base, qemu_irq irq, int nr, int freq) +xilinx_timer_create(target_phys_addr_t base, qemu_irq irq, int oto, int freq) { DeviceState *dev; dev = qdev_create(NULL, "xilinx,timer"); - qdev_prop_set_uint32(dev, "nr-timers", nr); + qdev_prop_set_uint32(dev, "one-timer-only", oto); qdev_prop_set_uint32(dev, "frequency", freq); qdev_init_nofail(dev); sysbus_mmio_map(sysbus_from_qdev(dev), 0, base); -- cgit 1.4.1