From 2ddc45954f97cd1d7ee5cbca0def05e980d1da9f Mon Sep 17 00:00:00 2001 From: qianfan Zhao Date: Mon, 20 Feb 2023 16:12:52 +0800 Subject: hw: arm: allwinner-h3: Fix and complete H3 i2c devices Allwinner h3 has 4 twi(i2c) devices named twi0, twi1, twi2 and r_twi. The registers are compatible with TYPE_AW_I2C_SUN6I, write 1 to clear control register's INT_FLAG bit. Signed-off-by: qianfan Zhao Reviewed-by: Strahinja Jankovic Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- include/hw/arm/allwinner-h3.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include/hw/arm/allwinner-h3.h') diff --git a/include/hw/arm/allwinner-h3.h b/include/hw/arm/allwinner-h3.h index 1d7ce20589..59e0f822d2 100644 --- a/include/hw/arm/allwinner-h3.h +++ b/include/hw/arm/allwinner-h3.h @@ -84,6 +84,8 @@ enum { AW_H3_DEV_UART3, AW_H3_DEV_EMAC, AW_H3_DEV_TWI0, + AW_H3_DEV_TWI1, + AW_H3_DEV_TWI2, AW_H3_DEV_DRAMCOM, AW_H3_DEV_DRAMCTL, AW_H3_DEV_DRAMPHY, @@ -93,6 +95,7 @@ enum { AW_H3_DEV_GIC_VCPU, AW_H3_DEV_RTC, AW_H3_DEV_CPUCFG, + AW_H3_DEV_R_TWI, AW_H3_DEV_SDRAM }; @@ -133,6 +136,9 @@ struct AwH3State { AwSidState sid; AwSdHostState mmc0; AWI2CState i2c0; + AWI2CState i2c1; + AWI2CState i2c2; + AWI2CState r_twi; AwSun8iEmacState emac; AwRtcState rtc; GICState gic; -- cgit 1.4.1